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/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dqcom,lpass-cpu.txt3 This node models the Qualcomm Technologies Low-Power Audio SubSystem (LPASS).
7 - compatible : "qcom,lpass-cpu" or "qcom,apq8016-lpass-cpu"
8 - clocks : Must contain an entry for each entry in clock-names.
9 - clock-names : A list which must include the following entries:
10 * "ahbix-clk"
11 * "mi2s-osr-clk"
12 * "mi2s-bit-clk"
13 : required clocks for "qcom,lpass-cpu-apq8016"
14 * "ahbix-clk"
15 * "mi2s-bit-clk0"
[all …]
/freebsd/sys/contrib/device-tree/Bindings/leds/
H A Dleds-bcm6358.txt4 In these SoCs there are Serial LEDs (LEDs connected to a 74x164 controller),
5 which can either be controlled by software (exporting the 74x164 as spi-gpio.
10 - compatible : should be "brcm,bcm6358-leds".
11 - #address-cells : must be 1.
12 - #size-cells : must be 0.
13 - reg : BCM6358 LED controller address and size.
16 - brcm,clk-div : SCK signal divider. Possible values are 1, 2, 4 and 8.
18 - brcm,clk-dat-low : Boolean, makes clock and data signals active low.
21 Each LED is represented as a sub-node of the brcm,bcm6358-leds device.
23 LED sub-node required properties:
[all …]
H A Dleds-bcm6328.txt5 However, on some devices there are Serial LEDs (LEDs connected to a 74x164
7 as spi-gpio. See Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml),
9 Some of these Serial LEDs are hardware controlled (e.g. ethernet LEDs) and
10 exporting the 74x164 as spi-gpio prevents those LEDs to be hardware
18 explained later in brcm,link-signal-sources). Even if a LED is hardware
24 - compatible : should be "brcm,bcm6328-leds".
25 - #address-cells : must be 1.
26 - #size-cells : must be 0.
27 - reg : BCM6328 LED controller address and size.
30 - brcm,serial-leds : Boolean, enables Serial LEDs.
[all …]
H A Dleds-bcm6328.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-bcm6328.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Álvaro Fernández Rojas <noltari@gmail.com>
15 However, on some devices there are Serial LEDs (LEDs connected to a 74x164
17 as spi-gpio. See
20 Some of these Serial LEDs are hardware controlled (e.g. ethernet LEDs) and
21 exporting the 74x164 as spi-gpio prevents those LEDs to be hardware
29 explained later in brcm,link-signal-sources). Even if a LED is hardware
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/freebsd/sys/arm/freescale/vybrid/
H A Dvf_ccm.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2013-2014 Ruslan Bukin <br@bsdpad.com>
60 #define CCM_CSCMR1 0x10 /* Serial Clock Multiplexer Register 1 */
61 #define CCM_CSCDR1 0x14 /* Serial Clock Divider Register 1 */
62 #define CCM_CSCDR2 0x18 /* Serial Clock Divider Register 2 */
63 #define CCM_CSCDR3 0x1C /* Serial Clock Divider Register 3 */
64 #define CCM_CSCMR2 0x20 /* Serial Clock Multiplexer Register 2 */
66 #define CCM_CLPCR 0x2C /* Low Power Control Register */
153 struct clk { struct
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/freebsd/sys/contrib/device-tree/Bindings/gpio/
H A Dsgpio-aspeed.txt2 --------------------------------------------
5 featured Serial GPIOs. Each of the Serial GPIO pins can be programmed to
7 - Support interrupt option for each input port and various interrupt
8 sensitivity option (level-high, level-low, edge-high, edge-low)
9 - Support reset tolerance option for each output port
10 - Directly connected to APB bus and its shift clock is from APB bus clock
12 - Co-work with external signal-chained TTL components (74LV165/74LV595)
16 - compatible : Should be one of
17 "aspeed,ast2400-sgpio", "aspeed,ast2500-sgpio"
18 - #gpio-cells : Should be 2, see gpio.txt
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/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt7622-bananapi-bpi-r64.dts5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
17 model = "Bananapi BPI-R64";
18 chassis-type = "embedded";
19 compatible = "bananapi,bpi-r64", "mediatek,mt7622";
26 stdout-path = "serial0:115200n8";
32 proc-supply = <&mt6380_vcpu_reg>;
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H A Dmt7986a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/mt7986-clk.h>
10 #include <dt-bindings/reset/mt7986-resets.h>
11 #include <dt-bindings/phy/phy.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 #address-cells = <1>;
[all …]
/freebsd/sys/dev/usb/serial/
H A Dumcs.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
50 #define MCS7840_DEV_REG_PINPONGHIGH 0x02 /* High bits of ping-pong
52 #define MCS7840_DEV_REG_PINPONGLOW 0x03 /* Low bits of ping-pong
67 #define MCS7840_DEV_REG_PLL_DIV_M 0x0e /* Pre-diviedr for PLL, R/W */
78 /* DCRx_2-DCRx_4 Registers goes here (see below, they are documented) */
109 #define MCS7840_DEV_REG_BI_FIFO_STAT1 0x32 /* Bulk-In FIFO Stat for Port
112 #define MCS7840_DEV_REG_BO_FIFO_STAT1 0x33 /* Bulk-out FIFO Stat for Port
115 #define MCS7840_DEV_REG_BI_FIFO_STAT2 0x34 /* Bulk-In FIFO Stat for Port
118 #define MCS7840_DEV_REG_BO_FIFO_STAT2 0x35 /* Bulk-out FIFO Stat for Port
[all …]
H A Dumcs.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
30 * This driver supports several multiport USB-to-RS232 serial adapters driven
39 * quad-port mos7840.
72 #include <dev/usb/serial/usb_serial.h>
74 #include <dev/usb/serial/umcs.h>
82 "USB umcs quadport serial adapter");
87 * Two-port devices (both with 7820 chip and 7840 chip configured as two-port)
89 * So,PHYSICAL port numbers (indexes) on two-port device will be 0 and 2.
95 * Pack non-regular registers to array to easier if-less access.
[all …]
/freebsd/sys/contrib/device-tree/Bindings/arm/freescale/
H A Dfsl,scu.txt2 --------------------------------------------------------------------
4 The System Controller Firmware (SCFW) is a low-level system function
5 which runs on a dedicated Cortex-M core to provide power, clock, and
9 The AP communicates with the SC using a multi-ported MU module found
22 -------------------
23 - compatible: should be "fsl,imx-scu".
24 - mbox-names: should include "tx0", "tx1", "tx2", "tx3",
27 - mboxes: List of phandle of 4 MU channels for tx, 4 MU channels for
63 Client nodes are maintained as children of the relevant IMX-SCU device node.
66 ------------------------------------------------------------
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/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drv1108.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-binding
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H A Drk3288.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3288-cru.h>
8 #include <dt-bindings/power/rk3288-power.h>
9 #include <dt-bindings/thermal/thermal.h>
10 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #address-cells = <2>;
[all …]
/freebsd/sys/dev/bhnd/cores/chipc/
H A Dchipcreg.h1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
5 * Copyright (c) 2010-2015 Broadcom Corporation
10 * distributed with the Asus RT-N16 firmware source code release.
77 /* siba backplane configuration broadcast (siba-only) */
81 #define CHIPC_GPIOPU 0x58 /**< pull-up mask (rev >= 20) */
97 #define CHIPC_GPIOTIMERVAL 0x88 /**< gpio-based LED duty cycle (rev >= 16) */
100 /* clock control registers (non-PMU devices) */
114 #define CHIPC_PLL_SLOWCLK_CTL 0xB8 /* "slowclock" (rev 6-9) */
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra30-lg-x3.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/gpio-keys.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/mfd/max77620.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra30-cpu-opp.dtsi"
11 #include "tegra30-cpu-opp-microvolt.dtsi"
14 chassis-type = "handset";
30 * pre-existing /chosen node to be available to insert the
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H A Dtegra30-apalis-v1.1.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
16 avdd-pexa-supply = <&vdd2_reg>;
17 avdd-pexb-supply = <&vdd2_reg>;
18 avdd-pex-pll-suppl
[all...]
H A Dtegra30-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 avdd-pexa-supply = <&vdd2_reg>;
16 avdd-pexb-supply = <&vdd2_reg>;
17 avdd-pex-pll-suppl
[all...]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Ddra72-evm-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-2016 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
8 #include "dra7-ipu-dsp-commo
[all...]
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3308.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/clock/rk3308-cru.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra210.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra210-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra210-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/reset/tegra210-car.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/tegra124-soctherm.h>
10 #include <dt-bindings/soc/tegra-pmc.h>
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-sm1-sei610.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-sm1.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/meson-g12a-gpio.h>
12 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
23 mono_dac: audio-codec-0 {
25 #sound-dai-cells = <0>;
26 sound-name-prefix = "U16";
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsc7280.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/clock/qcom,camcc-sc7280.h>
8 #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7280.h>
11 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
12 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sc7280.h>
[all …]
/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-apq8060-dragonboard.dts1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/leds/common.h>
5 #include <dt-bindings/pinctrl/qcom,pmic-gpi
[all...]
H A Dqcom-ipq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mfd/qcom-rpm.h>
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
8 #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
11 #include <dt-bindings/soc/qcom,gsbi.h>
[all …]

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