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/linux/Documentation/devicetree/bindings/reset/
H A Dqcom,pdc-global.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/qcom,pdc-global.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PDC Global
10 - Sibi Sankar <quic_sibis@quicinc.com>
13 The bindings describes the reset-controller found on PDC-Global (Power Domain
19 - description: on SC7180 SoCs the following compatibles must be specified
21 - const: qcom,sc7180-pdc-global
22 - const: qcom,sdm845-pdc-global
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/linux/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,sc7280-adsp-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-adsp-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
19 - qcom,sc7280-adsp-pil
23 - description: qdsp6ss register
24 - description: efuse q6ss register
28 - description: Phandle to apps_smmu node with sid mask
32 - description: Watchdog interrupt
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H A Dqcom,sc7180-mss-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7180-mss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sibi Sankar <quic_sibis@quicinc.com>
19 - qcom,sc7180-mss-pil
23 - description: MSS QDSP6 registers
24 - description: RMB registers
26 reg-names:
28 - const: qdsp6
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H A Dqcom,sc7280-mss-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-mss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sibi Sankar <quic_sibis@quicinc.com>
19 - qcom,sc7280-mss-pil
23 - description: MSS QDSP6 registers
24 - description: RMB registers
26 reg-names:
28 - const: qdsp6
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/linux/drivers/reset/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
12 via GPIOs or SoC-internal reset controller modules.
94 GPIOs. Typically for OF platforms this driver expects "reset-gpios"
97 If compiled as module, it will be called reset-gpio.
146 Support for the Canaan Kendryte K210 RISC-V SoC reset controller.
155 Support for the Canaan Kendryte K230 RISC-V SoC reset controller.
213 for Qualcomm SDM845 SoCs. Say Y if you want to control
218 tristate "Qualcomm PDC Reset Driver"
221 This enables the PDC (Power Domain Controller) reset driver
222 for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
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/linux/arch/arm64/boot/dts/qcom/
H A Dsdm670.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * SDM670 SoC device tree source, adapted from SDM845 SoC device tree
9 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
12 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
13 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
14 #include <dt-bindings/clock/qcom,rpmh.h>
15 #include <dt-bindings/dma/qcom-gpi.h>
16 #include <dt-bindings/gpio/gpio.h>
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