Searched +full:sdm845 +full:- +full:pdc (Results 1 – 8 of 8) sorted by relevance
/linux/Documentation/devicetree/bindings/reset/ |
H A D | qcom,pdc-global.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/reset/qcom,pdc-global.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm PDC Global 10 - Sibi Sankar <quic_sibis@quicinc.com> 13 The bindings describes the reset-controller found on PDC-Global (Power Domain 19 - description: on SC7180 SoCs the following compatibles must be specified 21 - const: qcom,sc7180-pdc-global 22 - const: qcom,sdm845-pdc-global [all …]
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/linux/drivers/reset/ |
H A D | reset-qcom-pdc.c | 1 // SPDX-License-Identifier: GPL-2.0 10 #include <linux/reset-controller.h> 12 #include <dt-bindings/reset/qcom,sdm845-pdc.h> 34 .name = "pdc-reset", 92 u32 mask = BIT(data->desc->resets[idx].bit); in qcom_pdc_control_assert() 94 return regmap_update_bits(data->regmap, data->desc->offset, mask, mask); in qcom_pdc_control_assert() 101 u32 mask = BIT(data->desc->resets[idx].bit); in qcom_pdc_control_deassert() 103 return regmap_update_bits(data->regmap, data->desc->offset, mask, 0); in qcom_pdc_control_deassert() 115 struct device *dev = &pdev->dev; in qcom_pdc_reset_probe() 118 desc = device_get_match_data(&pdev->dev); in qcom_pdc_reset_probe() [all …]
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H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 12 via GPIOs or SoC-internal reset controller modules. 87 GPIOs. Typically for OF platforms this driver expects "reset-gpios" 90 If compiled as module, it will be called reset-gpio. 132 Support for the Canaan Kendryte K210 RISC-V SoC reset controller. 190 for Qualcomm SDM845 SoCs. Say Y if you want to control 195 tristate "Qualcomm PDC Reset Driver" 198 This enables the PDC (Power Domain Controller) reset driver 199 for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want 200 to control reset signals provided by PDC for Modem, Compute, [all …]
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/linux/Documentation/devicetree/bindings/remoteproc/ |
H A D | qcom,sc7280-adsp-pil.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-adsp-pil.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> 19 - qcom,sc7280-adsp-pil 23 - description: qdsp6ss register 24 - description: efuse q6ss register 28 - description: Phandle to apps_smmu node with sid mask 32 - description: Watchdog interrupt [all …]
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H A D | qcom,sc7180-mss-pil.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7180-mss-pil.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sibi Sankar <quic_sibis@quicinc.com> 19 - qcom,sc7180-mss-pil 23 - description: MSS QDSP6 registers 24 - description: RMB registers 26 reg-names: 28 - const: qdsp6 [all …]
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H A D | qcom,sc7280-mss-pil.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-mss-pil.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sibi Sankar <quic_sibis@quicinc.com> 19 - qcom,sc7280-mss-pil 23 - description: MSS QDSP6 registers 24 - description: RMB registers 26 reg-names: 28 - const: qdsp6 [all …]
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | x1e80100.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,rpmh.h> 7 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h> 8 #include <dt-bindings/clock/qcom,x1e80100-dispcc.h> 9 #include <dt-bindings/clock/qcom,x1e80100-gcc.h> 10 #include <dt-bindings/clock/qcom,x1e80100-gpucc.h> 11 #include <dt-bindings/clock/qcom,x1e80100-tcsr.h> 12 #include <dt-bindings/dma/qcom-gpi.h> 13 #include <dt-bindings/interconnect/qcom,icc.h> 14 #include <dt-bindings/interconnect/qcom,x1e80100-rpmh.h> [all …]
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H A D | sa8775p.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 7 #include <dt-bindings/interconnect/qcom,icc.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/qcom,rpmh.h> 10 #include <dt-bindings/clock/qcom,sa8775p-dispcc.h> 11 #include <dt-bindings/clock/qcom,sa8775p-gcc.h> 12 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h> 13 #include <dt-bindings/dma/qcom-gpi.h> 14 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h> 15 #include <dt-bindings/mailbox/qcom-ipcc.h> [all …]
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