/linux/Documentation/devicetree/bindings/mmc/ |
H A D | sdhci-st.txt | 1 * STMicroelectronics sdhci-st MMC/SD controller 5 used by the sdhci-st driver. 8 - compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-stih407" 13 - clock-names: Should be "mmc" and "icn". (NB: The latter is not compulsory) 14 See: Documentation/devicetree/bindings/resource-names.txt 15 - clocks: Phandle to the clock. 16 See: Documentation/devicetree/bindings/clock/clock-bindings.txt 18 - interrupts: One mmc interrupt should be described here. 19 - interrupt-names: Should be "mmcirq". 21 - pinctrl-names: A pinctrl state names "default" must be defined. [all …]
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H A D | sdhci-am654.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Ulf Hansson <ulf.hansson@linaro.org> 14 - $ref: sdhci-common.yaml# 19 - enum: 20 - ti,am62-sdhci 21 - ti,am64-sdhci-4bit [all …]
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H A D | cdns,sdhci.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Cadence SD/SDIO/eMMC Host Controller (SD4HC) 10 - Masahiro Yamada <yamada.masahiro@socionext.com> 15 - enum: 16 - amd,pensando-elba-sd4hc 17 - microchip,mpfs-sd4hc 18 - socionext,uniphier-sd4hc 19 - const: cdns,sd4hc [all …]
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H A D | mmc-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ulf Hansson <ulf.hansson@linaro.org> 25 "#address-cells": 30 "#size-cells": 37 broken-cd: 42 cd-gpios: 47 non-removable: [all …]
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H A D | brcm,sdhci-brcmstb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/brcm,sdhci-brcmstb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Al Cooper <alcooperx@gmail.com> 11 - Florian Fainelli <f.fainelli@gmail.com> 16 - items: 17 - enum: 18 - brcm,bcm7216-sdhci 19 - const: brcm,bcm7445-sdhci [all …]
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H A D | samsung,exynos-dw-mshc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mmc/samsung,exynos-dw-mshc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 12 - Jaehoon Chung <jh80.chung@samsung.com> 13 - Krzysztof Kozlowski <krzk@kernel.org> 18 - enum: 19 - axis,artpec8-dw-mshc 20 - samsung,exynos4210-dw-mshc 21 - samsung,exynos4412-dw-mshc [all …]
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/linux/arch/arm/boot/dts/st/ |
H A D | stih410-b2120.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 6 /dts-v1/; 8 #include "stihxxx-b2120.dtsi" 11 compatible = "st,stih410-b2120", "st,stih410"; 14 stdout-path = &sbc_serial0; 38 max-frequency = <200000000>; 39 sd-uhs-sdr50; 40 sd-uhs-sdr104; 41 sd-uhs-ddr50; 60 sti-display-subsystem@0 { [all …]
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H A D | stih418-b2199.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 11 compatible = "st,stih418-b2199", "st,stih418"; 14 stdout-path = &sbc_serial0; 28 compatible = "gpio-leds"; 29 led-red { 32 linux,default-trigger = "heartbeat"; 34 led-green { 36 default-state = "off"; [all …]
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H A D | stm32mp157c-ed1.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 6 /dts-v1/; 10 #include "stm32mp15-pinctrl.dtsi" 11 #include "stm32mp15xxaa-pinctrl.dtsi" 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/leds/common.h> 14 #include <dt-bindings/mfd/st,stpmic1.h> 18 compatible = "st,stm32mp157c-ed1", "st,stm32mp157"; 25 stdout-path = "serial0:115200n8"; [all …]
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/linux/drivers/mmc/core/ |
H A D | host.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * Copyright (C) 2007-2008 Pierre Ossman 24 #include <linux/mmc/slot-gpio.h> 29 #include "slot-gpio.h" 46 if (!host->bus_ops) in mmc_host_class_prepare() 50 if (host->bus_ops->pre_suspend) in mmc_host_class_prepare() 51 return host->bus_ops->pre_suspend(host); in mmc_host_class_prepare() 76 wakeup_source_unregister(host->ws); in mmc_host_classdev_release() 77 if (of_alias_get_id(host->parent->of_node, "mmc") < 0) in mmc_host_classdev_release() 78 ida_free(&mmc_host_ida, host->index); in mmc_host_classdev_release() [all …]
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H A D | debugfs.c | 1 // SPDX-License-Identifier: GPL-2.0-only 14 #include <linux/fault-inject.h> 20 #include <linux/mmc/sd.h> 58 struct mmc_host *host = s->private; in mmc_ios_show() 59 struct mmc_ios *ios = &host->ios; in mmc_ios_show() 62 seq_printf(s, "clock:\t\t%u Hz\n", ios->clock); in mmc_ios_show() 63 if (host->actual_clock) in mmc_ios_show() 64 seq_printf(s, "actual clock:\t%u Hz\n", host->actual_clock); in mmc_ios_show() 65 seq_printf(s, "vdd:\t\t%u ", ios->vdd); in mmc_ios_show() 66 if ((1 << ios->vdd) & MMC_VDD_165_195) in mmc_ios_show() [all …]
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H A D | sd.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * linux/drivers/mmc/core/sd.c 5 * Copyright (C) 2003-2004 Russell King, All Rights Reserved. 6 * SD support Copyright (C) 2004 Ian Molton, All Rights Reserved. 7 * Copyright (C) 2005-2007 Pierre Ossman, All Rights Reserved. 22 #include <linux/mmc/sd.h> 30 #include "sd.h" 72 u32 *resp = card->raw_cid; in mmc_decode_cid() 78 add_device_randomness(&card->raw_cid, sizeof(card->raw_cid)); in mmc_decode_cid() 81 * SD doesn't currently have a version field so we will in mmc_decode_cid() [all …]
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/linux/arch/arm64/boot/dts/amd/ |
H A D | elba.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 * Copyright 2020-2022 Advanced Micro Devices, Inc. 6 #include <dt-bindings/gpio/gpio.h> 7 #include "dt-bindings/interrupt-controller/arm-gic.h" 11 compatible = "amd,pensando-elba"; 12 interrupt-parent = <&gic>; 13 #address-cells = <2>; 14 #size-cells = <2>; 16 dma-coherent; 19 compatible = "fixed-clock"; [all …]
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/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3288-firefly-reload.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 8 #include "rk3288-firefly-reload-core.dtsi" 11 model = "Firefly-RK3288-reload"; 12 compatible = "firefly,firefly-rk3288-reload", "rockchip,rk3288"; 14 adc-keys { 15 compatible = "adc-keys"; 16 io-channels = <&saradc 1>; 17 io-channel-names = "buttons"; 18 keyup-threshold-microvolt = <1800000>; [all …]
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/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx6qdl-skov-cpu.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/leds/common.h> 10 stdout-path = &uart2; 19 mdio-gpio0 = &mdio; 28 iio-hwmon { 29 compatible = "iio-hwmon"; 30 io-channels = <&adc 0>, /* 24V */ 35 compatible = "gpio-leds"; 37 led-0 { [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8mm-phg.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "imx8mm-tqma8mqml.dtsi" 12 compatible = "cloos,imx8mm-phg", "tq,imx8mm-tqma8mqml", "fsl,imx8mm"; 20 stdout-path = &uart2; 24 compatible = "gpio-beeper"; 25 pinctrl-0 = <&pinctrl_beeper>; 30 compatible = "gpio-leds"; 31 pinctrl-names = "default"; 32 pinctrl-0 = <&pinctrl_gpio_led>; [all …]
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/linux/arch/arm64/boot/dts/xilinx/ |
H A D | zynqmp-sck-kv-g-revB.dtso | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2020 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/net/ti-dp83867.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 16 /dts-v1/; 20 compatible = "xlnx,zynqmp-sk-kv260-rev2", 21 "xlnx,zynqmp-sk-kv260-rev1", [all …]
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/linux/drivers/mmc/host/ |
H A D | sdhci-cadence.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 17 #include "sdhci-pltfm.h" 19 /* HRS - Host Register Set (specific to Cadence) */ 39 /* SRS - Slot Register Set (SDHCI-compatible) */ 57 * The tuned val register is 6 bit-wide, but not the whole of the range is 58 * available. The range 0-42 seems to be available (then 43 wraps around to 0) 90 { "cdns,phy-input-delay-sd-highspeed", SDHCI_CDNS_PHY_DLY_SD_HS, }, 91 { "cdns,phy-input-delay-legacy", SDHCI_CDNS_PHY_DLY_SD_DEFAULT, }, 92 { "cdns,phy-input-delay-sd-uhs-sdr12", SDHCI_CDNS_PHY_DLY_UHS_SDR12, }, 93 { "cdns,phy-input-delay-sd-uhs-sdr25", SDHCI_CDNS_PHY_DLY_UHS_SDR25, }, [all …]
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H A D | sdhci-of-arasan.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 4 * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu> 9 * Based on sdhci-of-esdhc.c 18 #include <linux/clk-provider.h> 26 #include <linux/firmware/xlnx-zynqmp.h> 29 #include "sdhci-cqhci.h" 30 #include "sdhci-pltfm.h" 92 * On some SoCs the syscon area has a feature where the upper 16-bits of 93 * each 32-bit register act as a write mask for the lower 16-bits. This allows 101 * struct sdhci_arasan_soc_ctl_field - Field used in sdhci_arasan_soc_ctl_map [all …]
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H A D | sdhci.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * linux/drivers/mmc/host/sdhci.h - Secure Digital Host Controller Interface driver 7 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved. 103 * VDD2 - UHS2 or PCIe/NVMe 174 #define SDHCI_INT_ALL_MASK ((unsigned int)-1) 196 #define SDHCI_CTRL_HS400 0x0005 /* Non-standard */ 243 #define SDHCI_SUPPORT_HS400 0x80000000 /* Non-standard */ 252 /* 4C-4F reserved for more max current */ 259 /* 55-57 reserved */ 264 /* 60-FB reserved */ [all …]
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/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3588-jaguar.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/usb/pd.h> 15 model = "Theobroma Systems RK3588-SBC Jaguar"; 16 compatible = "tsd,rk3588-jaguar", "rockchip,rk3588"; 18 adc-keys { [all …]
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/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos5420-arndale-octa.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 11 #include "exynos5420-cpus.dtsi" 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/input/input.h> 15 #include <dt-bindings/clock/samsung,s2mps11.h> 19 compatible = "insignal,arndale-octa", "samsung,exynos5420", "samsung,exynos5"; 32 stdout-path = "serial3:115200n8"; 36 compatible = "samsung,secure-firmware"; [all …]
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H A D | exynos5422-odroid-core.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Hardkernel Odroid XU3/XU3-Lite/XU4/HC1 boards core device tree source 6 * Copyright (c) 2013-2017 Samsung Electronics Co., Ltd. 10 #include <dt-bindings/clock/samsung,s2mps11.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/gpio/gpio.h> 14 #include "exynos5422-cpus.dtsi" 27 stdout-path = "serial2:115200n8"; 31 compatible = "samsung,secure-firmware"; 35 fixed-rate-clocks { [all …]
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/linux/arch/powerpc/boot/dts/ |
H A D | fsp2.dts | 12 /dts-v1/; 15 #address-cells = <2>; 16 #size-cells = <1>; 19 dcr-parent = <&{/cpus/cpu@0}>; 28 #address-cells = <1>; 29 #size-cells = <0>; 35 clock-frequency = <0>; /* Filled in by cuboot */ 36 timebase-frequency = <0>; /* Filled in by cuboot */ 37 i-cache-line-size = <32>; 38 d-cache-line-size = <32>; [all …]
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | msm8916-samsung-serranove.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 6 /dts-v1/; 8 #include "msm8916-pm8916.dtsi" 9 #include "msm8916-modem-qdsp6.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 24 * arch/arm/boot/dts/qcom-msm8916-samsung-serranove.dts 30 chassis-type = "handset"; 34 mmc1 = &sdhc_2; /* SD card */ [all …]
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