/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | ti,sci-intr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/ti,sci-intr.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lokesh Vutla <lokeshvutla@ti.com> 13 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# 16 The Interrupt Router (INTR) module provides a mechanism to mux M 22 +----------------------+ 24 +-------+ | +------+ +-----+ | 25 | GPIO |----------->| | irq0 | | 0 | | Host IRQ [all …]
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/linux/arch/arm64/boot/dts/ti/ |
H A D | k3-am65-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 dmsc: system-controller@44083000 { 10 compatible = "ti,am654-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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H A D | k3-am64-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 15 compatible = "ti,am654-timer"; 18 clock-names = "fck"; 19 power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>; 20 ti,timer-pwm; 25 compatible = "ti,am654-timer"; 28 clock-names = "fck"; 29 power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>; 30 ti,timer-pwm; [all …]
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H A D | k3-am62-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 bootph-all; 11 compatible = "pinctrl-single"; 13 #pinctrl-cells = <1>; 14 pinctrl-single,register-width = <32>; 15 pinctrl-single,function-mask = <0xffffffff>; 19 bootph-pre-ram; 20 compatible = "ti,j721e-esm"; 23 ti,esm-pins = <0>, <1>, <2>, <85>; [all …]
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H A D | k3-am62p-j722s-common-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "pinctrl-single"; 12 #pinctrl-cells = <1>; 13 pinctrl-single,register-width = <32>; 14 pinctrl-single,function-mask = <0xffffffff>; 15 pinctrl-single,gpio-range = 19 bootph-all; 21 mcu_pmx_range: gpio-range { 22 #pinctrl-single,gpio-range-cells = <3>; [all …]
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H A D | k3-am62a-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "pinctrl-single"; 12 #pinctrl-cells = <1>; 13 pinctrl-single,register-width = <32>; 14 pinctrl-single,function-mask = <0xffffffff>; 19 compatible = "ti,j721e-esm"; 21 bootph-pre-ram; 23 ti,esm-pins = <0>, <1>, <2>, <85>; 32 compatible = "ti,am654-timer"; [all …]
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H A D | k3-j721e-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 dmsc: system-controller@44083000 { 10 compatible = "ti,k2g-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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H A D | k3-j721s2-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 sms: system-controller@44083000 { 10 compatible = "ti,k2g-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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H A D | k3-am65-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy-am654-serdes.h> 11 compatible = "mmio-sram"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 atf-sram@0 { 21 sysfw-sram@f0000 { 25 l3cache-sram@100000 { 30 gic500: interrupt-controller@1800000 { [all …]
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/linux/drivers/net/ethernet/marvell/octeontx2/af/ |
H A D | mcs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 105 u64 sci; member 161 void (*mcs_bbe_intr_handler)(struct mcs *mcs, u64 intr, enum mcs_direction dir); 162 void (*mcs_pab_intr_handler)(struct mcs *mcs, u64 intr, enum mcs_direction dir); 169 writeq(val, mcs->reg_base + offset); in mcs_reg_write() 174 return readq(mcs->reg_base + offset); in mcs_reg_read() 191 void mcs_rx_sc_cam_write(struct mcs *mcs, u64 sci, u64 secy, int sc_id); 212 /* CN10K-B APIs */ 218 void cn10kb_mcs_pab_intr_handler(struct mcs *mcs, u64 intr, enum mcs_direction dir); 219 void cn10kb_mcs_bbe_intr_handler(struct mcs *mcs, u64 intr, enum mcs_direction dir); [all …]
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H A D | mcs_cnf10kb.c | 1 // SPDX-License-Identifier: GPL-2.0 27 struct hwinfo *hw = mcs->hw; in cnf10kb_mcs_set_hw_capabilities() 29 hw->tcam_entries = 64; /* TCAM entries */ in cnf10kb_mcs_set_hw_capabilities() 30 hw->secy_entries = 64; /* SecY entries */ in cnf10kb_mcs_set_hw_capabilities() 31 hw->sc_entries = 64; /* SC CAM entries */ in cnf10kb_mcs_set_hw_capabilities() 32 hw->sa_entries = 128; /* SA entries */ in cnf10kb_mcs_set_hw_capabilities() 33 hw->lmac_cnt = 4; /* lmacs/ports per mcs block */ in cnf10kb_mcs_set_hw_capabilities() 34 hw->mcs_x2p_intf = 1; /* x2p clabration intf */ in cnf10kb_mcs_set_hw_capabilities() 35 hw->mcs_blks = 7; /* MCS blocks */ in cnf10kb_mcs_set_hw_capabilities() 36 hw->ip_vec = MCS_CNF10KB_INT_VEC_IP; /* IP vector */ in cnf10kb_mcs_set_hw_capabilities() [all …]
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H A D | mcs.c | 1 // SPDX-License-Identifier: GPL-2.0 32 stats->ctl_pkt_bcast_cnt = mcs_reg_read(mcs, reg); in mcs_get_tx_secy_stats() 35 stats->ctl_pkt_mcast_cnt = mcs_reg_read(mcs, reg); in mcs_get_tx_secy_stats() 38 stats->ctl_octet_cnt = mcs_reg_read(mcs, reg); in mcs_get_tx_secy_stats() 41 stats->ctl_pkt_ucast_cnt = mcs_reg_read(mcs, reg); in mcs_get_tx_secy_stats() 44 stats->unctl_pkt_bcast_cnt = mcs_reg_read(mcs, reg); in mcs_get_tx_secy_stats() 47 stats->unctl_pkt_mcast_cnt = mcs_reg_read(mcs, reg); in mcs_get_tx_secy_stats() 50 stats->unctl_octet_cnt = mcs_reg_read(mcs, reg); in mcs_get_tx_secy_stats() 53 stats->unctl_pkt_ucast_cnt = mcs_reg_read(mcs, reg); in mcs_get_tx_secy_stats() 56 stats->octet_encrypted_cnt = mcs_reg_read(mcs, reg); in mcs_get_tx_secy_stats() [all …]
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/linux/arch/arm/boot/dts/ti/keystone/ |
H A D | keystone-k2g.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/pinctrl/keystone.h> 10 #include <dt-bindings/gpio/gpio.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; 32 #address-cells = <1>; 33 #size-cells = <0>; [all …]
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/linux/Documentation/devicetree/bindings/spi/ |
H A D | spi-davinci.txt | 4 Keystone 2 - https://www.ti.com/lit/ug/sprugp2a/sprugp2a.pdf 5 dm644x - https://www.ti.com/lit/ug/sprue32a/sprue32a.pdf 6 OMAP-L138/da830 - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf 9 - #address-cells: number of cells required to define a chip select 11 - #size-cells: should be zero. 12 - compatible: 13 - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family 14 - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family 15 - "ti,keystone-spi" for SPI used similar to that on Keystone2 SoC 17 - reg: Offset and length of SPI controller register space [all …]
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/linux/drivers/irqchip/ |
H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_IRQCHIP) += irqchip.o 4 obj-$(CONFIG_AL_FIC) += irq-al-fic.o 5 obj-$(CONFIG_ALPINE_MSI) += irq-alpine-msi.o 6 obj-$(CONFIG_ATH79) += irq-ath79-cpu.o 7 obj-$(CONFIG_ATH79) += irq-ath79-misc.o 8 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o 9 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o 10 obj-$(CONFIG_ARCH_ACTIONS) += irq-owl-sirq.o 11 obj-$(CONFIG_DAVINCI_CP_INTC) += irq-davinci-cp-intc.o [all …]
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H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 119 tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver" 127 tristate "Broadcom STB 7120-style L2 interrupt controller driver" 181 will be called irq-lan966x-oic. 222 bool "J-Core integrated AIC" if COMPILE_TEST 226 Support for the J-Core integrated AIC. 237 interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs. 240 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST 245 devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs. 302 tristate "TS-4800 IRQ controller" [all …]
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/linux/drivers/platform/x86/ |
H A D | asus-tf103c-dock.c | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * keyboard dock for the Asus TF103C 2-in-1 tablet. 35 "can be pressed to change this to F1-F12. Set this to 1 to " 126 .dev_id = "i2c-" TF103C_DOCK_DEV_NAME, 172 struct i2c_client *client = dock->kbd_client; in tf103c_dock_kbd_read() 173 struct device *dev = &dock->ec_client->dev; in tf103c_dock_kbd_read() 181 msgs[0].addr = client->addr; in tf103c_dock_kbd_read() 186 msgs[1].addr = client->addr; in tf103c_dock_kbd_read() 189 msgs[1].buf = dock->kbd_buf; in tf103c_dock_kbd_read() 191 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); in tf103c_dock_kbd_read() [all …]
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/linux/drivers/infiniband/hw/hfi1/ |
H A D | pio.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 3 * Copyright(c) 2015-2017 Intel Corporation. 21 /* PIO release codes - in bits, as there could more than one that apply */ 28 #define PRC_SC_DISABLE 0x20 /* clean-up after a context disable */ 55 /* per-NUMA send context */ 57 /* read-only after init */ 91 u32 credit_intr_count; /* count of credit intr users */ 132 * Since the mapping now allows for non-uniform send contexts per vl, the 148 * dd->pio_map 150 * | +--------------------+ [all …]
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/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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/linux/include/linux/mlx5/ |
H A D | mlx5_ifc.h | 2 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved. 14 * - Redistributions of source code must retain the above 18 * - Redistributions in binary form must reproduce the above 421 /* Table 2170 - Flow Table Fields Supported 2 Format */ 4567 u8 intr[0xc]; member 12656 u8 sci[0x40]; member
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