Searched +full:rp1 +full:- +full:clocks (Results 1 – 6 of 6) sorted by relevance
/linux/Documentation/devicetree/bindings/clock/ |
H A D | raspberrypi,rp1-clocks.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/raspberrypi,rp1-clocks.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: RaspberryPi RP1 clock generator 10 - A. della Porta <andrea.porta@suse.com> 13 The RP1 contains a clock generator designed as three PLLs (CORE, AUDIO, 15 the clocks to drive the sub-peripherals embedded inside the chipset. 18 https://datasheets.raspberrypi.com/rp1/rp1-peripherals.pdf 22 const: raspberrypi,rp1-clocks [all …]
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/linux/Documentation/devicetree/bindings/misc/ |
H A D | pci1de4,1.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: RaspberryPi RP1 MFD PCI device 10 - A. della Porta <andrea.porta@suse.com> 13 The RaspberryPi RP1 is a PCI multi function device containing 19 - $ref: /schemas/pci/pci-ep-bus.yaml 26 - const: pci1de4,1 28 '#interrupt-cells': 32 in include/dt-bindings/interrupt-controller/irq.h. [all …]
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/linux/drivers/clk/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs 67 generators of audio clocks. 87 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each. 91 tristate "Raspberry Pi RP1-based clock support" 95 Enable common clock framework support for Raspberry Pi RP1. 96 This multi-function device has 3 main PLLs and several clock 97 generators to drive the internal sub-peripherals. 106 multi-function device has one fixed-rate oscillator, clocked 113 This driver provides support for clocks that are controlled [all …]
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/linux/arch/arm/boot/dts/ti/keystone/ |
H A D | keystone-k2l.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2014-2017 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/reset/ti-syscon.h> 15 #address-cells = <1>; 16 #size-cells = <0>; 18 interrupt-parent = <&gic>; 21 compatible = "arm,cortex-a15"; 27 compatible = "arm,cortex-a15"; 42 /include/ "keystone-k2l-clocks.dtsi" 45 compatible = "ti,da830-uart", "ns16550a"; [all …]
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/linux/drivers/pci/controller/plda/ |
H A D | pcie-starfive.c | 1 // SPDX-License-Identifier: GPL-2.0+ 27 #include "pcie-plda.h" 67 * JH7110 PCIe port BAR0/1 can be configured as 64-bit prefetchable memory 110 pcie->num_clks = devm_clk_bulk_get_all(dev, &pcie->clks); in starfive_pcie_parse_dt() 111 if (pcie->num_clks < 0) in starfive_pcie_parse_dt() 112 return dev_err_probe(dev, pcie->num_clks, in starfive_pcie_parse_dt() 113 "failed to get pcie clocks\n"); in starfive_pcie_parse_dt() 115 pcie->resets = devm_reset_control_array_get_exclusive(dev); in starfive_pcie_parse_dt() 116 if (IS_ERR(pcie->resets)) in starfive_pcie_parse_dt() 117 return dev_err_probe(dev, PTR_ERR(pcie->resets), in starfive_pcie_parse_dt() [all …]
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/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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