/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk356x-base.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3568-cru.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3568-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; [all …]
|
H A D | rk3568.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include "rk356x-base.dtsi" 9 compatible = "rockchip,rk3568"; 11 cpu0_opp_table: opp-table-0 { 12 compatible = "operating-points-v2"; 13 opp-shared; 15 opp-408000000 { 16 opp-hz = /bits/ 64 <408000000>; 17 opp-microvolt = <850000 850000 1150000>; 18 clock-latency-ns = <40000>; [all …]
|
H A D | rk3568-nanopi-r5c.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 9 /dts-v1/; 10 #include "rk3568-nanopi-r5s.dtsi" 14 compatible = "friendlyarm,nanopi-r5c", "rockchip,rk3568"; 16 gpio-keys { 17 compatible = "gpio-keys"; 18 pinctrl-names = "default"; 19 pinctrl-0 = <&reset_button_pin>; 21 button-reset { 22 debounce-interval = <50>; [all …]
|
H A D | rk3568-nanopi-r5s.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 9 /dts-v1/; 10 #include "rk3568-nanopi-r5s.dtsi" 14 compatible = "friendlyarm,nanopi-r5s", "rockchip,rk3568"; 20 gpio-leds { 21 compatible = "gpio-leds"; 22 pinctrl-names = "default"; 23 pinctrl-0 = <&lan1_led_pin>, <&lan2_led_pin>, <&power_led_pin>, <&wan_led_pin>; 25 led-lan1 { 28 function-enumerator = <1>; [all …]
|
H A D | rk3588-extra.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include "rk3588-base.dtsi" 7 #include "rk3588-extra-pinctrl.dtsi" 11 compatible = "rockchip,rk3588-dwc3", "snps,dwc3"; 16 clock-names = "ref_clk", "suspend_clk", "bus_clk"; 19 phy-names = "usb2-phy", "usb3-phy"; 21 power-domains = <&power RK3588_PD_USB>; 24 snps,dis-u2-freeclk-exists-quirk; 25 snps,dis-del-phy-power-chg-quirk; 26 snps,dis-tx-ipgap-linecheck-quirk; [all …]
|
H A D | rk3568-wolfvision-pf5-display.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 8 /dts-v1/; 11 #include <dt-bindings/clock/rk3568-cru.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/pinctrl/rockchip.h> 15 #include <dt-bindings/soc/rockchip,vop2.h> 19 compatible = "pwm-backlight"; 20 brightness-levels = <0 255>; 21 default-brightness-level = <255>; [all …]
|
H A D | rk3588-base.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rockchip,rk3588-cru.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/power/rk3588-power.h> 10 #include <dt-bindings/reset/rockchip,rk3588-cru.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/ata/ahci.h> 13 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; [all …]
|
/linux/Documentation/devicetree/bindings/display/rockchip/ |
H A D | rockchip-vop2.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 15 - Sandy Huang <hjc@rock-chips.com> 16 - Heiko Stuebner <heiko@sntech.de> 21 - rockchip,rk3566-vop 22 - rockchip,rk3568-vop 23 - rockchip,rk3588-vop 27 - description: [all …]
|
H A D | rockchip,dw-mipi-dsi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-mipi-dsi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sandy Huang <hjc@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 16 - enum: 17 - rockchip,px30-mipi-dsi 18 - rockchip,rk3128-mipi-dsi 19 - rockchip,rk3288-mipi-dsi [all …]
|
H A D | rockchip,dw-hdmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Mark Yao <markyao0591@gmail.com> 17 - $ref: ../bridge/synopsys,dw-hdmi.yaml# 18 - $ref: /schemas/sound/dai-common.yaml# 23 - rockchip,rk3228-dw-hdmi 24 - rockchip,rk3288-dw-hdmi 25 - rockchip,rk3328-dw-hdmi [all …]
|
/linux/Documentation/devicetree/bindings/pci/ |
H A D | rockchip-dw-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/rockchip-dw-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shawn Lin <shawn.lin@rock-chips.com> 11 - Simon Xue <xxm@rock-chips.com> 12 - Heiko Stuebner <heiko@sntech.de> 15 RK3568 SoC PCIe Root Complex controller is based on the Synopsys DesignWare 17 snps,dw-pcie.yaml. 20 - $ref: /schemas/pci/snps,dw-pcie.yaml# [all …]
|
H A D | rockchip-dw-pcie-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/rockchip-dw-pcie-ep.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Niklas Cassel <cassel@kernel.org> 15 snps,dw-pcie-ep.yaml. 18 - $ref: /schemas/pci/snps,dw-pcie-ep.yaml# 19 - $ref: /schemas/pci/rockchip-dw-pcie-common.yaml# 24 - rockchip,rk3568-pcie-ep 25 - rockchip,rk3588-pcie-ep [all …]
|
/linux/Documentation/devicetree/bindings/arm/rockchip/ |
H A D | pmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip Power Management Unit (PMU) 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 14 The PMU is used to turn on and off different power domains of the SoCs. 15 This includes the power to the CPU cores. 22 - rockchip,px30-pmu 23 - rockchip,rk3066-pmu [all …]
|
/linux/Documentation/devicetree/bindings/mmc/ |
H A D | snps,dwcmshc-sdhci.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/mmc/snps,dwcmshc-sdhci.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ulf Hansson <ulf.hansson@linaro.org> 11 - Jisheng Zhang <Jisheng.Zhang@synaptics.com> 16 - items: 17 - const: rockchip,rk3576-dwcmshc 18 - const: rockchip,rk3588-dwcmshc 19 - enum: [all …]
|
H A D | rockchip-dw-mshc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 13 controller that are not already included in the synopsys-dw-mshc-common.yaml 17 - $ref: synopsys-dw-mshc-common.yaml# 20 - Heiko Stuebner <heiko@sntech.de> 27 - const: rockchip,rk2928-dw-mshc 29 - const: rockchip,rk3288-dw-mshc 30 - items: [all …]
|
/linux/Documentation/devicetree/bindings/ata/ |
H A D | rockchip,dwc-ahci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/ata/rockchip,dwc-ahci.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Serge Semin <fancer.lancer@gmail.com> 22 - rockchip,rk3568-dwc-ahci 23 - rockchip,rk3588-dwc-ahci 25 - compatible 30 - enum: 31 - rockchip,rk3568-dwc-ahci [all …]
|
/linux/Documentation/devicetree/bindings/power/ |
H A D | rockchip-io-domain.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/rockchip-io-domain.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 29 should have power or not have power 42 to report their voltage. The IO Voltage Domain for any non-specified 48 - rockchip,px30-io-voltage-domain 49 - rockchip,px30-pmu-io-voltage-domain 50 - rockchip,rk3188-io-voltage-domain [all …]
|
H A D | rockchip,power-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip Power Domains 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 14 Rockchip processors include support for multiple power domains 16 application scenarios to save power. 18 Power domains contained within power-controller node are [all …]
|
/linux/Documentation/devicetree/bindings/sound/ |
H A D | rockchip,i2s-tdm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/rockchip,i2s-tdm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 15 - Nicolas Frattaroli <frattaroli.nicolas@gmail.com> 18 - $ref: dai-common.yaml# 23 - rockchip,px30-i2s-tdm 24 - rockchip,rk1808-i2s-tdm 25 - rockchip,rk3308-i2s-tdm 26 - rockchip,rk3568-i2s-tdm [all …]
|
H A D | rockchip-spdif.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/sound/rockchip-spdif.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 15 - Heiko Stuebner <heiko@sntech.de> 20 - const: rockchip,rk3066-spdif 21 - const: rockchip,rk3228-spdif 22 - const: rockchip,rk3328-spdif 23 - const: rockchip,rk3366-spdif 24 - const: rockchip,rk3368-spdif [all …]
|
H A D | rockchip,pdm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 17 - Heiko Stuebner <heiko@sntech.de> 20 - $ref: dai-common.yaml# 25 - rockchip,pdm 26 - rockchip,px30-pdm 27 - rockchip,rk1808-pdm 28 - rockchip,rk3308-pdm 29 - rockchip,rk3568-pdm [all …]
|
/linux/Documentation/devicetree/bindings/phy/ |
H A D | rockchip-inno-csi-dphy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/rockchip-inno-csi-dphy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip SoC MIPI RX0 D-PHY 10 - Heiko Stuebner <heiko@sntech.de> 13 The Rockchip SoC has a MIPI CSI D-PHY based on an Innosilicon IP which 19 - rockchip,px30-csi-dphy 20 - rockchip,rk1808-csi-dphy 21 - rockchip,rk3326-csi-dphy [all …]
|
H A D | rockchip,px30-dsi-dphy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/rockchip,px30-dsi-dphy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 13 "#phy-cells": 18 - rockchip,px30-dsi-dphy 19 - rockchip,rk3128-dsi-dphy 20 - rockchip,rk3368-dsi-dphy 21 - rockchip,rk3568-dsi-dphy [all …]
|
/linux/Documentation/devicetree/bindings/media/ |
H A D | rockchip-rga.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/media/rockchip-rga.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 15 - Jacob Chen <jacob-chen@iotwrt.com> 16 - Ezequiel Garcia <ezequiel@collabora.com> 21 - const: rockchip,rk3288-rga 22 - const: rockchip,rk3399-rga 23 - items: 24 - enum: [all …]
|
/linux/Documentation/devicetree/bindings/spi/ |
H A D | spi-rockchip.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/spi/spi-rockchip.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 14 - $ref: spi-controller.yaml# 17 - Heiko Stuebner <heiko@sntech.de> 23 - const: rockchip,rk3036-spi 24 - const: rockchip,rk3066-spi 25 - const: rockchip,rk3228-spi 26 - const: rockchip,rv1108-spi [all …]
|