18ece5ef6SSugar Zhang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 28ece5ef6SSugar Zhang%YAML 1.2 38ece5ef6SSugar Zhang--- 48ece5ef6SSugar Zhang$id: http://devicetree.org/schemas/sound/rockchip,pdm.yaml# 58ece5ef6SSugar Zhang$schema: http://devicetree.org/meta-schemas/core.yaml# 68ece5ef6SSugar Zhang 78ece5ef6SSugar Zhangtitle: Rockchip PDM controller 88ece5ef6SSugar Zhang 98ece5ef6SSugar Zhangdescription: 108ece5ef6SSugar Zhang The Pulse Density Modulation Interface Controller (PDMC) is 118ece5ef6SSugar Zhang a PDM interface controller and decoder that support PDM format. 128ece5ef6SSugar Zhang It integrates a clock generator driving the PDM microphone 138ece5ef6SSugar Zhang and embeds filters which decimate the incoming bit stream to 148ece5ef6SSugar Zhang obtain most common audio rates. 158ece5ef6SSugar Zhang 168ece5ef6SSugar Zhangmaintainers: 178ece5ef6SSugar Zhang - Heiko Stuebner <heiko@sntech.de> 188ece5ef6SSugar Zhang 19*58ae9a2aSKrzysztof KozlowskiallOf: 20*58ae9a2aSKrzysztof Kozlowski - $ref: dai-common.yaml# 21*58ae9a2aSKrzysztof Kozlowski 228ece5ef6SSugar Zhangproperties: 238ece5ef6SSugar Zhang compatible: 248ece5ef6SSugar Zhang enum: 258ece5ef6SSugar Zhang - rockchip,pdm 268ece5ef6SSugar Zhang - rockchip,px30-pdm 278ece5ef6SSugar Zhang - rockchip,rk1808-pdm 288ece5ef6SSugar Zhang - rockchip,rk3308-pdm 298ece5ef6SSugar Zhang - rockchip,rk3568-pdm 308ece5ef6SSugar Zhang - rockchip,rv1126-pdm 318ece5ef6SSugar Zhang 328ece5ef6SSugar Zhang reg: 338ece5ef6SSugar Zhang maxItems: 1 348ece5ef6SSugar Zhang 358ece5ef6SSugar Zhang interrupts: 368ece5ef6SSugar Zhang maxItems: 1 378ece5ef6SSugar Zhang 388ece5ef6SSugar Zhang clocks: 398ece5ef6SSugar Zhang items: 408ece5ef6SSugar Zhang - description: clock for PDM controller 418ece5ef6SSugar Zhang - description: clock for PDM BUS 428ece5ef6SSugar Zhang 438ece5ef6SSugar Zhang clock-names: 448ece5ef6SSugar Zhang items: 458ece5ef6SSugar Zhang - const: pdm_clk 468ece5ef6SSugar Zhang - const: pdm_hclk 478ece5ef6SSugar Zhang 488ece5ef6SSugar Zhang dmas: 498ece5ef6SSugar Zhang maxItems: 1 508ece5ef6SSugar Zhang 518ece5ef6SSugar Zhang dma-names: 528ece5ef6SSugar Zhang items: 538ece5ef6SSugar Zhang - const: rx 548ece5ef6SSugar Zhang 558ece5ef6SSugar Zhang power-domains: 568ece5ef6SSugar Zhang maxItems: 1 578ece5ef6SSugar Zhang 588ece5ef6SSugar Zhang resets: 598ece5ef6SSugar Zhang items: 608ece5ef6SSugar Zhang - description: reset for PDM controller 618ece5ef6SSugar Zhang 628ece5ef6SSugar Zhang reset-names: 638ece5ef6SSugar Zhang items: 648ece5ef6SSugar Zhang - const: pdm-m 658ece5ef6SSugar Zhang 668ece5ef6SSugar Zhang rockchip,path-map: 678ece5ef6SSugar Zhang $ref: /schemas/types.yaml#/definitions/uint32-array 688ece5ef6SSugar Zhang description: 698ece5ef6SSugar Zhang Defines the mapping of PDM SDIx to PDM PATHx. 708ece5ef6SSugar Zhang By default, they are mapped one-to-one. 718ece5ef6SSugar Zhang maxItems: 4 728ece5ef6SSugar Zhang uniqueItems: true 738ece5ef6SSugar Zhang items: 748ece5ef6SSugar Zhang enum: [ 0, 1, 2, 3 ] 758ece5ef6SSugar Zhang 768ece5ef6SSugar Zhang "#sound-dai-cells": 778ece5ef6SSugar Zhang const: 0 788ece5ef6SSugar Zhang 798ece5ef6SSugar Zhangrequired: 808ece5ef6SSugar Zhang - compatible 818ece5ef6SSugar Zhang - reg 828ece5ef6SSugar Zhang - interrupts 838ece5ef6SSugar Zhang - clocks 848ece5ef6SSugar Zhang - clock-names 858ece5ef6SSugar Zhang - dmas 868ece5ef6SSugar Zhang - dma-names 878ece5ef6SSugar Zhang - "#sound-dai-cells" 888ece5ef6SSugar Zhang 89*58ae9a2aSKrzysztof KozlowskiunevaluatedProperties: false 908ece5ef6SSugar Zhang 918ece5ef6SSugar Zhangexamples: 928ece5ef6SSugar Zhang - | 938ece5ef6SSugar Zhang #include <dt-bindings/clock/rk3328-cru.h> 948ece5ef6SSugar Zhang #include <dt-bindings/interrupt-controller/arm-gic.h> 958ece5ef6SSugar Zhang #include <dt-bindings/interrupt-controller/irq.h> 968ece5ef6SSugar Zhang #include <dt-bindings/pinctrl/rockchip.h> 978ece5ef6SSugar Zhang 988ece5ef6SSugar Zhang bus { 998ece5ef6SSugar Zhang #address-cells = <2>; 1008ece5ef6SSugar Zhang #size-cells = <2>; 1018ece5ef6SSugar Zhang 1028ece5ef6SSugar Zhang pdm@ff040000 { 1038ece5ef6SSugar Zhang compatible = "rockchip,pdm"; 1048ece5ef6SSugar Zhang reg = <0x0 0xff040000 0x0 0x1000>; 1058ece5ef6SSugar Zhang interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 1068ece5ef6SSugar Zhang clocks = <&cru SCLK_PDM>, <&cru HCLK_PDM>; 1078ece5ef6SSugar Zhang clock-names = "pdm_clk", "pdm_hclk"; 1088ece5ef6SSugar Zhang dmas = <&dmac 16>; 1098ece5ef6SSugar Zhang dma-names = "rx"; 1108ece5ef6SSugar Zhang #sound-dai-cells = <0>; 1118ece5ef6SSugar Zhang pinctrl-names = "default", "sleep"; 1128ece5ef6SSugar Zhang pinctrl-0 = <&pdmm0_clk 1138ece5ef6SSugar Zhang &pdmm0_sdi0 1148ece5ef6SSugar Zhang &pdmm0_sdi1 1158ece5ef6SSugar Zhang &pdmm0_sdi2 1168ece5ef6SSugar Zhang &pdmm0_sdi3>; 1178ece5ef6SSugar Zhang pinctrl-1 = <&pdmm0_clk_sleep 1188ece5ef6SSugar Zhang &pdmm0_sdi0_sleep 1198ece5ef6SSugar Zhang &pdmm0_sdi1_sleep 1208ece5ef6SSugar Zhang &pdmm0_sdi2_sleep 1218ece5ef6SSugar Zhang &pdmm0_sdi3_sleep>; 1228ece5ef6SSugar Zhang }; 1238ece5ef6SSugar Zhang }; 124