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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp1 //===- ARMAsmParser.cpp - Parse ARM assembly to MCInst instructions -------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
71 #define DEBUG_TYPE "asm-parser"
81 "arm-implicit-it", cl::init(ImplicitItModeTy::ARMOnly),
92 static cl::opt<bool> AddBuildAttributes("arm-add-build-attributes",
101 // of Mask, and so on downwards. So (5 - Position) will shift the in extractITMaskBit()
102 // right bit down to bit 0, including the always-0 bit at bit 4 for in extractITMaskBit()
104 return (Mask >> (5 - Position) & 1); in extractITMaskBit()
135 void saveFPReg(int Reg) { FPReg = Reg; } in saveFPReg() argument
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/freebsd/sys/contrib/device-tree/Bindings/ipmi/
H A Dipmi-smic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ipmi/ipmi-smi
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/freebsd/sys/contrib/device-tree/Bindings/iio/frequency/
H A Dadf4350.txt4 - compatible: Should be one of
7 - reg: SPI chip select numbert for the device
8 - spi-max-frequency: Max SPI frequency to use (< 20000000)
9 - clocks: From common clock binding. Clock is phandle to clock for
13 - gpios: GPIO Lock detect - If set with a valid phandle and GPIO number,
15 - adi,channel-spacing: Channel spacing in Hz (influences MODULUS).
16 - adi,power-up-frequency: If set in Hz the PLL tunes to
18 - adi,reference-div-factor: If set the driver skips dynamic calculation
20 - adi,reference-doubler-enable: Enables reference doubler.
21 - adi,reference-div2-enable: Enables reference divider.
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H A Dadi,adf4350.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 - adi,adf4350
16 - adi,adf4351
18 reg:
21 spi-max-frequency:
28 clock-names:
31 '#clock-cells':
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/freebsd/sys/dev/scc/
H A Dscc_dev_z8530.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2004-2006 Marcel Moolenaar
52 #define CHAN_A (-(sc->sc_class->cl_range))
64 * escc (macio) spacing.
73 /* Negative .cl_range signifies this is channel spacing. */
74 .cl_range = (CHAN_B - 16),
78 * SUN compatible channel spacing.
87 /* Negative .cl_range signifies this is channel spacing. */
88 .cl_range = (CHAN_B - 2),
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/freebsd/sys/contrib/device-tree/src/arm/calxeda/
H A Decx-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2011-2012 Calxeda, Inc.
20 #address-cells = <1>;
21 #size-cells = <1>;
22 compatible = "simple-bus";
23 interrupt-parent = <&intc>;
26 compatible = "calxeda,hb-ahci";
27 reg = <0xffe08000 0x10000>;
29 dma-coherent;
30 calxeda,port-phys = < &combophy5 0>, <&combophy0 0>,
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/freebsd/sys/contrib/device-tree/Bindings/
H A Dxilinx.txt10 Each IP-core has a set of parameters which the FPGA designer can use to
20 properties of the device node. In general, device nodes for IP-cores
23 (name): (generic-name)@(base-address) {
24 compatible = "xlnx,(ip-core-name)-(HW_VER)"
26 reg = <(baseaddr) (size)>;
27 interrupt-parent = <&interrupt-controller-phandle>;
29 xlnx,(parameter1) = "(string-value)";
30 xlnx,(parameter2) = <(int-value)>;
33 (generic-name): an open firmware-style name that describes the
36 (ip-core-name): the name of the ip block (given after the BEGIN
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/freebsd/sys/contrib/device-tree/src/arm64/amd/
H A Damd-seattle-soc.dtsi1 // SPDX-License-Identifier: GPL-2.0
10 interrupt-parent = <&gic0>;
11 #address-cells = <2>;
12 #size-cells = <2>;
14 gic0: interrupt-controller@e1101000 {
15 compatible = "arm,gic-400", "arm,cortex-a15-gic";
16 interrupt-controller;
17 #interrupt-cells = <3>;
18 #address-cells = <2>;
19 #size-cells = <2>;
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMExpandPseudoInsts.cpp1 //===-- ARMExpandPseudoInsts.cpp - Expand pseudo instructions -------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 // instructions to allow proper scheduling, if-conversion, and other late
12 // the post-regalloc scheduling pass.
14 //===----------------------------------------------------------------------===//
32 #define DEBUG_TYPE "arm-pseudo"
35 VerifyARMPseudo("verify-arm-pseudo-expand", cl::Hidden,
125 // Constants for register spacing in NEON load/store instructions.
126 // For quad-register load-lane and store-lane pseudo instructors, the
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H A DARMBaseInstrInfo.cpp1 //===-- ARMBaseInstrInfo.cpp - ARM Instruction Information ----------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
75 #define DEBUG_TYPE "arm-instrinfo"
81 EnableARM3Addr("enable-arm-3-addr-conv", cl::Hidden,
82 cl::desc("Enable ARM 2-addr to 3-addr conv"));
84 /// ARM_MLxEntry - Record information about MLA / MLS instructions.
134 static_cast<const ARMSubtarget *>(STI)->getInstrItineraryData(); in CreateTargetHazardRecognizer()
135 return new ScoreboardHazardRecognizer(II, DAG, "pre-RA-sched"); in CreateTargetHazardRecognizer()
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/freebsd/sys/dev/e1000/
H A De1000_mac.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
42 * e1000_init_mac_ops_generic - Initialize MAC function pointers
45 * Setups up the function pointers to no-op functions
49 struct e1000_mac_info *mac = &hw->mac; in e1000_init_mac_ops_generic()
53 mac->ops.init_params = e1000_null_ops_generic; in e1000_init_mac_ops_generic()
54 mac->ops.init_hw = e1000_null_ops_generic; in e1000_init_mac_ops_generic()
55 mac->ops.reset_hw = e1000_null_ops_generic; in e1000_init_mac_ops_generic()
56 mac->ops.setup_physical_interface = e1000_null_ops_generic; in e1000_init_mac_ops_generic()
57 mac->ops.get_bus_info = e1000_null_ops_generic; in e1000_init_mac_ops_generic()
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H A De1000_regs.h2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
38 #define E1000_CTRL 0x00000 /* Device Control - RW */
39 #define E1000_CTRL_DUP 0x00004 /* Device Control Duplicate (Shadow) - RW */
40 #define E1000_STATUS 0x00008 /* Device Status - RO */
41 #define E1000_EECD 0x00010 /* EEPROM/Flash Control - RW */
42 #define E1000_EERD 0x00014 /* EEPROM Read - RW */
43 #define E1000_CTRL_EXT 0x00018 /* Extended Device Control - RW */
44 #define E1000_FLA 0x0001C /* Flash Access - RW */
45 #define E1000_MDIC 0x00020 /* MDI Control - RW */
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/freebsd/sys/dev/ath/ath_hal/
H A Dah_regdomain.c1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2005-2006 Atheros Communications, Inc.
61 * an 8 bit regdomain value to the individual unitary reg domains
68 * for each band if it is used in ANY reg domain.
82 * with shared properties - max tx power, max antenna gain, channel width,
83 * channel spacing, DFS requirements and passive scanning requirements.
96 * zones. It uses combinations of frequency ranges - represented in
97 * a bitmask - to determine the requirements and limitations needed.
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/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_freebsd.c46 HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps; in ar9300SetChainMasks()
48 AH9300(ah)->ah_tx_chainmask = tx_chainmask & pCap->halTxChainMask; in ar9300SetChainMasks()
49 AH9300(ah)->ah_rx_chainmask = rx_chainmask & pCap->halRxChainMask; in ar9300SetChainMasks()
74 uint32_t reg; in ar9300_get_nav() local
76 reg = OS_REG_READ(ah, AR_NAV); in ar9300_get_nav()
77 if (reg == 0xdeadbeef) in ar9300_get_nav()
79 return reg; in ar9300_get_nav()
93 * For now we'll just go with the HAL default and make these no-ops.
121 * XXX TODO: read ar5416SetTsf64() - we should wait before we do in ar9300_freebsd_set_tsf64()
150 if ((rxs->rs_phyerr != HAL_PHYERR_RADAR) && in ar9300_freebsd_proc_radar_event()
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H A Dar9300_reset.c121 ahp->ah_hwp = HAL_TRUE_CHIP; in ar9300_attach_hw_platform()
196 * Mask used to construct AAD for CCMP-AES in ar9300_init_mfp()
197 * Cisco spec defined bits 0-3 as mask in ar9300_init_mfp()
226 centers->ctl_center = centers->ext_center = in ar9300_get_channel_centers()
227 centers->synth_center = ichan->channel; in ar9300_get_channel_centers()
238 centers->synth_center = ichan->channel + HT40_CHANNEL_CENTER_SHIFT; in ar9300_get_channel_centers()
241 centers->synth_center = ichan->channel - HT40_CHANNEL_CENTER_SHIFT; in ar9300_get_channel_centers()
242 extoff = -1; in ar9300_get_channel_centers()
245 centers->ctl_center = in ar9300_get_channel_centers()
246 centers->synth_center - (extoff * HT40_CHANNEL_CENTER_SHIFT); in ar9300_get_channel_centers()
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/freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/
H A DSmartPtrModeling.cpp1 // SmartPtrModeling.cpp - Model behavior of C++ smart pointers - C++ ------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
105 if (!RD || !RD->getDeclContext()->isStdNamespace()) in REGISTER_MAP_WITH_PROGRAMSTATE()
107 if (RD->getDeclName().isIdentifier()) in REGISTER_MAP_WITH_PROGRAMSTATE()
108 return llvm::is_contained(Names, RD->getName()); in REGISTER_MAP_WITH_PROGRAMSTATE()
120 return isStdSmartPtr(E->getType()->getAsCXXRecordDecl()); in isStdSmartPtr()
123 // Define the inter-checker API.
129 if (!MethodDecl || !MethodDecl->getParent()) in isStdSmartPtrCall()
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/freebsd/sys/dev/fxp/
H A Dif_fxp.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
94 * the first thing in the packet is a 14-byte Ethernet header.
97 * alignes the packet after the Ethernet header at a 32-bit
156 * sub-vendor and sub-device field are extensively used to identify
161 { 0x8086, 0x1029, -1, 0, "Intel 82559 PCI/CardBus Pro/100" },
162 { 0x8086, 0x1030, -1, 0, "Intel 82559 Pro/100 Ethernet" },
163 { 0x8086, 0x1031, -1, 3, "Intel 82801CAM (ICH3) Pro/100 VE Ethernet" },
164 { 0x8086, 0x1032, -1, 3, "Intel 82801CAM (ICH3) Pro/100 VE Ethernet" },
165 { 0x8086, 0x1033, -1, 3, "Intel 82801CAM (ICH3) Pro/100 VM Ethernet" },
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/freebsd/sys/dev/igc/
H A Digc_regs.h1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
11 #define IGC_CTRL 0x00000 /* Device Control - RW */
12 #define IGC_STATUS 0x00008 /* Device Status - RO */
13 #define IGC_EECD 0x00010 /* EEPROM/Flash Control - RW */
15 #define IGC_EERD 0x12014 /* EEprom mode read - RW */
16 #define IGC_EEWR 0x12018 /* EEprom mode write - RW */
17 #define IGC_CTRL_EXT 0x00018 /* Extended Device Control - RW */
18 #define IGC_MDIC 0x00020 /* MDI Control - RW */
19 #define IGC_MDICNFG 0x00E04 /* MDI Config - RW */
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/freebsd/contrib/llvm-project/lldb/source/Core/
H A DDisassembler.cpp1 //===-- Disassembler.cpp --------------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
41 #include "lldb/lldb-private-enumerations.h"
42 #include "lldb/lldb-private-interfaces.h"
43 #include "lldb/lldb-private-types.h"
90 // FIXME - we don't have the mechanism in place to do per-architecture in FindPluginForTarget()
133 const size_t bytes_disassembled = disasm_sp->ParseInstructions( in DisassembleRange()
159 (void)disasm_sp->DecodeInstructions(start, data, 0, num_instructions, false, in DisassembleBytes()
180 size_t bytes_disassembled = disasm_sp->ParseInstructions( in Disassemble()
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/freebsd/sys/dev/ixgbe/
H A Dixgbe_type.h2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
42 * - IXGBE_ERROR_INVALID_STATE
48 * - IXGBE_ERROR_POLLING
53 * - IXGBE_ERROR_CAUTION
58 * - IXGBE_ERROR_SOFTWARE
64 * - IXGBE_ERROR_ARGUMENT
69 * - IXGBE_ERROR_UNSUPPORTED
162 #define IXGBE_BY_MAC(_hw, r) ((_hw)->mvals[IXGBE_CAT(r, _IDX)])
419 (0x012300 + (((_i) - 24) * 4)))
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/freebsd/sys/dev/ath/ath_hal/ar5416/
H A Dar5416_reset.c1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
33 (AH_PRIVATE(_ah)->ah_eeversion & AR5416_EEP_VER_MINOR_MASK)
122 HALASSERT(AH_PRIVATE(ah)->ah_eeversion >= AR_EEPROM_VER14_1); in ar5416Reset()
134 /* If reg is zero, first time thru set to default val */ in ar5416Reset()
144 * Don't do this for the AR9285 - it breaks RX for single in ar5416Reset()
173 (ah->ah_config.ah_force_full_reset)) in ar5416Reset()
192 AH5416(ah)->ah_writeIni(ah, chan); in ar5416Reset()
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/freebsd/contrib/ntp/
H A DCommitLog-4.1.01 2001-08-01 Harlan Stenn <stenn@whimsy.udel.edu>
5 2001-07-27 Harlan Stenn <stenn@whimsy.udel.edu>
9 From: reg@dwf.com
19 2001-07-10 Harlan Stenn <stenn@whimsy.udel.edu>
21 * configure.in: 4.0.99m-rc3
23 2001-07-06 Harlan Stenn <stenn@whimsy.udel.edu>
28 2001-07-04 Harlan Stenn <stenn@whimsy.udel.edu>
33 * configure.in (rt library check): Don't look for -lrt under
34 Linux. Under glibc-2.1.2 and -2.2.2 (at least), the POSIX-
35 compatibility real-time library does strange things with threads
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H A DCommitLog1 ChangeSet@1.4062, 2024-05-25 00:06:49-07:00, ntpreleng@ntp-build.tal1.ntfo.org
5 ChangeLog@1.2103 +1 -0
8 ntpd/invoke-ntp.conf.texi@1.231 +1 -1
11 ntpd/invoke-ntp.keys.texi@1.214 +1 -1
14 ntpd/invoke-ntp
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/freebsd/contrib/diff/
H A DChangeLog1 2004-04-13 Paul Eggert <eggert@twinsun.com>
5 (XGETTEXT): Restore from pre-2004-04-12 version. This fixes
9 of "make distcheck" which operates with read-only directories.
13 2004-04-12 Paul Eggert <eggert@twinsun.com>
20 --help" for special "configure" options. Suggest latest libiconv.
51 (Binary): -q doesn't exactly cause diff to assume files are binary.
54 Detailed if-then-else, diff3 Hunks, Detailed diff3 Normal):
59 (Line Group Formats, Reject Names): Fix duplicate-word typos.
61 ignored in the -X file.
62 (diff Options): Add --strip-trailing-cr.
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/freebsd/sys/dev/sfxge/common/
H A Defx_regs_mcdi.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright 2008-2013 Solarflare Communications Inc. All rights reserved.
32 /* Power-on reset state */
54 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
57 /* The rest of these are firmware-defined */
65 /* Values to be written to the per-port status dword in shared
94 * | | \--- Response
95 * | \------- Error
96 * \------------------------------ Resync (always set)
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