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Searched +full:reg +full:- +full:addr (Results 1 – 25 of 1019) sorted by relevance

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/linux/arch/mips/include/asm/
H A Dasm-eva.h19 #define kernel_ll(reg, addr) "ll " reg ", " addr "\n" argument
20 #define kernel_sc(reg, addr) "sc " reg ", " addr "\n" argument
21 #define kernel_lw(reg, addr) "lw " reg ", " addr "\n" argument
22 #define kernel_lwl(reg, addr) "lwl " reg ", " addr "\n" argument
23 #define kernel_lwr(reg, addr) "lwr " reg ", " addr "\n" argument
24 #define kernel_lh(reg, addr) "lh " reg ", " addr "\n" argument
25 #define kernel_lb(reg, addr) "lb " reg ", " addr "\n" argument
26 #define kernel_lbu(reg, addr) "lbu " reg ", " addr "\n" argument
27 #define kernel_sw(reg, addr) "sw " reg ", " addr "\n" argument
28 #define kernel_swl(reg, addr) "swl " reg ", " addr "\n" argument
[all …]
/linux/arch/mips/kernel/
H A Dunaligned.c18 * only the performance is affected. Much worse is that such code is non-
30 * option in your user programs - I discourage the use of the software
31 * emulation strongly - use the following code in your userland stuff:
92 #include <asm/unaligned-emul.h>
97 #include "access-helper.h"
113 void __user *addr, unsigned int *pc) in emulate_load_store_insn() argument
121 orig31 = regs->regs[31]; in emulate_load_store_insn()
133 * can assume therefore that the code is MIPS-aware and in emulate_load_store_insn()
171 if (user && !access_ok(addr, 4)) in emulate_load_store_insn()
173 LoadW(addr, value, res); in emulate_load_store_insn()
[all …]
/linux/drivers/net/wireless/silabs/wfx/
H A Dhwio.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Low-level I/O functions.
5 * Copyright (c) 2017-2020, Silicon Laboratories, Inc.
6 * Copyright (c) 2010, ST-Ericsson
20 static int wfx_read32(struct wfx_dev *wdev, int reg, u32 *val) in wfx_read32() argument
27 return -ENOMEM; in wfx_read32()
28 ret = wdev->hwbus_ops->copy_from_io(wdev->hwbus_priv, reg, tmp, sizeof(u32)); in wfx_read32()
33 dev_err(wdev->dev, "%s: bus communication error: %d\n", __func__, ret); in wfx_read32()
37 static int wfx_write32(struct wfx_dev *wdev, int reg, u32 val) in wfx_write32() argument
43 return -ENOMEM; in wfx_write32()
[all …]
H A Dtraces.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (c) 2018-2020, Silicon Laboratories, Inc.
47 * #define list_for_print_symbolic list_names { -1, NULL }
99 #define hif_msg_list hif_msg_list_enum { -1, NULL }
157 #define hif_mib_list hif_mib_list_enum { -1, NULL }
175 __entry->tx_fill_level = tx_fill_level;
176 __entry->msg_len = le16_to_cpu(hif->len);
177 __entry->msg_id = hif->id;
178 __entry->if_id = hif->interface;
180 __entry->msg_type = __entry->msg_id & 0x80 ? "IND" : "CNF";
[all …]
/linux/sound/isa/gus/
H A Dgus_io.c1 // SPDX-License-Identifier: GPL-2.0-or-later
31 static inline void __snd_gf1_ctrl_stop(struct snd_gus_card * gus, unsigned char reg) in __snd_gf1_ctrl_stop() argument
35 outb(reg | 0x80, gus->gf1.reg_regsel); in __snd_gf1_ctrl_stop()
37 value = inb(gus->gf1.reg_data8); in __snd_gf1_ctrl_stop()
39 outb(reg, gu in __snd_gf1_ctrl_stop()
46 __snd_gf1_write8(struct snd_gus_card * gus,unsigned char reg,unsigned char data) __snd_gf1_write8() argument
56 __snd_gf1_look8(struct snd_gus_card * gus,unsigned char reg) __snd_gf1_look8() argument
64 __snd_gf1_write16(struct snd_gus_card * gus,unsigned char reg,unsigned int data) __snd_gf1_write16() argument
73 __snd_gf1_look16(struct snd_gus_card * gus,unsigned char reg) __snd_gf1_look16() argument
81 __snd_gf1_adlib_write(struct snd_gus_card * gus,unsigned char reg,unsigned char data) __snd_gf1_adlib_write() argument
91 __snd_gf1_write_addr(struct snd_gus_card * gus,unsigned char reg,unsigned int addr,int w_16bit) __snd_gf1_write_addr() argument
92 __snd_gf1_write_addr(struct snd_gus_card * gus,unsigned char reg,unsigned int addr,int w_16bit) __snd_gf1_write_addr() argument
105 __snd_gf1_read_addr(struct snd_gus_card * gus,unsigned char reg,short w_16bit) __snd_gf1_read_addr() argument
125 snd_gf1_ctrl_stop(struct snd_gus_card * gus,unsigned char reg) snd_gf1_ctrl_stop() argument
131 snd_gf1_write8(struct snd_gus_card * gus,unsigned char reg,unsigned char data) snd_gf1_write8() argument
137 snd_gf1_look8(struct snd_gus_card * gus,unsigned char reg) snd_gf1_look8() argument
143 snd_gf1_write16(struct snd_gus_card * gus,unsigned char reg,unsigned int data) snd_gf1_write16() argument
149 snd_gf1_look16(struct snd_gus_card * gus,unsigned char reg) snd_gf1_look16() argument
155 snd_gf1_adlib_write(struct snd_gus_card * gus,unsigned char reg,unsigned char data) snd_gf1_adlib_write() argument
161 snd_gf1_write_addr(struct snd_gus_card * gus,unsigned char reg,unsigned int addr,short w_16bit) snd_gf1_write_addr() argument
162 snd_gf1_write_addr(struct snd_gus_card * gus,unsigned char reg,unsigned int addr,short w_16bit) snd_gf1_write_addr() argument
168 snd_gf1_read_addr(struct snd_gus_card * gus,unsigned char reg,short w_16bit) snd_gf1_read_addr() argument
178 snd_gf1_i_ctrl_stop(struct snd_gus_card * gus,unsigned char reg) snd_gf1_i_ctrl_stop() argument
188 snd_gf1_i_write8(struct snd_gus_card * gus,unsigned char reg,unsigned char data) snd_gf1_i_write8() argument
198 snd_gf1_i_look8(struct snd_gus_card * gus,unsigned char reg) snd_gf1_i_look8() argument
210 snd_gf1_i_write16(struct snd_gus_card * gus,unsigned char reg,unsigned int data) snd_gf1_i_write16() argument
220 snd_gf1_i_look16(struct snd_gus_card * gus,unsigned char reg) snd_gf1_i_look16() argument
231 snd_gf1_dram_addr(struct snd_gus_card * gus,unsigned int addr) snd_gf1_dram_addr() argument
243 snd_gf1_poke(struct snd_gus_card * gus,unsigned int addr,unsigned char data) snd_gf1_poke() argument
260 snd_gf1_peek(struct snd_gus_card * gus,unsigned int addr) snd_gf1_peek() argument
[all...]
/linux/drivers/gpu/drm/nouveau/
H A Dnouveau_uvmm.c1 // SPDX-License-Identifier: MIT
68 u64 addr; member
78 struct nouveau_uvma_region *reg; member
85 u64 addr; member
92 u64 addr, u64 range) in nouveau_uvmm_vmm_sparse_ref() argument
94 struct nvif_vmm *vmm = &uvmm->vmm.vmm; in nouveau_uvmm_vmm_sparse_ref()
96 return nvif_vmm_raw_sparse(vmm, addr, range, true); in nouveau_uvmm_vmm_sparse_ref()
101 u64 addr, u64 range) in nouveau_uvmm_vmm_sparse_unref() argument
103 struct nvif_vmm *vmm = &uvmm->vmm.vmm; in nouveau_uvmm_vmm_sparse_unref()
105 return nvif_vmm_raw_sparse(vmm, addr, range, false); in nouveau_uvmm_vmm_sparse_unref()
[all …]
/linux/drivers/net/ethernet/mscc/
H A Docelot_io.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
13 int __ocelot_bulk_read_ix(struct ocelot *ocelot, enum ocelot_reg reg, in __ocelot_bulk_read_ix() argument
17 u32 addr; in __ocelot_bulk_read_ix() local
19 ocelot_reg_to_target_addr(ocelot, reg, &target, &addr); in __ocelot_bulk_read_ix()
22 return regmap_bulk_read(ocelot->targets[target], addr + offset, in __ocelot_bulk_read_ix()
27 u32 __ocelot_read_ix(struct ocelot *ocelot, enum ocelot_reg reg, u32 offset) in __ocelot_read_ix() argument
30 u32 addr, val; in __ocelot_read_ix() local
32 ocelot_reg_to_target_addr(ocelot, reg, &target, &addr); in __ocelot_read_ix()
35 regmap_read(ocelot->targets[target], addr + offset, &val); in __ocelot_read_ix()
40 void __ocelot_write_ix(struct ocelot *ocelot, u32 val, enum ocelot_reg reg, in __ocelot_write_ix() argument
[all …]
/linux/drivers/fsi/
H A Dfsi-master-hub.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include "fsi-master.h"
29 * device (the hub->upstream device), and provides access to the downstream FSI
30 * bus as through an address range on the slave itself (->addr and ->size).
39 uint32_t addr, size; /* slave-relative addr of */ member
46 uint8_t id, uint32_t addr, void *val, size_t size) in hub_master_read() argument
51 return -EINVAL; in hub_master_read()
53 addr += hub->addr + (link * FSI_HUB_LINK_SIZE); in hub_master_read()
54 return fsi_slave_read(hub->upstream->slave, addr, val, size); in hub_master_read()
58 uint8_t id, uint32_t addr, const void *val, size_t size) in hub_master_write() argument
[all …]
H A Dfsi-master-aspeed.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include "fsi-master.h"
97 static int __opb_write(struct fsi_master_aspeed *aspeed, u32 addr, in __opb_write() argument
100 void __iomem *base = aspeed->base; in __opb_write()
101 u32 reg, status; in __opb_write() local
110 writel_relaxed(addr, base + OPB0_FSI_ADDR); in __opb_write()
115 ret = readl_poll_timeout(base + OPB_IRQ_STATUS, reg, in __opb_write()
116 (reg & OPB0_XFER_ACK_EN) != 0, in __opb_write()
121 trace_fsi_master_aspeed_opb_write(addr, val, transfer_size, status, reg); in __opb_write()
129 return -EIO; in __opb_write()
[all …]
/linux/arch/arm/boot/dts/intel/axm/
H A Daxm5516-cpus.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * arch/arm/boot/dts/axm5516-cpus.dtsi
10 #address-cells = <1>;
11 #size-cells = <0>;
13 cpu-map {
74 compatible = "arm,cortex-a15";
75 reg = <0x00>;
76 clock-frequency = <1400000000>;
77 cpu-release-addr = <0>; // Fixed by the boot loader
82 compatible = "arm,cortex-a15";
[all …]
/linux/arch/mips/lib/
H A Dcsum_partial.S16 #include <asm/asm-offsets.h>
59 #define ADDC(sum,reg) \ argument
62 ADD sum, reg; \
63 sltu v1, sum, reg; \
67 #define ADDC32(sum,reg) \ argument
70 addu sum, reg; \
71 sltu v1, sum, reg; \
342 * reg : Register
343 * addr : Address
346 #define EXC(insn, type, reg, addr) \ argument
[all …]
H A Dmemcpy.S23 * dma-coherent systems.
37 #include <asm/asm-offsets.h>
49 * - src and dst don't overlap
50 * - src is readable
51 * - dst is writable
59 * - src is readable (no exceptions when reading src)
61 * - dst is writable (no exceptions when writing dst)
62 * __copy_user uses a non-standard calling convention; see
63 * include/asm-mips/uaccess.h
76 * 1- AT contain the address of the byte just past the end of the source
[all …]
/linux/drivers/net/dsa/sja1105/
H A Dsja1105_mdio.c1 // SPDX-License-Identifier: GPL-2.0
4 #include <linux/pcs/pcs-xpcs.h>
10 int sja1105_pcs_mdio_read_c45(struct mii_bus *bus, int phy, int mmd, int reg) in sja1105_pcs_mdio_read_c45() argument
12 struct sja1105_mdio_private *mdio_priv = bus->priv; in sja1105_pcs_mdio_read_c45()
13 struct sja1105_private *priv = mdio_priv->priv; in sja1105_pcs_mdio_read_c45()
14 u64 addr; in sja1105_pcs_mdio_read_c45() local
18 addr = (mmd << 16) | reg; in sja1105_pcs_mdio_read_c45()
23 if (mmd == MDIO_MMD_VEND2 && (reg & GENMASK(15, 0)) == MII_PHYSID1) in sja1105_pcs_mdio_read_c45()
25 if (mmd == MDIO_MMD_VEND2 && (reg & GENMASK(15, 0)) == MII_PHYSID2) in sja1105_pcs_mdio_read_c45()
28 rc = sja1105_xfer_u32(priv, SPI_READ, addr, &tmp, NULL); in sja1105_pcs_mdio_read_c45()
[all …]
/linux/include/sound/
H A Dhdaudio.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * HD-audio core stuff
12 #include <linux/io-64-nonatomic-lo-hi.h>
50 * HD-audio codec base device
56 unsigned int addr; /* code member
271 dma_addr_t addr; /* physical address of CORB/RIRB buffer */ global() member
297 unsigned long addr; global() member
423 snd_hdac_aligned_read(addr,mask) global() argument
424 snd_hdac_aligned_write(val,addr,mask) global() argument
427 snd_hdac_reg_writeb(struct hdac_bus * bus,void __iomem * addr,u8 val) snd_hdac_reg_writeb() argument
436 snd_hdac_reg_writew(struct hdac_bus * bus,void __iomem * addr,u16 val) snd_hdac_reg_writew() argument
445 snd_hdac_reg_readb(struct hdac_bus * bus,void __iomem * addr) snd_hdac_reg_readb() argument
451 snd_hdac_reg_readw(struct hdac_bus * bus,void __iomem * addr) snd_hdac_reg_readw() argument
457 snd_hdac_reg_writel(bus,addr,val) global() argument
458 snd_hdac_reg_readl(bus,addr) global() argument
459 snd_hdac_reg_writeq(bus,addr,val) global() argument
460 snd_hdac_reg_readq(bus,addr) global() argument
465 _snd_hdac_chip_writeb(chip,reg,value) global() argument
467 _snd_hdac_chip_readb(chip,reg) global() argument
469 _snd_hdac_chip_writew(chip,reg,value) global() argument
471 _snd_hdac_chip_readw(chip,reg) global() argument
473 _snd_hdac_chip_writel(chip,reg,value) global() argument
475 _snd_hdac_chip_readl(chip,reg) global() argument
479 snd_hdac_chip_writel(chip,reg,value) global() argument
481 snd_hdac_chip_writew(chip,reg,value) global() argument
483 snd_hdac_chip_writeb(chip,reg,value) global() argument
485 snd_hdac_chip_readl(chip,reg) global() argument
487 snd_hdac_chip_readw(chip,reg) global() argument
489 snd_hdac_chip_readb(chip,reg) global() argument
493 snd_hdac_chip_updatel(chip,reg,mask,val) global() argument
496 snd_hdac_chip_updatew(chip,reg,mask,val) global() argument
499 snd_hdac_chip_updateb(chip,reg,mask,val) global() argument
504 snd_hdac_updatel(addr,reg,mask,val) global() argument
507 snd_hdac_updatew(addr,reg,mask,val) global() argument
612 snd_hdac_stream_writel(dev,reg,value) global() argument
614 snd_hdac_stream_writew(dev,reg,value) global() argument
616 snd_hdac_stream_writeb(dev,reg,value) global() argument
618 snd_hdac_stream_readl(dev,reg) global() argument
620 snd_hdac_stream_readw(dev,reg) global() argument
622 snd_hdac_stream_readb(dev,reg) global() argument
624 snd_hdac_stream_readb_poll(dev,reg,val,cond,delay_us,timeout_us) global() argument
627 snd_hdac_stream_readw_poll(dev,reg,val,cond,delay_us,timeout_us) global() argument
630 snd_hdac_stream_readl_poll(dev,reg,val,cond,delay_us,timeout_us) global() argument
635 snd_hdac_stream_updatel(dev,reg,mask,val) global() argument
639 snd_hdac_stream_updatew(dev,reg,mask,val) global() argument
643 snd_hdac_stream_updateb(dev,reg,mask,val) global() argument
[all...]
/linux/drivers/net/dsa/mv88e6xxx/
H A Dphy.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 int addr, int reg, u16 *val) in mv88e6165_phy_read() argument
19 return mv88e6xxx_read(chip, addr, reg, val); in mv88e6165_phy_read()
23 int addr, int reg, u16 val) in mv88e6165_phy_write() argument
25 return mv88e6xxx_write(chip, addr, reg, val); in mv88e6165_phy_write()
28 int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy, int reg, u16 *val) in mv88e6xxx_phy_read() argument
30 int addr = phy; /* PHY devices addresses start at 0x0 */ in mv88e6xxx_phy_read() local
35 return -EOPNOTSUPP; in mv88e6xxx_phy_read()
37 if (!chip->info->ops->phy_read) in mv88e6xxx_phy_read()
38 return -EOPNOTSUPP; in mv88e6xxx_phy_read()
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bus/
H A Dhwsq.h1 /* SPDX-License-Identifier: MIT */
15 u32 addr; member
22 hwsq_stride(u32 addr, u32 stride, u32 mask) in hwsq_stride() argument
27 .addr = addr, in hwsq_stride()
40 .addr = addr1, in hwsq_reg2()
41 .stride = addr2 - addr1, in hwsq_reg2()
48 hwsq_reg(u32 addr) in hwsq_reg() argument
53 .addr = addr, in hwsq_reg()
65 ret = nvkm_hwsq_init(subdev, &ram->hwsq); in hwsq_init()
69 ram->sequence++; in hwsq_init()
[all …]
/linux/arch/powerpc/boot/
H A Ddevtree.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * devtree.c - convenience functions for device tree manipulation
25 if (getprop(root, "#address-cells", &naddr, sizeof(naddr)) < 0) in dt_fixup_memory()
30 fatal("Can't cope with #address-cells == %d in /\n\r", naddr); in dt_fixup_memory()
32 if (getprop(root, "#size-cells", &nsize, sizeof(nsize)) < 0) in dt_fixup_memory()
37 fatal("Can't cope with #size-cells == %d in /\n\r", nsize); in dt_fixup_memory()
53 printf("Memory <- <0x%x", be32_to_cpu(memreg[0])); in dt_fixup_memory()
58 setprop(memory, "reg", memreg, (naddr + nsize)*sizeof(u32)); in dt_fixup_memory()
67 printf("CPU clock-frequency <- 0x%x (%dMHz)\n\r", cpu, MHZ(cpu)); in dt_fixup_cpu_clocks()
68 printf("CPU timebase-frequency <- 0x%x (%dMHz)\n\r", tb, MHZ(tb)); in dt_fixup_cpu_clocks()
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dramfuc.h1 /* SPDX-License-Identifier: MIT */
16 u32 addr; member
23 ramfuc_stride(u32 addr, u32 stride, u32 mask) in ramfuc_stride() argument
27 .addr = addr, in ramfuc_stride()
39 .addr = addr1, in ramfuc_reg2()
40 .stride = addr2 - addr1, in ramfuc_reg2()
47 ramfuc_reg(u32 addr) in ramfuc_reg() argument
51 .addr = addr, in ramfuc_reg()
61 int ret = nvkm_memx_init(fb->subdev.device->pmu, &ram->memx); in ramfuc_init()
65 ram->sequence++; in ramfuc_init()
[all …]
/linux/arch/x86/pci/
H A Dmmconfig_64.c1 // SPDX-License-Identifier: GPL-2.0
3 * mmconfig.c - Low-level direct PCI config space access via MMCONFIG
23 if (cfg && cfg->virt) in pci_dev_base()
24 return cfg->virt + (PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12)); in pci_dev_base()
29 unsigned int devfn, int reg, int len, u32 *value) in pci_mmcfg_read() argument
31 char __iomem *addr; in pci_mmcfg_read() local
33 /* Why do we have this when nobody checks it. How about a BUG()!? -AK */ in pci_mmcfg_read()
34 if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) { in pci_mmcfg_read()
35 err: *value = -1; in pci_mmcfg_read()
36 return -EINVAL; in pci_mmcfg_read()
[all …]
/linux/drivers/net/wan/
H A Dhd64572.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * hd64572.h Description of the Hitachi HD64572 (SCA-II), valid for
8 * Copyright: (c) 2000-2001 Cyclades Corp.
15 * PC300 initial CVS version (3.4.0-pre1)
28 #define PABR0L 0x20 /* Physical Addr Boundary Register 0 L */
29 #define PABR0H 0x21 /* Physical Addr Boundary Register 0 H */
30 #define PABR1L 0x22 /* Physical Addr Boundary Register 1 L */
31 #define PABR1H 0x23 /* Physical Addr Boundary Register 1 H */
46 #define M_REG(reg, chan) (reg + 0x80*chan) /* MSCI */ argument
47 #define DRX_REG(reg, chan) (reg + 0x40*chan) /* DMA Rx */ argument
[all …]
/linux/drivers/net/wireless/ti/wlcore/
H A Dio.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
6 * Copyright (C) 2008-2010 Nokia Corporation
41 int wlcore_translate_addr(struct wl1271 *wl, int addr);
44 static inline int __must_check wlcore_raw_write(struct wl1271 *wl, int addr, in wlcore_raw_write() argument
50 if (test_bit(WL1271_FLAG_IO_FAILED, &wl->flags) || in wlcore_raw_write()
51 WARN_ON((test_bit(WL1271_FLAG_IN_ELP, &wl->flags) && in wlcore_raw_write()
52 addr != HW_ACCESS_ELP_CTRL_REG))) in wlcore_raw_write()
53 return -EIO; in wlcore_raw_write()
55 ret = wl->if_ops->write(wl->dev, addr, buf, len, fixed); in wlcore_raw_write()
[all …]
/linux/drivers/gpu/drm/ast/
H A Dast_drv.h14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
230 return __AST_CHIP_GEN(ast->chip); in __ast_gen()
246 static inline u8 __ast_read8(const void __iomem *addr, u32 reg) in __ast_read8() argument
248 return ioread8(addr + reg); in __ast_read8()
251 static inline u32 __ast_read32(const void __iomem *addr, u32 reg) in __ast_read32() argument
253 return ioread32(addr + reg); in __ast_read32()
256 static inline void __ast_write8(void __iomem *addr, u32 reg, u8 val) in __ast_write8() argument
258 iowrite8(val, addr + reg); in __ast_write8()
261 static inline void __ast_write32(void __iomem *addr, u32 reg, u32 val) in __ast_write32() argument
263 iowrite32(val, addr + reg); in __ast_write32()
[all …]
/linux/drivers/regulator/
H A Dpalmas-regulator.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2011-2013 Texas Instruments Inc.
41 .sname = "smps1-in",
49 .sname = "smps1-in",
57 .sname = "smps3-in",
64 .sname = "smps4-in",
72 .sname = "smps4-in",
80 .sname = "smps6-in",
88 .sname = "smps7-in",
95 .sname = "smps8-in",
[all …]
/linux/drivers/mfd/
H A Dtps6594-i2c.c1 // SPDX-License-Identifier: GPL-2.0
4 * - LP8764
5 * - TPS65224
6 * - TPS652G1
7 * - TPS6593
8 * - TPS6594
10 * Copyright (C) 2023 BayLibre Incorporated - https://www.baylibre.com/
37 return -EIO; in tps6594_i2c_transfer()
40 static int tps6594_i2c_reg_read_with_crc(struct i2c_client *client, u8 page, u8 reg, u8 *val) in tps6594_i2c_reg_read_with_crc() argument
45 const u8 addr = client->addr + page; in tps6594_i2c_reg_read_with_crc() local
[all …]
/linux/sound/pci/oxygen/
H A Doxygen_io.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * C-Media CMI8788 driver - helper functions
16 u8 oxygen_read8(struct oxygen *chip, unsigned int reg) in oxygen_read8() argument
18 return inb(chip->addr + reg); in oxygen_read8()
22 u16 oxygen_read16(struct oxygen *chip, unsigned int reg) in oxygen_read16() argument
24 return inw(chip->addr + reg); in oxygen_read16()
28 u32 oxygen_read32(struct oxygen *chip, unsigned int reg) in oxygen_read32() argument
30 return inl(chip->addr + reg); in oxygen_read32()
34 void oxygen_write8(struct oxygen *chip, unsigned int reg, u8 value) in oxygen_write8() argument
36 outb(value, chip->addr + reg); in oxygen_write8()
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