Lines Matching +full:reg +full:- +full:addr

1 // SPDX-License-Identifier: GPL-2.0-or-later
17 int addr, int reg, u16 *val) in mv88e6165_phy_read() argument
19 return mv88e6xxx_read(chip, addr, reg, val); in mv88e6165_phy_read()
23 int addr, int reg, u16 val) in mv88e6165_phy_write() argument
25 return mv88e6xxx_write(chip, addr, reg, val); in mv88e6165_phy_write()
28 int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy, int reg, u16 *val) in mv88e6xxx_phy_read() argument
30 int addr = phy; /* PHY devices addresses start at 0x0 */ in mv88e6xxx_phy_read() local
35 return -EOPNOTSUPP; in mv88e6xxx_phy_read()
37 if (!chip->info->ops->phy_read) in mv88e6xxx_phy_read()
38 return -EOPNOTSUPP; in mv88e6xxx_phy_read()
40 return chip->info->ops->phy_read(chip, bus, addr, reg, val); in mv88e6xxx_phy_read()
43 int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy, int reg, u16 val) in mv88e6xxx_phy_write() argument
45 int addr = phy; /* PHY devices addresses start at 0x0 */ in mv88e6xxx_phy_write() local
50 return -EOPNOTSUPP; in mv88e6xxx_phy_write()
52 if (!chip->info->ops->phy_write) in mv88e6xxx_phy_write()
53 return -EOPNOTSUPP; in mv88e6xxx_phy_write()
55 return chip->info->ops->phy_write(chip, bus, addr, reg, val); in mv88e6xxx_phy_write()
59 int reg, u16 *val) in mv88e6xxx_phy_read_c45() argument
61 int addr = phy; /* PHY devices addresses start at 0x0 */ in mv88e6xxx_phy_read_c45() local
66 return -EOPNOTSUPP; in mv88e6xxx_phy_read_c45()
68 if (!chip->info->ops->phy_read_c45) in mv88e6xxx_phy_read_c45()
69 return -EOPNOTSUPP; in mv88e6xxx_phy_read_c45()
71 return chip->info->ops->phy_read_c45(chip, bus, addr, devad, reg, val); in mv88e6xxx_phy_read_c45()
75 int reg, u16 val) in mv88e6xxx_phy_write_c45() argument
77 int addr = phy; /* PHY devices addresses start at 0x0 */ in mv88e6xxx_phy_write_c45() local
82 return -EOPNOTSUPP; in mv88e6xxx_phy_write_c45()
84 if (!chip->info->ops->phy_write_c45) in mv88e6xxx_phy_write_c45()
85 return -EOPNOTSUPP; in mv88e6xxx_phy_write_c45()
87 return chip->info->ops->phy_write_c45(chip, bus, addr, devad, reg, val); in mv88e6xxx_phy_write_c45()
105 dev_err(chip->dev, in mv88e6xxx_phy_page_put()
112 u8 page, int reg, u16 *val) in mv88e6xxx_phy_page_read() argument
117 if (reg == MV88E6XXX_PHY_PAGE) in mv88e6xxx_phy_page_read()
118 return -EINVAL; in mv88e6xxx_phy_page_read()
122 err = mv88e6xxx_phy_read(chip, phy, reg, val); in mv88e6xxx_phy_page_read()
130 u8 page, int reg, u16 val) in mv88e6xxx_phy_page_write() argument
135 if (reg == MV88E6XXX_PHY_PAGE) in mv88e6xxx_phy_page_write()
136 return -EINVAL; in mv88e6xxx_phy_page_write()
142 err = mv88e6xxx_phy_write(chip, phy, reg, val); in mv88e6xxx_phy_page_write()
152 if (!chip->info->ops->ppu_disable) in mv88e6xxx_phy_ppu_disable()
155 return chip->info->ops->ppu_disable(chip); in mv88e6xxx_phy_ppu_disable()
160 if (!chip->info->ops->ppu_enable) in mv88e6xxx_phy_ppu_enable()
163 return chip->info->ops->ppu_enable(chip); in mv88e6xxx_phy_ppu_enable()
174 if (mutex_trylock(&chip->ppu_mutex)) { in mv88e6xxx_phy_ppu_reenable_work()
176 chip->ppu_disabled = 0; in mv88e6xxx_phy_ppu_reenable_work()
177 mutex_unlock(&chip->ppu_mutex); in mv88e6xxx_phy_ppu_reenable_work()
187 schedule_work(&chip->ppu_work); in mv88e6xxx_phy_ppu_reenable_timer()
194 mutex_lock(&chip->ppu_mutex); in mv88e6xxx_phy_ppu_access_get()
198 * disabled, cancel the timer that is going to re-enable in mv88e6xxx_phy_ppu_access_get()
201 if (!chip->ppu_disabled) { in mv88e6xxx_phy_ppu_access_get()
204 mutex_unlock(&chip->ppu_mutex); in mv88e6xxx_phy_ppu_access_get()
207 chip->ppu_disabled = 1; in mv88e6xxx_phy_ppu_access_get()
209 del_timer(&chip->ppu_timer); in mv88e6xxx_phy_ppu_access_get()
218 /* Schedule a timer to re-enable the PHY polling unit. */ in mv88e6xxx_phy_ppu_access_put()
219 mod_timer(&chip->ppu_timer, jiffies + msecs_to_jiffies(10)); in mv88e6xxx_phy_ppu_access_put()
220 mutex_unlock(&chip->ppu_mutex); in mv88e6xxx_phy_ppu_access_put()
225 mutex_init(&chip->ppu_mutex); in mv88e6xxx_phy_ppu_state_init()
226 INIT_WORK(&chip->ppu_work, mv88e6xxx_phy_ppu_reenable_work); in mv88e6xxx_phy_ppu_state_init()
227 timer_setup(&chip->ppu_timer, mv88e6xxx_phy_ppu_reenable_timer, 0); in mv88e6xxx_phy_ppu_state_init()
232 del_timer_sync(&chip->ppu_timer); in mv88e6xxx_phy_ppu_state_destroy()
236 int addr, int reg, u16 *val) in mv88e6185_phy_ppu_read() argument
242 err = mv88e6xxx_read(chip, addr, reg, val); in mv88e6185_phy_ppu_read()
250 int addr, int reg, u16 val) in mv88e6185_phy_ppu_write() argument
256 err = mv88e6xxx_write(chip, addr, reg, val); in mv88e6185_phy_ppu_write()
265 if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable) in mv88e6xxx_phy_init()
271 if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable) in mv88e6xxx_phy_destroy()