| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | silabs,si5341.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Mike Looijmans <mike.looijmans@topic.nl> 16 Reference 18 https://www.silabs.com/documents/public/data-sheets/Si5341-40-D-DataSheet.pdf 19 [2] Si5341 Reference Manual 20 https://www.silabs.com/documents/public/reference-manuals/Si5341-40-D-RM.pdf 21 [3] Si5345 Reference Manual 22 https://www.silabs.com/documents/public/reference-manuals/Si5345-44-42-D-RM.pdf [all …]
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| /linux/Documentation/hwmon/ |
| H A D | vexpress.rst | 12 * "Hardware Description" sections of the Technical Reference Manuals 15 - http://infocenter.arm.com/help/topic/com.arm.doc.subset.boards.express/index.html 17 * Section "4.4.14. System Configuration registers" of the V2M-P1 TRM: 19 - http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0447-/index.html 24 ----------- 27 reference & prototyping system for ARM Ltd. processors. It can be set up 39 As these devices are non-discoverable, they must be described in a Device
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| /linux/tools/memory-model/Documentation/ |
| H A D | README | 4 Linux-kernel memory model (LKMM) audience might be anywhere from novice 12 If LKMM-specific terms lost you, glossary.txt might help you. 14 o You are new to Linux-kernel concurrency: simple.txt 16 o You have some background in Linux-kernel concurrency, and would 17 like an overview of the types of low-level concurrency primitives 22 o You are familiar with the Linux-kernel concurrency primitives 24 tests: litmus-tests.txt 30 recipes.txt, but is self-contained. 32 o You are familiar with Linux-kernel concurrency, and would 37 and cannot do to control dependencies: control-dependencies.txt [all …]
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| H A D | references.txt | 6 Hardware manuals and models 10 Reference Manual Version 9". SPARC International Inc. 13 Reference Manual". Compaq Computer Corporation. 18 o Intel Corporation (Ed.). 2002. "Intel 64 and IA-32 Architectures 22 and Magnus O. Myreen. 2010. "x86-TSO: A Rigorous and Usable 24 (July, 2010), 89-97. http://doi.acm.org/10.1145/1785414.1785443 42 Implementation (PLDI '12). ACM, New York, NY, USA, 311-322. 44 o ARM Ltd. (Ed.). 2014. "ARM Architecture Reference Manual (ARMv8, 45 for ARMv8-A architecture profile)". ARM Ltd. 48 For Programmers, Volume II-A: The MIPS64(R) Instruction, [all …]
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| /linux/Documentation/devicetree/bindings/display/ |
| H A D | arm,pl11x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Liviu Dudau <Liviu.Dudau@arm.com> 11 - Andre Przywara <andre.przywara@arm.com> 24 - arm,pl110 25 - arm,pl111 27 - compatible 32 - enum: 33 - arm,pl110 [all …]
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| /linux/Documentation/admin-guide/media/ |
| H A D | omap3isp.rst | 1 .. SPDX-License-Identifier: GPL-2.0 17 ------------ 26 - 3430 27 - 3530 28 - 3630 36 ---------------- 42 - OMAP3 ISP CCP2 43 - OMAP3 ISP CSI2a 44 - OMAP3 ISP CCDC 45 - OMAP3 ISP preview [all …]
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| /linux/arch/arm64/include/asm/ |
| H A D | kgdb.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 15 #include <asm/debug-monitors.h> 46 * r0-r30: 64 bit 51 * f0-f31: 128 bit 57 * Architecture Reference Manual that claimed "SPSR_ELx is a 32-bit register". 58 * and, as a result, allocated only 32-bits for the PSTATE in the remote 61 * Unfortunately "is a 32-bit register" has a very special meaning for 66 * manuals, what "is a 32-bit register" actually means in this context is 67 * "is a 64-bit register but one with no meaning allocated to any of the 68 * upper 32-bits... *yet*". [all …]
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| /linux/LICENSES/deprecated/ |
| H A D | GFDL-1.2 | 1 Valid-License-Identifier: GPL-2.0 OR GFDL-1.2-no-invariants-or-later 2 Valid-License-Identifier: GPL-2.0 OR GFDL-1.2-no-invariants-only 3 Valid-License-Identifier: GFDL-1.2-no-invariants-or-later 4 Valid-License-Identifier: GFDL-1.2-no-invariants-only 5 SPDX-URL: https://spdx.org/licenses/GFDL-1.2-no-invariants-or-later.html 6 Usage-Guide: 8 Invariant Sections, Front-Cover Texts or Back-Cover Texts. 13 SPDX-License-Identifier: GPL-2.0 OR GFDL-1.2-no-invariants-or-later 15 SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-only 17 SPDX-License-Identifier: GFDL-1.2-no-invariants-or-later [all …]
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| H A D | GFDL-1.1 | 1 Valid-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later 2 Valid-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-only 3 Valid-License-Identifier: GFDL-1.1-no-invariants-or-later 4 Valid-License-Identifier: GFDL-1.1-no-invariants-only 5 SPDX-URL: https://spdx.org/licenses/GFDL-1.1-no-invariants-or-later.html 6 Usage-Guide: 8 Invariant Sections, Front-Cover Texts or Back-Cover Texts. 11 userspace-api media documentation). 15 SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later 17 SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-only [all …]
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| /linux/Documentation/devicetree/bindings/display/bridge/ |
| H A D | fsl,imx8qxp-ldb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-ldb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Liu Ying <victor.liu@nxp.com> 34 the SoC reference manuals. The pixel mapper uses logic of LDBs embedded in 41 - fsl,imx8qm-ldb 42 - fsl,imx8qxp-ldb 44 "#address-cells": 47 "#size-cells": [all …]
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| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | fsl,layerscape-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/fsl,layerscape-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Frank Li <Frank.Li@nxp.com> 16 which is used to describe the PLL settings at the time of chip-reset. 18 Also as per the available Reference Manuals, there is no specific 'version' 26 - enum: 27 - fsl,ls1012a-pcie 28 - fsl,ls1021a-pcie [all …]
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| /linux/include/xen/interface/io/ |
| H A D | blkif.h | 1 /* SPDX-License-Identifier: MIT */ 5 * Unified block-device I/O interface for Xen guest OSes. 7 * Copyright (c) 2003-2004, Keir Fraser 17 * Front->back notifications: When enqueuing a new request, sending a 19 * hold-off mechanism provided by the ring macros). Backends must set 22 * Back->front notifications: When enqueuing a new response, sending a 24 * hold-off mechanism provided by the ring macros). Frontends must set 33 * If supported, the backend will write the key "multi-queue-max-queues" to 37 * key "multi-queue-num-queues" with the number they wish to use, which must be 39 * "multi-queue-max-queues". [all …]
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| /linux/drivers/pwm/ |
| H A D | pwm-pxa.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * drivers/pwm/pwm-pxa.c 7 * 2008-02-13 initial version 10 * Links to reference manuals for some of the supported PWM chips can be found 14 * - When PWM is stopped, the current PWM period stops abruptly at the next 36 { "pxa25x-pwm", 0 }, 37 { "pxa27x-pwm", HAS_SECONDARY_PWM }, 38 { "pxa168-pwm", 0 }, 39 { "pxa910-pwm", 0 }, 76 offset = pwm->hwpwm ? 0x10 : 0; in pxa_pwm_config() [all …]
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| H A D | pwm-atmel.c | 1 // SPDX-License-Identifier: GPL-2.0-only 8 * Links to reference manuals for the supported PWM chips can be found in 12 * - Periods start with the inactive level. 13 * - Hardware has to be stopped in general to update settings. 16 * - When atmel_pwm_apply() is called with state->enabled=false a change in 17 * state->polarity isn't honored. 18 * - Instead of sleeping to wait for a completed period, the interrupt 104 return readl_relaxed(chip->base + offset); in atmel_pwm_readl() 110 writel_relaxed(val, chip->base + offset); in atmel_pwm_writel() 140 chip->update_pending &= ~isr; in atmel_pwm_update_pending() [all …]
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| /linux/Documentation/userspace-api/media/ |
| H A D | fdl-appendix.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later 10 .. _fdl-preamble: 28 We have designed this License in order to use it for manuals for free 30 should come with manuals providing the same freedoms that the software 31 does. But this License is not limited to software manuals; it can be 34 works whose purpose is instruction or reference. 37 .. _fdl-section1: 43 .. _fdl-document: 52 .. _fdl-modified: 59 .. _fdl-secondary: [all …]
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| /linux/lib/crc/arm/ |
| H A D | crc32-core.S | 40 * PCLMULQDQ is a new instruction in Intel SSE4.2, the reference can be found 42 * https://www.intel.com/products/processor/manuals/ 43 * Intel(R) 64 and IA-32 Architectures Software Developer's Manual 44 * Volume 2B: Instruction Set Reference, N-Z 55 .arch armv8-a 57 .fpu crypto-neon-fp-armv8 64 * [(x4*128-32 mod P(x) << 32)]' << 1 = 0x1c6e41596 74 * [(x128-32 mod P(x) << 32)]' << 1 = 0x0ccaa009e 119 * BUF - buffer 120 * LEN - sizeof buffer (multiple of 16 bytes), LEN should be > 63 [all …]
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| /linux/Documentation/userspace-api/media/drivers/ |
| H A D | omap3isp-uapi.rst | 1 .. SPDX-License-Identifier: GPL-2.0 17 ------ 37 - V4L2_EVENT_OMAP3ISP_AEWB 38 - V4L2_EVENT_OMAP3ISP_AF 39 - V4L2_EVENT_OMAP3ISP_HIST 44 omap3isp_stat_event_status.buf_err is set to non-zero. 48 -------------- 52 does not fall under the standard IOCTLs --- gamma tables and configuration of 56 containing hardware-dependent functions. 60 - VIDIOC_OMAP3ISP_CCDC_CFG [all …]
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| /linux/drivers/net/ethernet/dec/tulip/ |
| H A D | 21142.c | 5 Written/copyright 1994-2001 by Donald Becker. 8 of the GNU General Public License, incorporated herein by reference. 11 Hardware Reference Manual" is currently available at : 12 http://developer.intel.com/design/network/manuals/278074.htm 32 struct net_device *dev = tp->dev; in t21142_media_task() 33 void __iomem *ioaddr = tp->base_addr; in t21142_media_task() 43 dev_info(&dev->dev, "21143 negotiation status %08x, %s\n", in t21142_media_task() 44 csr12, medianame[dev->if_port]); in t21142_media_task() 45 if (tulip_media_cap[dev->if_port] & MediaIsMII) { in t21142_media_task() 53 } else if (tp->nwayset) { in t21142_media_task() [all …]
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| /linux/include/uapi/linux/ |
| H A D | comedi.h | 1 /* SPDX-License-Identifier: LGPL-2.0+ WITH Linux-syscall-note */ 6 * COMEDI - Linux Control and Measurement Device Interface 7 * Copyright (C) 1998-2001 David A. Schleef <ds@schleef.org> 32 * NOTE: 'comedi_config --init-data' is deprecated 40 /* length of nth chunk of firmware data -*/ 78 /* counters -- these are arbitrary values */ 120 /* try to use a real-time interrupt while performing command */ 123 /* wake up on end-of-scan events */ 166 #define TRIG_INT 0x00000080 /* trigger on comedi-internal signal N */ 179 #define SDF_PWM_HBRIDGE 0x0100 /* PWM is signed (H-bridge) */ [all …]
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| /linux/Documentation/admin-guide/ |
| H A D | spkguide.txt | 16 Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. A 25 http://linux-speakup.org/. Speakup is a set of patches to the standard 72 acntsa -- Accent SA 73 acntpc -- Accent PC 74 apollo -- Apollo 75 audptr -- Audapter 76 bns -- Braille 'n Speak 77 dectlk -- DecTalk Express (old and new, db9 serial only) 78 decext -- DecTalk (old) External 79 dtlk -- DoubleTalk PC [all …]
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| /linux/drivers/comedi/drivers/ |
| H A D | ni_at_a2150.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Comedi driver for National Instruments AT-A2150 boards 6 * COMEDI - Linux Control and Measurement Device Interface 12 * Description: National Instruments AT-A2150 15 * Devices: [National Instruments] AT-A2150C (at_a2150c), AT-2150S (at_a2150s) 18 * [0] - I/O port base address 19 * [1] - IRQ (optional, required for timed conversions) 20 * [2] - DMA (optional, required for timed conversions) 29 * References (from ftp://ftp.natinst.com/support/manuals): 30 * 320360.pdf AT-A2150 User Manual [all …]
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| H A D | ni_mio_common.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Hardware driver for DAQ-STC based boards 5 * COMEDI - Linux Control and Measurement Device Interface 6 * Copyright (C) 1997-2001 David A. Schleef <ds@schleef.org> 7 * Copyright (C) 2002-2006 Frank Mori Hess <fmhess@users.sourceforge.net> 16 * References (ftp://ftp.natinst.com/support/manuals): 17 * 340747b.pdf AT-MIO E series Register Level Programmer Manual 19 * 340934b.pdf DAQ-STC reference manual 31 * 321791a.pdf discontinuation of at-mio-16e-10 rev. c 32 * 321808a.pdf about at-mio-16e-10 rev P [all …]
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| /linux/arch/mips/include/asm/sn/sn0/ |
| H A D | hubio.h | 8 * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc. 57 #define IIO_BTE_OFF_1 IIO_IBLS_1 - IIO_IBLS_0 /* Offset from base to BTE 1 */ 61 #define BTEOFF_SRC (IIO_BTE_SRC_0 - IIO_BTE_STAT_0) 62 #define BTEOFF_DEST (IIO_BTE_DEST_0 - IIO_BTE_STAT_0) 63 #define BTEOFF_CTRL (IIO_BTE_CTRL_0 - IIO_BTE_STAT_0) 64 #define BTEOFF_NOTIFY (IIO_BTE_NOTIFY_0 - IIO_BTE_STAT_0) 65 #define BTEOFF_INT (IIO_BTE_INT_0 - IIO_BTE_STAT_0) 70 * document for ease of reference. When possible, software should 119 #define IIO_IGFX_W_NUM_MASK ((1<<IIO_IGFX_W_NUM_BITS)-1) 122 #define IIO_IGFX_N_NUM_MASK ((1<<IIO_IGFX_N_NUM_BITS)-1) [all …]
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| /linux/Documentation/devicetree/bindings/cpu/ |
| H A D | idle-states.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> 11 - Anup Patel <anup@brainfault.org> 15 1 - Introduction 18 ARM and RISC-V systems contain HW capable of managing power consumption 19 dynamically, where cores can be put in different low-power states (ranging 22 run-time, can be specified through device tree bindings representing the [all …]
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| /linux/drivers/net/ethernet/adaptec/ |
| H A D | starfire.c | 3 Written 1998-2000 by Donald Becker. 10 the GNU General Public License (GPL), incorporated herein by reference. 25 [link no longer provides useful info -jgarzik] 56 * If using the broken firmware, data must be padded to the next 32-bit boundary. 63 * Define this if using the driver with the zero-copy patch 71 /* The user-configurable values. 81 /* Maximum number of multicast addresses to filter (vs. rx-all-multicast). 89 * Set the copy breakpoint for the copy-only-tiny-frames scheme. 95 * packets as the starfire doesn't allow for misaligned DMAs ;-( 96 * 23/10/2000 - Jes [all …]
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