/linux/Documentation/devicetree/bindings/net/ |
H A D | keystone-netcp.txt | 6 switch sub-module to send and receive packets. NetCP also includes a packet 13 includes a 3-port Ethernet switch sub-module capable of 10Gb/s and 1Gb/s rates 16 Keystone NetCP driver has a plug-in module architecture where each of the NetCP 17 sub-modules exist as a loadable kernel module which plug in to the netcp core. 18 These sub-modules are represented as "netcp-devices" in the dts bindings. It is 19 mandatory to have the ethernet switch sub-module for the ethernet interface to 20 be operational. Any other sub-module like the PA is optional. 24 ----------------------------- 26 ----------------------------- 28 |-> NetCP Devices -> | [all …]
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H A D | amlogic,gxl-mdio-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/net/amlogic,gxl-mdio-mux.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jerome Brunet <jbrunet@baylibre.com> 18 - $ref: mdio-mux.yaml# 22 const: amlogic,gxl-mdio-mux 30 clock-names: 32 - const: ref 35 - compatible [all …]
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H A D | renesas,etheravb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sergei Shtylyov <sergei.shtylyov@gmail.com> 15 - items: 16 - enum: 17 - renesas,etheravb-r8a7742 # RZ/G1H 18 - renesas,etheravb-r8a7743 # RZ/G1M 19 - renesas,etheravb-r8a7744 # RZ/G1N 20 - renesas,etheravb-r8a7745 # RZ/G1E [all …]
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/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | mediatek,mt7620-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7620-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Arınç ÜNAL <arinc.unal@arinc9.com> 11 - Sergio Paracuellos <sergio.paracuellos@gmail.com> 20 const: ralink,mt7620-pinctrl 23 '-pins$': 28 '^(.*-)?pinmux$': 31 $ref: pinmux-node.yaml# [all …]
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H A D | mediatek,mt7621-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7621-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Arınç ÜNAL <arinc.unal@arinc9.com> 11 - Sergio Paracuellos <sergio.paracuellos@gmail.com> 20 const: ralink,mt7621-pinctrl 23 '-pins$': 28 '^(.*-)?pinmux$': 31 $ref: pinmux-node.yaml# [all …]
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H A D | mediatek,mt76x8-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt76x8-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Arınç ÜNAL <arinc.unal@arinc9.com> 11 - Sergio Paracuellos <sergio.paracuellos@gmail.com> 20 const: ralink,mt76x8-pinctrl 23 '-pins$': 28 '^(.*-)?pinmux$': 31 $ref: pinmux-node.yaml# [all …]
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/linux/arch/arm/boot/dts/nuvoton/ |
H A D | nuvoton-wpcm450.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 4 #include <dt-bindings/interrupt-controller/irq.h> 8 #address-cells = <1>; 9 #size-cells = <1>; 23 #address-cells = <1>; 24 #size-cells = <0>; 27 compatible = "arm,arm926ej-s"; 33 clk24m: clock-24mhz { 35 compatible = "fixed-clock"; 36 clock-frequency = <24000000>; [all …]
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/linux/drivers/net/ethernet/ti/ |
H A D | cpts.c | 1 // SPDX-License-Identifier: GPL-2.0+ 8 #include <linux/clk-provider.h> 32 #define cpts_read32(c, r) readl_relaxed(&c->reg->r) 33 #define cpts_write32(c, v, r) writel_relaxed(v, &c->reg->r) 37 return (event->high >> PORT_NUMBER_SHIFT) & PORT_NUMBER_MASK; in cpts_event_port() 42 return time_after(jiffies, event->tmo); in event_expired() 47 return (event->high >> EVENT_TYPE_SHIFT) & EVENT_TYPE_MASK; in event_type() 60 return -1; in cpts_fifo_pop() 69 list_for_each_safe(this, next, &cpts->events) { in cpts_purge_events() 72 list_del_init(&event->list); in cpts_purge_events() [all …]
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H A D | am65-cpts.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com 9 #include <linux/clk-provider.h> 23 #include "am65-cpts.h" 164 struct clk *refclk; member 201 #define am65_cpts_write32(c, v, r) writel(v, &(c)->reg->r) 202 #define am65_cpts_read32(c, r) readl(&(c)->reg->r) 219 cpts->ts_add_val = (NSEC_PER_SEC / cpts->refclk_freq - 1) & 0x7; in am65_cpts_set_add_val() 221 am65_cpts_write32(cpts, cpts->ts_add_val, ts_add_val); in am65_cpts_set_add_val() 232 return (event->event1 & AM65_CPTS_EVENT_1_PORT_NUMBER_MASK) >> in am65_cpts_event_get_port() [all …]
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/linux/arch/arm64/boot/dts/ti/ |
H A D | k3-j722s-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clk-0 { 13 compatible = "fixed-clock"; 14 #clock-cells = <0>; 15 clock-frequency = <0>; 21 compatible = "ti,am64-wiz-10g"; 23 #address-cells = <1>; [all …]
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H A D | k3-am65-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy-am654-serdes.h> 11 compatible = "mmio-sram"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 atf-sram@0 { 21 sysfw-sram@f0000 { 25 l3cache-sram@100000 { 30 gic500: interrupt-controller@1800000 { [all …]
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/linux/Documentation/devicetree/bindings/phy/ |
H A D | ti,phy-j721e-wiz.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/phy/ti,phy-j721e-wiz.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Kishon Vijay Abraham I <kishon@ti.com> 16 - ti,j721e-wiz-16g 17 - ti,j721e-wiz-10g 18 - ti,j721s2-wiz-10g 19 - ti,am64-wiz-10g [all …]
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H A D | ti,phy-am654-serdes.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/ti,phy-am654-serdes.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 14 - Kishon Vijay Abraham I <kishon@ti.com> 19 - ti,phy-am654-serdes 24 reg-names: 26 - const: serdes 28 power-domains: 34 Three input clocks referring to left input reference clock, refclk and right input reference [all …]
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/linux/sound/soc/codecs/ |
H A D | madera.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 // Copyright (C) 2015-2019 Cirrus Logic, Inc. and 19 #include <linux/irqchip/irq-madera.h> 23 #include <sound/madera-pdata.h> 25 #include <dt-bindings/sound/madera.h> 144 dev_err(_fll->madera->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__) 146 dev_warn(_fll->madera->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__) 148 dev_dbg(_fll->madera->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__) 151 dev_err(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__) 153 dev_warn(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__) [all …]
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/linux/arch/arm/boot/dts/ti/keystone/ |
H A D | keystone-k2e-netcp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/ 9 compatible = "ti,keystone-navigator-qmss"; 10 dma-coherent; 11 #address-cells = <1>; 12 #size-cells = <1>; 15 queue-range = <0 0x2000>; 20 #address-cells = <1>; 21 #size-cells = <1>; 24 managed-queues = <0 0x2000>; [all …]
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H A D | keystone-k2l-netcp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/ 9 compatible = "ti,keystone-navigator-qmss"; 10 dma-coherent; 11 #address-cells = <1>; 12 #size-cells = <1>; 15 queue-range = <0 0x2000>; 20 #address-cells = <1>; 21 #size-cells = <1>; 24 managed-queues = <0 0x2000>; [all …]
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H A D | keystone-k2hk-netcp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/ 9 compatible = "ti,keystone-navigator-qmss"; 10 dma-coherent; 11 #address-cells = <1>; 12 #size-cells = <1>; 15 queue-range = <0 0x4000>; 20 #address-cells = <1>; 21 #size-cells = <1>; 24 managed-queues = <0 0x2000>; [all …]
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/linux/drivers/gpu/drm/bridge/ |
H A D | ti-sn65dsi86.c | 1 // SPDX-License-Identifier: GPL-2.0 134 * struct ti_sn65dsi86 - Platform data for ti-sn65dsi86 driver. 135 * @bridge_aux: AUX-bus sub device for MIPI-to-eDP bridge functionality. 136 * @gpio_aux: AUX-bus sub device for GPIO controller functionality. 137 * @aux_aux: AUX-bus sub device for eDP AUX channel functionality. 138 * @pwm_aux: AUX-bus sub device for PWM controller functionality. 147 * @refclk: Our reference clock. 153 * @ln_polrs: Value for the 4-bit LN_POLRS field of SN_ENH_FRAME_REG. 159 * serves double-duty of keeping track of the direction and 165 * each other's read-modify-write. [all …]
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/linux/arch/mips/cavium-octeon/ |
H A D | octeon-platform.c | 6 * Copyright (C) 2004-2017 Cavium, Inc. 18 #include <asm/octeon/cvmx-helper-board.h> 24 #include <asm/octeon/cvmx-uctlx-defs.h> 78 if (dev->of_node) { in octeon2_usb_clocks_start() 82 uctl_node = of_get_parent(dev->of_node); in octeon2_usb_clocks_start() 88 "refclk-frequency", &clock_rate); in octeon2_usb_clocks_start() 90 dev_err(dev, "No UCTL \"refclk-frequency\"\n"); in octeon2_usb_clocks_start() 95 "refclk-type", &clock_type); in octeon2_usb_clocks_start() 203 * Step 4: Program the power-on reset field in the UCTL in octeon2_usb_clocks_start() 204 * clock-reset-control register. in octeon2_usb_clocks_start() [all …]
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/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx6qdl-icore-rqs.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR X11 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/clock/imx6qdl-clock.h> 9 #include <dt-bindings/sound/fsl-imx-audmux.h> 17 reg_1p8v: regulator-1p8v { 18 compatible = "regulator-fixed"; 19 regulator-name = "1P8V"; 20 regulator-min-microvolt = <1800000>; 21 regulator-max-microvolt = <1800000>; 22 regulator-boot-on; [all …]
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/linux/arch/mips/boot/dts/ralink/ |
H A D | mt7628a.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #address-cells = <1>; 5 #size-cells = <1>; 6 compatible = "ralink,mt7628a-soc"; 9 #address-cells = <1>; 10 #size-cells = <0>; 19 resetc: reset-controller { 20 compatible = "ralink,rt2880-reset"; 21 #reset-cells = <1>; 24 cpuintc: interrupt-controller { [all …]
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/linux/arch/arm64/boot/dts/renesas/ |
H A D | white-hawk-cpu-common.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/common.h> 27 stdout-path = "serial0:921600n8"; 30 sn65dsi86_refclk: clk-x6 { 31 compatible = "fixed-clock"; 32 #clock-cells = <0>; 33 clock-frequency = <38400000>; 37 compatible = "gpio-keys"; [all …]
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/linux/arch/arm64/boot/dts/amlogic/ |
H A D | meson-axg.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/axg-aoclkc.h> 7 #include <dt-bindings/clock/axg-audio-clkc.h> 8 #include <dt-bindings/clock/axg-clkc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/gpio/meson-axg-gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h> 14 #include <dt-bindings/reset/amlogic,meson-axg-reset.h> [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8mp-dhcom-pdk3.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 * DHCM-iMX8ML8-C160-R409-F1638-SPI16-GE-CAN2-SD-RTC-WBTA-ADC-T-RGB-CSI2-HS-I-01D2 7 * DHCOM PCB number: 660-100 or newer 8 * PDK3 PCB number: 669-100 or newer 11 /dts-v1/; 13 #include <dt-bindings/leds/common.h> 14 #include <dt-bindings/phy/phy-imx8-pcie.h> 15 #include "imx8mp-dhcom-som.dtsi" 19 compatible = "dh,imx8mp-dhcom-pdk3", "dh,imx8mp-dhcom-som", 23 stdout-path = &uart1; [all …]
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/linux/drivers/clk/ |
H A D | clk-asm9260.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2014 Oleksij Rempel <linux@rempel-privat.de>. 10 #include <linux/clk-provider.h> 14 #include <dt-bindings/clock/alphascale,asm9260.h> 268 clk_data->num = MAX_CLKS; in asm9260_acc_init() 269 hws = clk_data->hws; in asm9260_acc_init() 271 base = of_io_request_and_map(np, 0, np->name); in asm9260_acc_init() 281 panic("%pOFn: can't register REFCLK. Check DT!", np); in asm9260_acc_init() 286 clk_hw_register_mux_table_parent_data(NULL, mc->name, mc->parent_data, in asm9260_acc_init() 287 mc->num_parents, mc->flags, base + mc->offset, in asm9260_acc_init() [all …]
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