Searched +full:r9a07g044 +full:- +full:mtu3 (Results 1 – 5 of 5) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/timer/renesas,rz-mtu3.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Renesas RZ/G2L Multi-Function Timer Pulse Unit 3 (MTU3a)10 - Biju Das <biju.das.jz@bp.renesas.com>13 This hardware block consists of eight 16-bit timer channels and one14 32-bit timer channel. It supports the following specifications:15 - Pulse input/output: 28 lines max16 - Pulse input 3 lines[all …]
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/clock/r9a07g044-cpg.h>12 compatible = "renesas,r9a07g044";13 #address-cells = <2>;14 #size-cells = <2>;16 audio_clk1: audio1-clk {17 compatible = "fixed-clock";18 #clock-cells = <0>;20 clock-frequency = <0>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)8 #include <dt-bindings/clock/r9a07g043-cpg.h>12 #address-cells = <2>;13 #size-cells = <2>;15 audio_clk1: audio1-clk {16 compatible = "fixed-clock";17 #clock-cells = <0>;19 clock-frequency = <0>;22 audio_clk2: audio2-clk {23 compatible = "fixed-clock";[all …]
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/clock/r9a07g054-cpg.h>13 #address-cells = <2>;14 #size-cells = <2>;16 audio_clk1: audio1-clk {17 compatible = "fixed-clock";18 #clock-cells = <0>;20 clock-frequency = <0>;23 audio_clk2: audio2-clk {[all …]
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)9 /dts-v1/;11 #include <dt-bindings/gpio/gpio.h>12 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>17 model = "MYIR Tech Limited Remi Pi MYB-YG2LX-REMI";18 compatible = "myir,remi-pi", "renesas,r9a07g044l2", "renesas,r9a07g044";36 stdout-path = "serial0:115200n8";39 hdmi-out {40 compatible = "hdmi-connector";42 ddc-i2c-bus = <&i2c1>;[all …]