| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | qcom,qcs8300-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,qcs8300-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Technologies, Inc. Global Clock & Reset Controller on QCS8300 10 - Taniya Das <quic_tdas@quicinc.com> 11 - Imran Shaik <quic_imrashai@quicinc.com> 15 power domains on QCS8300 17 See also: include/dt-bindings/clock/qcom,qcs8300-gcc.h 21 const: qcom,qcs8300-gcc [all …]
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| H A D | qcom,gpucc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Taniya Das <quic_tdas@quicinc.com> 11 - Imran Shaik <quic_imrashai@quicinc.com> 18 include/dt-bindings/clock/qcom,gpucc-sdm845.h 19 include/dt-bindings/clock/qcom,gpucc-sa8775p.h 20 include/dt-bindings/clock/qcom,gpucc-sc7180.h 21 include/dt-bindings/clock/qcom,gpucc-sc7280.h 22 include/dt-bindings/clock/qcom,gpucc-sc8280xp.h [all …]
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| H A D | qcom,sa8775p-videocc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sa8775p-videocc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Taniya Das <quic_tdas@quicinc.com> 16 See also: include/dt-bindings/clock/qcom,sa8775p-videocc.h 21 - qcom,qcs8300-videocc 22 - qcom,sa8775p-videocc 26 - description: Video AHB clock from GCC 27 - description: Board XO source [all …]
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| /linux/Documentation/devicetree/bindings/display/msm/ |
| H A D | qcom,qcs8300-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,qcs8300-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Technologies, Inc. QCS8300 Display MDSS 10 - Yongxing Mou <yongxing.mou@oss.qualcomm.com> 13 QCS8300 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like 16 $ref: /schemas/display/msm/mdss-common.yaml# 20 const: qcom,qcs8300-mdss 24 - description: Display AHB [all …]
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | monaco.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,qcs8300-gcc.h> 7 #include <dt-bindings/clock/qcom,rpmh.h> 8 #include <dt-bindings/clock/qcom,sa8775p-camcc.h> 9 #include <dt-bindings/clock/qcom,sa8775p-dispcc.h> 10 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h> 11 #include <dt-bindings/clock/qcom,sa8775p-videocc.h> 12 #include <dt-bindings/dma/qcom-gpi.h> 13 #include <dt-bindings/firmware/qcom,scm.h> 14 #include <dt-bindings/interconnect/qcom,icc.h> [all …]
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| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | qcom,sc8280xp-qmp-pcie-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-pcie-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Vinod Koul <vkoul@kernel.org> 19 - qcom,qcs615-qmp-gen3x1-pcie-phy 20 - qcom,qcs8300-qmp-gen4x2-pcie-phy 21 - qcom,sa8775p-qmp-gen4x2-pcie-phy 22 - qcom,sa8775p-qmp-gen4x4-pcie-phy 23 - qcom,sar2130p-qmp-gen3x2-pcie-phy [all …]
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| H A D | qcom,sc8280xp-qmp-ufs-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-ufs-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Vinod Koul <vkoul@kernel.org> 19 - items: 20 - enum: 21 - qcom,qcs615-qmp-ufs-phy 22 - const: qcom,sm6115-qmp-ufs-phy 23 - items: [all …]
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| /linux/Documentation/devicetree/bindings/usb/ |
| H A D | qcom,snps-dwc3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/qcom,snps-dwc3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Wesley Cheng <quic_wcheng@quicinc.com> 19 const: qcom,snps-dwc3 21 - compatible 26 - enum: 27 - qcom,glymur-dwc3 28 - qcom,glymur-dwc3-mp [all …]
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| H A D | qcom,dwc3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Wesley Cheng <quic_wcheng@quicinc.com> 12 # Use the combined qcom,snps-dwc3 instead 21 - compatible 26 - enum: 27 - qcom,ipq4019-dwc3 28 - qcom,ipq5018-dwc3 29 - qcom,ipq5332-dwc3 [all …]
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| /linux/Documentation/devicetree/bindings/crypto/ |
| H A D | qcom,inline-crypto-engine.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/crypto/qcom,inline-crypto-engine.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 15 - enum: 16 - qcom,kaanapali-inline-crypto-engine 17 - qcom,qcs8300-inline-crypto-engine 18 - qcom,sa8775p-inline-crypto-engine 19 - qcom,sc7180-inline-crypto-engine [all …]
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| H A D | qcom-qce.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/crypto/qcom-qce.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 11 - Konrad Dybcio <konradybcio@kernel.org> 20 - const: qcom,crypto-v5.1 24 - const: qcom,crypto-v5.4 28 - items: 29 - enum: [all …]
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| /linux/Documentation/devicetree/bindings/firmware/ |
| H A D | qcom,scm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 16 - Bjorn Andersson <bjorn.andersson@linaro.org> 17 - Robert Marko <robimarko@gmail.com> 18 - Guru Das Srinagesh <quic_gurus@quicinc.com> 23 - enum: 24 - qcom,scm-apq8064 25 - qcom,scm-apq8084 26 - qcom,scm-glymur [all …]
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| /linux/Documentation/devicetree/bindings/nvmem/ |
| H A D | qcom,qfprom.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 13 - $ref: nvmem.yaml# 14 - $ref: nvmem-deprecated-cells.yaml# 19 - enum: 20 - qcom,apq8064-qfprom 21 - qcom,apq8084-qfprom 22 - qcom,ipq5018-qfprom [all …]
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| /linux/drivers/clk/qcom/ |
| H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o 4 clk-qcom-y += common.o 5 clk-qcom-y += clk-regmap.o 6 clk-qcom-y += clk-alpha-pll.o 7 clk-qcom-y += clk-pll.o 8 clk-qcom-y += clk-rcg.o 9 clk-qcom-y += clk-rcg2.o 10 clk-qcom-y += clk-branch.o 11 clk-qcom-y += clk-regmap-divider.o [all …]
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| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 242 CMN PLL consumes the AHB/SYS clocks from GCC and supplies 243 the output clocks to the networking hardware and GCC blocks. 326 NSSCC receives the clock sources from GCC, CMN PLL and UNIPHY (PCS). 581 tristate "QCS8300 Global Clock Controller" 586 QCS8300 devices. 1425 Say Y if you want to toggle LPASS-adjacent resets within 1555 tristate "High-Frequency PLL (HFPLL) Clock Controller" 1557 Support for the high-frequency PLLs present on Qualcomm devices. 1564 Support for the Krait ACC and GCC clock controllers. Say Y
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| H A D | gcc-qcs8300.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <linux/clk-provider.h> 13 #include <dt-bindings/clock/qcom,qcs8300-gcc.h> 15 #include "clk-alpha-pll.h" 16 #include "clk-branch.h" 17 #include "clk-pll.h" 18 #include "clk-rcg.h" 19 #include "clk-regmap.h" 20 #include "clk-regmap-divider.h" 21 #include "clk-regmap-mux.h" [all …]
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| /linux/drivers/phy/qualcomm/ |
| H A D | phy-qcom-qmp-usb.c | 1 // SPDX-License-Identifier: GPL-2.0 7 #include <linux/clk-provider.h> 22 #include "phy-qcom-qmp-common.h" 24 #include "phy-qcom-qmp.h" 25 #include "phy-qcom-qmp-pcs-misc-v3.h" 26 #include "phy-qcom-qmp-pcs-misc-v4.h" 27 #include "phy-qcom-qmp-pcs-usb-v4.h" 28 #include "phy-qcom-qmp-pcs-usb-v5.h" 29 #include "phy-qcom-qmp-pcs-usb-v6.h" 30 #include "phy-qcom-qmp-pcs-usb-v7.h" [all …]
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| H A D | phy-qcom-qmp-pcie.c | 1 // SPDX-License-Identifier: GPL-2.0 7 #include <linux/clk-provider.h> 25 #include <dt-bindings/phy/phy-qcom-qmp.h> 27 #include "phy-qcom-qmp-common.h" 29 #include "phy-qcom-qmp.h" 30 #include "phy-qcom-qmp-pcs-misc-v3.h" 31 #include "phy-qcom-qmp-pcs-pcie-v4.h" 32 #include "phy-qcom-qmp-pcs-pcie-v4_20.h" 33 #include "phy-qcom-qmp-pcs-pcie-v5.h" 34 #include "phy-qcom-qmp-pcs-pcie-v5_20.h" [all …]
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