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/freebsd/sys/contrib/device-tree/Bindings/leds/
H A Dleds-lp55xx.txt4 - compatible: one of
11 - reg: I2C slave address
12 - clock-mode: Input clock mode, (0: automode, 1: internal, 2: external)
15 - led-cur: Current setting at each led channel (mA x10, 0 if led is not connected)
16 - max-cur: Maximun current at each led channel.
19 - enable-gpio: GPIO attached to the chip's enable pin
20 - label: Used for naming LEDs
21 - pwr-sel: LP8501 specific property. Power selection for output channels.
28 - chan-name (optional): name of channel
29 - linux,default-trigger (optional): see
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H A Dleds-lp55xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-lp55x
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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dbrcm,iproc-gpio.txt5 - compatible:
6 "brcm,iproc-gpio" for the generic iProc based GPIO controller IP that
7 supports full-featured pinctrl and GPIO functions used in various iProc
10 May contain an SoC-specific compatibility string to accommodate any
11 SoC-specific features
13 "brcm,cygnus-ccm-gpio", "brcm,cygnus-asiu-gpio", or
14 "brcm,cygnus-crmu-gpio" for Cygnus SoCs
16 "brcm,iproc-nsp-gpio" for the iProc NSP SoC that has drive strength support
19 "brcm,iproc-stingray-gpio" for the iProc Stingray SoC that has the general
23 - reg:
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/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3288-veyron-fievel.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron.dtsi"
10 #include "rk3288-veyron-analog-audio.dtsi"
14 compatible = "google,veyron-fievel-rev8", "google,veyron-fievel-rev7",
15 "google,veyron-fievel-rev6", "google,veyron-fievel-rev5",
16 "google,veyron-fievel-rev4", "google,veyron-fievel-rev3",
17 "google,veyron-fievel-rev2", "google,veyron-fievel-rev1",
18 "google,veyron-fievel-rev0", "google,veyron-fievel",
22 compatible = "regulator-fixed";
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dmba6ulx.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2018-2022 TQ-Systems GmbH
4 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
8 model = "TQ-Systems MBA6ULx Baseboard";
18 stdout-pat
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/freebsd/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra124-apalis-v1.2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2016-2018 Toradex AG
7 #include "tegra124-apalis-emc.dtsi"
21 avddio-pex-supply = <&reg_1v05_vdd>;
22 avdd-pex-pl
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H A Dtegra30-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
16 nvidia,hpd-gpio =
18 pll-supply = <&reg_1v8_avdd_hdmi_pll>;
19 vdd-supply = <&reg_3v3_avdd_hdmi>;
24 lan-reset-
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H A Dtegra124-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Copyright 2016-2019 Toradex AG
7 #include "tegra124-apalis-emc.dtsi"
20 avddio-pex-supply = <&reg_1v05_vdd>;
21 avdd-pex-pl
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H A Dtegra30-apalis-v1.1.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
16 avdd-pexa-supply = <&vdd2_reg>;
17 avdd-pexb-supply = <&vdd2_reg>;
18 avdd-pex-pll-suppl
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H A Dtegra30-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 avdd-pexa-supply = <&vdd2_reg>;
16 avdd-pexb-supply = <&vdd2_reg>;
17 avdd-pex-pll-suppl
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H A Dtegra124-jetson-tk1.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
7 #include "tegra124-jetson-tk1-emc.dtsi"
11 compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
17 /* This order keeps the mapping DB9 connector <-> ttyS
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H A Dtegra124-venice2.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
18 stdout-path = "serial0:115200n8";
29 vdd-supply = <&vdd_3v3_hdmi>;
30 pll-supply = <&vdd_hdmi_pll>;
31 hdmi-supply = <&vdd_5v0_hdmi>;
33 nvidia,ddc-i2
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H A Dtegra114-dalmore.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include <dt-bindings/input/input.h>
23 stdout-path = "serial0:115200n8";
34 hdmi-supply = <&vdd_5v0_hdmi>;
35 vdd-supply = <&vdd_hdmi_reg>;
36 pll-supply = <&palmas_smps3_reg>;
38 nvidia,ddc-i2
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/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3399-gru.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
10 #include "rk3399-op1-opp.dtsi"
19 stdout-path = "serial2:115200n8";
28 * - Rails that only connect to the EC (or devices that the EC talks to)
30 * - Rail
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/freebsd/sys/contrib/device-tree/src/arm64/renesas/
H A Drzg2lc-smarc-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irqc-rzg2
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H A Drzg2l-smarc-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irqc-rzg2
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/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra132-norrin.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
18 stdout-path = "serial0:115200n8";
30 vdd-supply = <&vdd_3v3_hdmi>;
31 pll-supply = <&vdd_hdmi_pll>;
32 hdmi-supply = <&vdd_5v0_hdmi>;
34 nvidia,ddc-i2
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dmsm8996-sony-xperia-tone.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
16 #include <dt-binding
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H A Dsc8280xp-lenovo-thinkpad-x13s.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/iio/qcom,spmi-adc7-pm8350.h>
11 #include <dt-binding
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H A Dsdm845-db845c.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-binding
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/freebsd/sys/dev/ath/ath_hal/ar5416/
H A Dar5416reg.h1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
34 #define AR_WA 0x4004 /* PCIE work-arounds */
120 /* RTC_DERIVED_* - only for AR9130 */
149 #define AR_TXOP_X 0x81ec /* txop for legacy non-qos */
154 /* generic timers based on tsf - all uS */
284 #define AR_AHB_PAGE_SIZE_1K 0x00000000 /* set page-size as 1k */
285 #define AR_AHB_PAGE_SIZE_2K 0x00000008 /* set page-size as 2k */
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/freebsd/sbin/ifconfig/
H A Difieee80211.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
30 /*-
131 /* XXX should also figure out where to put these for k/u-space sharing. */
255 errx(-1, "missing or corrupted regdomain database"); in getregdata()
270 const struct ieee80211_channel *fc = &chaninfo->ic_chans[i]; in canpromote()
273 if ((fc->ic_flags & from) != from) in canpromote()
276 if (i+1 < chaninfo->ic_nchans && in canpromote()
277 chaninfo->ic_chans[i+1].ic_freq == fc->ic_freq && in canpromote()
278 (chaninfo->ic_chans[i+1].ic_flags & to) == to) in canpromote()
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/freebsd/sys/contrib/dev/rtw89/
H A Dcore.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2019-2020 Realtek Corporation
50 #define RTW89_RSSI_RAW_TO_DBM(rssi) ((s8)((rssi) >> RSSI_FACTOR) - MAX_RSSI)
107 RTW89_CH_6G_BAND_IDX6, /* Ultra-high */
108 RTW89_CH_6G_BAND_IDX7, /* Ultra-high */
256 * RTW89_ADDR_CAM_SEC_ALL_UNI : 0 -
1608 s8 pwr; /* dbm_per_MHz */ global() member
3780 enum rtw89_pkt_drop_sel sel; global() member
5120 rtw89_chip_stop_sch_tx(struct rtw89_dev * rtwdev,u8 mac_idx,u32 * tx_en,enum rtw89_sch_tx_sel sel) rtw89_chip_stop_sch_tx() argument
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H A Dfw.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
65 u32 h2c_desc_size = rtwdev->chip->h2c_desc_size; in rtw89_fw_check_rdy()
74 memset(skb->data, 0, len); in rtw89_fw_check_rdy()
91 const struct rtw89_mac_gen_def *mac = rtwdev->chi in rtw89_fw_hdr_parser_v0()
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/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_eeprom.c91 AH9300(ah)->calibration_data_source = source; in ar9300_calibration_data_set()
100 return AH9300(ah)->calibration_data_source; in ar9300_calibration_data_get()
114 AH9300(ah)->calibration_data_source_address = size; in ar9300_calibration_data_address_set()
123 return AH9300(ah)->calibration_data_source_address; in ar9300_calibration_data_address_get()
150 mptr = &ahp->ah_eeprom; in ar9300_eeprom_template_install()
163 return -1; in ar9300_eeprom_template_install()
174 nptr = -1; in ar9300_eeprom_restore_something()
180 AH9300(ah)->calibration_data_source = calibration_data_none; in ar9300_eeprom_restore_something()
181 AH9300(ah)->calibration_data_source_address = 0; in ar9300_eeprom_restore_something()
194 AH9300(ah)->calibration_data_source = calibration_data_none; in ar9300_eeprom_restore_something()
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