Home
last modified time | relevance | path

Searched +full:pre +full:- +full:timeout (Results 1 – 25 of 518) sorted by relevance

12345678910>>...21

/linux/drivers/watchdog/
H A Ddw_wdt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2010-2011 Picochip Ltd., Jamie Iles
7 * in the many subsystems. The watchdog has 16 different timeout periods
51 /* There are sixteen TOPs (timeout periods) that can be set in the watchdog. */
93 u32 timeout; member
104 return readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET) & in dw_wdt_is_enabled()
112 val = readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET); in dw_wdt_update_mode()
117 writel(val, dw_wdt->regs + WDOG_CONTROL_REG_OFFSET); in dw_wdt_update_mode()
119 dw_wdt->rmod = rmod; in dw_wdt_update_mode()
123 unsigned int timeout, u32 *top_val) in dw_wdt_find_best_top() argument
[all …]
H A Ddavinci_wdt.c1 // SPDX-License-Identifier: GPL-2.0
7 * Copyright (C) 2006-2013 Texas Instruments.
24 #define MODULE_NAME "DAVINCI-WDT: "
60 * @base - base io address of WD device
61 * @clk - source clock of WDT
62 * @wdd - hold watchdog device as is in WDT core
77 wdt_freq = clk_get_rate(davinci_wdt->clk); in davinci_wdt_start()
80 iowrite32(0, davinci_wdt->base + TCR); in davinci_wdt_start()
81 /* reset timer, set mode to 64-bit watchdog, and unreset */ in davinci_wdt_start()
82 iowrite32(0, davinci_wdt->base + TGCR); in davinci_wdt_start()
[all …]
H A Dlpc18xx_wdt.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * -----
9 * The Watchdog consists of a fixed divide-by-4 clock pre-scaler and a 24-bit
35 /* Clock pre-scaler */
38 /* Timeout values in seconds */
70 spin_lock_irqsave(&lpc18xx_wdt->lock, flags); in lpc18xx_wdt_feed()
71 writel(LPC18XX_WDT_FEED_MAGIC1, lpc18xx_wdt->base + LPC18XX_WDT_FEED); in lpc18xx_wdt_feed()
72 writel(LPC18XX_WDT_FEED_MAGIC2, lpc18xx_wdt->base + LPC18XX_WDT_FEED); in lpc18xx_wdt_feed()
73 spin_unlock_irqrestore(&lpc18xx_wdt->lock, flags); in lpc18xx_wdt_feed()
81 struct watchdog_device *wdt_dev = &lpc18xx_wdt->wdt_dev; in lpc18xx_wdt_timer_feed()
[all …]
H A Dpic32-dmt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include <asm/mach-pic32/pic32.h>
49 writel(DMT_ON, PIC32_SET(dmt->regs + DMTCON_REG)); in dmt_enable()
54 writel(DMT_ON, PIC32_CLR(dmt->regs + DMTCON_REG)); in dmt_disable()
66 val = readl(dmt->regs + DMTSTAT_REG); in dmt_bad_status()
69 return -EAGAIN; in dmt_bad_status()
77 u32 timeout = 500; in dmt_keepalive() local
79 /* set pre-clear key */ in dmt_keepalive()
80 writel(DMT_STEP1_KEY << 8, dmt->regs + DMTPRECLR_REG); in dmt_keepalive()
83 while (--timeout) { in dmt_keepalive()
[all …]
H A Dda9063_wdt.c1 // SPDX-License-Identifier: GPL-2.0+
25 * Watchdog selector to timeout in seconds.
27 * others: timeout = 2048 ms * 2^(TWDSCALE-1).
33 #define DA9063_TWDSCALE_MAX (ARRAY_SIZE(wdt_timeout) - 1)
52 * Read the currently active timeout.
59 regmap_read(da9063->regmap, DA9063_REG_CONTROL_D, &val); in da9063_wdt_read_timeout()
66 return regmap_update_bits(da9063->regmap, DA9063_REG_CONTROL_D, in da9063_wdt_disable_timer()
72 da9063_wdt_update_timeout(struct da9063 *da9063, unsigned int timeout) in da9063_wdt_update_timeout() argument
78 * The watchdog triggers a reboot if a timeout value is already in da9063_wdt_update_timeout()
79 * programmed because the timeout value combines two functions in da9063_wdt_update_timeout()
[all …]
H A Dlantiq_wdt.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2017 Hauke Mehrtens <hauke@hauke-m.de>
44 /* Pre-warning limit set to 1/16 of max WDT period */
49 #define LTQ_WDT_CR_MAX_TIMEOUT ((1 << 16) - 1) /* The reload field is 16 bit */
70 return __raw_readl(priv->membase + offset); in ltq_wdt_r32()
75 __raw_writel(val, priv->membase + offset); in ltq_wdt_w32()
102 u32 timeout; in ltq_wdt_start() local
104 timeout = wdt->timeout * priv->clk_rate; in ltq_wdt_start()
107 /* write the second magic plus the configuration and new timeout */ in ltq_wdt_start()
110 LTQ_WDT_CR_PW2 | timeout, in ltq_wdt_start()
[all …]
H A Dkeembay_wdt.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Watchdog driver for Intel Keem Bay non-secure watchdog.
8 #include <linux/arm-smccc.h>
20 /* Non-secure watchdog register offsets */
40 static unsigned int timeout = WDT_TIMEOUT; variable
41 module_param(timeout, int, 0);
42 MODULE_PARM_DESC(timeout, "Watchdog timeout period in seconds (default = "
61 return readl(wdt->base + offset); in keembay_wdt_readl()
66 writel(WDT_UNLOCK, wdt->base + TIM_SAFE); in keembay_wdt_writel()
67 writel(val, wdt->base + offset); in keembay_wdt_writel()
[all …]
/linux/Documentation/devicetree/bindings/watchdog/
H A Dmediatek,mtk-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/mediatek,mtk-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matthias Brugger <matthias.bgg@gmail.com>
13 The watchdog supports a pre-timeout interrupt that fires
14 timeout-sec/2 before the expiry.
17 - $ref: watchdog.yaml#
22 - enum:
23 - mediatek,mt2712-wdt
[all …]
H A Dnuvoton,npcm-wdt.txt3 Nuvoton NPCM timer module provides five 24-bit timer counters, and a watchdog.
4 The watchdog supports a pre-timeout interrupt that fires 10ms before the
8 - compatible : "nuvoton,npcm750-wdt" for NPCM750 (Poleg), or
9 "nuvoton,wpcm450-wdt" for WPCM450 (Hermon), or
10 "nuvoton,npcm845-wdt" for NPCM845 (Arbel).
11 - reg : Offset and length of the register set for the device.
12 - interrupts : Contain the timer interrupt with flags for
16 - clocks : phandle of timer reference clock.
17 - clock-frequency : The frequency in Hz of the clock that drives the NPCM7xx
21 - timeout-sec : Contains the watchdog timeout in seconds
[all …]
H A Dst,stm32-iwdg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/st,stm32-iwdg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yannick Fertre <yannick.fertre@foss.st.com>
11 - Christophe Roullier <christophe.roullier@foss.st.com>
14 - $ref: watchdog.yaml#
19 - st,stm32-iwdg
20 - st,stm32mp1-iwdg
27 - description: Low speed clock
[all …]
H A Dsnps,dw-wdt.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/watchdog/snps,dw-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jamie Iles <jamie@jamieiles.com>
13 - $ref: watchdog.yaml#
18 - const: snps,dw-wdt
19 - items:
20 - enum:
21 - rockchip,px30-wdt
[all …]
/linux/drivers/gpu/drm/i915/selftests/
H A Dintel_scheduler_helpers.c1 // SPDX-License-Identifier: MIT
37 saved->reset = engine->i915->params.reset; in intel_selftest_modify_policy()
38 saved->flags = engine->flags; in intel_selftest_modify_policy()
39 saved->timeslice = engine->props.timeslice_duration_ms; in intel_selftest_modify_policy()
40 saved->preempt_timeout = engine->props.preempt_timeout_ms; in intel_selftest_modify_policy()
45 * Enable force pre-emption on time slice expiration in intel_selftest_modify_policy()
46 * together with engine reset on pre-emption timeout. in intel_selftest_modify_policy()
49 * Also, reduce the preemption timeout to something in intel_selftest_modify_policy()
52 engine->i915->params.reset = 2; in intel_selftest_modify_policy()
53 engine->flags |= I915_ENGINE_WANT_FORCED_PREEMPTION; in intel_selftest_modify_policy()
[all …]
/linux/drivers/media/dvb-frontends/
H A Ddrxk_hard.h1 /* SPDX-License-Identifier: GPL-2.0 */
24 #define SCU_RESULT_SIZE -4
25 #define SCU_RESULT_INVPAR -3
26 #define SCU_RESULT_UNKSTD -2
27 #define SCU_RESULT_UNKCMD -1
189 u16 top; /* rf-agc take over point */
190 u16 cut_off_current; /* rf-agc is accelerated if output current
191 is below cut-off current */
197 u16 reference; /* pre SAW reference value, range 0 .. 31 */
198 bool use_pre_saw; /* TRUE algorithms must use pre SAW sense */
[all …]
/linux/drivers/input/touchscreen/
H A Dimx6ul_tsc.c1 // SPDX-License-Identifier: GPL-2.0
109 unsigned long timeout; in imx6ul_adc_init() local
111 reinit_completion(&tsc->completion); in imx6ul_adc_init()
113 adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG); in imx6ul_adc_init()
118 if (tsc->average_enable) { in imx6ul_adc_init()
120 adc_cfg |= (tsc->average_select) << ADC_AVGS_SHIFT; in imx6ul_adc_init()
123 writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG); in imx6ul_adc_init()
128 writel(adc_hc, tsc->adc_regs + REG_ADC_HC0); in imx6ul_adc_init()
131 adc_gc = readl(tsc->adc_regs + REG_ADC_GC); in imx6ul_adc_init()
133 if (tsc->average_enable) in imx6ul_adc_init()
[all …]
/linux/drivers/gpu/ipu-v3/
H A Dipu-pre.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <video/imx-ipu-v3.h>
16 #include "ipu-prv.h"
125 of_parse_phandle(dev->of_node, name, index); in ipu_pre_lookup_by_phandle()
126 struct ipu_pre *pre; in ipu_pre_lookup_by_phandle() local
129 list_for_each_entry(pre, &ipu_pre_list, list) { in ipu_pre_lookup_by_phandle()
130 if (pre_node == pre->dev->of_node) { in ipu_pre_lookup_by_phandle()
132 device_link_add(dev, pre->dev, in ipu_pre_lookup_by_phandle()
134 return pre; in ipu_pre_lookup_by_phandle()
142 int ipu_pre_get(struct ipu_pre *pre) in ipu_pre_get() argument
[all …]
/linux/drivers/i2c/busses/
H A Di2c-ali1563.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * i2c-ali1563.c - i2c driver for the ALi 1563 Southbridge
68 int timeout; in ali1563_transaction() local
69 int status = -EIO; in ali1563_transaction()
71 dev_dbg(&a->dev, "Transaction (pre): STS=%02x, CNTL1=%02x, " in ali1563_transaction()
79 dev_err(&a->dev, "ali1563: Trying to reset busy device\n"); in ali1563_transaction()
83 return -EBUSY; in ali1563_transaction()
87 timeout = ALI1563_MAX_TIMEOUT; in ali1563_transaction()
90 } while (((data = inb_p(SMB_HST_STS)) & HST_STS_BUSY) && --timeout); in ali1563_transaction()
92 dev_dbg(&a->dev, "Transaction (post): STS=%02x, CNTL1=%02x, " in ali1563_transaction()
[all …]
/linux/drivers/scsi/lpfc/
H A Dlpfc_sli.h4 * Copyright (C) 2017-2024 Broadcom. All Rights Reserved. The term *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
16 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
73 uint16_t iotag; /* pre-assigned IO tag */
74 uint16_t sli4_lxritag; /* logical pre-assigned XRI. */
75 uint16_t sli4_xritag; /* pre-assigned XRI, (OXID) tag. */
80 union lpfc_wqe128 wqe; /* SLI-4 */
81 IOCB_t iocb; /* SLI-3 */
86 /* Pack the u8's together and make them module-4. */
91 u8 retry; /* retry counter for IOCB cmd - if needed */
[all …]
/linux/drivers/clk/samsung/
H A Dclk-cpu.c1 // SPDX-License-Identifier: GPL-2.0-only
37 #include <linux/clk-provider.h>
40 #include "clk-cpu.h"
48 * struct exynos_cpuclk_regs - Register offsets for CPU related clocks
71 * struct exynos_cpuclk_chip - Chip specific data for CPU clock
83 * struct exynos_cpuclk - information about clock supplied to a CPU core
94 * @chip: chip-specific data for the CPU clock
111 /* ---- Common code --------------------------------------------------------- */
126 unsigned long timeout = jiffies + msecs_to_jiffies(MAX_STAB_TIME); in wait_until_divider_stable() local
131 } while (time_before(jiffies, timeout)); in wait_until_divider_stable()
[all …]
/linux/drivers/accel/ivpu/
H A Divpu_pm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020-2024 Intel Corporation
34 MODULE_PARM_DESC(tdr_timeout_ms, "Timeout for device hang detection, in milliseconds, 0 - default");
40 struct ivpu_fw_info *fw = vdev->fw; in ivpu_pm_prepare_cold_boot()
46 fw->entry_point = fw->cold_boot_entry_point; in ivpu_pm_prepare_cold_boot()
51 struct ivpu_fw_info *fw = vdev->fw; in ivpu_pm_prepare_warm_boot()
52 struct vpu_boot_params *bp = ivpu_bo_vaddr(fw->mem); in ivpu_pm_prepare_warm_boot()
54 if (!bp->save_restore_ret_address) { in ivpu_pm_prepare_warm_boot()
59 ivpu_dbg(vdev, FW_BOOT, "Save/restore entry point %llx", bp->save_restore_ret_address); in ivpu_pm_prepare_warm_boot()
60 fw->entry_point = bp->save_restore_ret_address; in ivpu_pm_prepare_warm_boot()
[all …]
/linux/Documentation/filesystems/
H A Dorangefs.rst1 .. SPDX-License-Identifier: GPL-2.0
7 OrangeFS is an LGPL userspace scale-out parallel storage system. It is ideal
51 On Fedora, install orangefs and orangefs-server::
53 dnf -y install orangefs orangefs-server
64 pvfs2-client-core.
68 pvfs2-server -f /etc/orangefs/orangefs.conf
72 systemctl start orangefs-server
76 pvfs2-ping -m /pvfsmnt
81 systemctl start orangefs-client
85 mount -t pvfs2 tcp://localhost:3334/orangefs /pvfsmnt
[all …]
/linux/Documentation/w1/slaves/
H A Dw1_ds28e17.rst7 * Maxim DS28E17 1-Wire-to-I2C Master Bridge
19 -----------
30 SUBSYSTEM=="i2c-dev", KERNEL=="i2c-[0-9]*", ATTRS{name}=="w1-19-*", \
31 SYMLINK+="i2c-$attr{name}"
33 may be used to create stable /dev/i2c- entries based on the unique id of the
41 it is connected. The power-on default of the DS28E17 is 400kBaud, but
42 chips may come and go on the Onewire bus without being de-powered and
44 reconnected DS28E17 device on the Onewire bus, it will re-apply this
55 needed timeout cannot be pre-calculated correctly. As the w1_ds28e17
60 19-00000002dbd8: busy timeout" in the kernel log.
[all …]
/linux/drivers/virt/vboxguest/
H A Dvboxguest_core.h1 /* SPDX-License-Identifier: (GPL-2.0 OR CDDL-1.0) */
2 /* Copyright (C) 2010-2016 Oracle Corporation */
39 /** Pre-allocated vmmdev_memballoon_info req for query */
41 /** Pre-allocated vmmdev_memballoon_change req for inflate / deflate */
78 * Dummy page and vmap address for reserved kernel virtual-address
87 /** Wait-for-event list for threads waiting for multiple events. */
91 /** Wait-for-event list for threads waiting on HGCM async completion. */
93 /** Pre-allocated hgcm cancel2 req. for cancellation on timeout */
97 /** Pre-allocated mouse-status request for the input-device handling. */
153 /** "vboxguest" char-device */
[all …]
/linux/tools/testing/selftests/net/netfilter/
H A Dnft_queue.sh11 timeout=5
21 rm -f "$TMPINPUT"
22 rm -f "$TMPFILE0"
23 rm -f "$TMPFILE1"
24 rm -f "$TMPFILE2" "$TMPFILE3"
27 checktool "nft --version" "test without nft tool"
28 checktool "socat -h" "run test without socat"
30 modprobe -q sctp
53 ip -net "$nsrouter" link set veth0 up
54 ip -net "$nsrouter" addr add 10.0.1.1/24 dev veth0
[all …]
/linux/drivers/spi/
H A Dspi-imx.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
11 #include <linux/dma-mapping.h>
30 #include <linux/dma/imx-dma.h>
138 return d->devtype_data->devtype == IMX27_CSPI; in is_imx27_cspi()
143 return d->devtype_data->devtype == IMX35_CSPI; in is_imx35_cspi()
148 return d->devtype_data->devtype == IMX51_ECSPI; in is_imx51_ecspi()
153 return d->devtype_data->devtype == IMX53_ECSPI; in is_imx53_ecspi()
159 unsigned int val = readl(spi_imx->base + MXC_CSPIRXDATA); \
161 if (spi_imx->rx_buf) { \
[all …]
/linux/tools/testing/selftests/net/tcp_ao/
H A Drestore.c1 // SPDX-License-Identifier: GPL-2.0
3 /* This is over-simplified TCP_REPAIR for TCP_ESTABLISHED sockets
4 * It tests that TCP-AO enabled connection can be restored.
6 * https://github.com/checkpoint-restore/criu/blob/criu-dev/soccr/soccr.h
23 time_t timeout; in try_server_run() local
26 if (fault(TIMEOUT)) in try_server_run()
30 if (test_add_key(lsk, DEFAULT_TEST_PASSWORD, this_ip_dest, -1, 100, 100)) in try_server_run()
54 timeout = fault(TIMEOUT) ? TEST_RETRANSMIT_SEC : TEST_TIMEOUT_SEC; in try_server_run()
55 bytes = test_server_run(sk, quota, timeout); in try_server_run()
56 if (fault(TIMEOUT)) { in try_server_run()
[all …]

12345678910>>...21