19807a888SSerge Semin# SPDX-License-Identifier: GPL-2.0-only 29807a888SSerge Semin%YAML 1.2 39807a888SSerge Semin--- 49807a888SSerge Semin$id: http://devicetree.org/schemas/watchdog/snps,dw-wdt.yaml# 59807a888SSerge Semin$schema: http://devicetree.org/meta-schemas/core.yaml# 69807a888SSerge Semin 79807a888SSerge Semintitle: Synopsys Designware Watchdog Timer 89807a888SSerge Semin 99807a888SSerge Seminmaintainers: 109807a888SSerge Semin - Jamie Iles <jamie@jamieiles.com> 119807a888SSerge Semin 120f108ccbSKrzysztof KozlowskiallOf: 130f108ccbSKrzysztof Kozlowski - $ref: watchdog.yaml# 140f108ccbSKrzysztof Kozlowski 159807a888SSerge Seminproperties: 169807a888SSerge Semin compatible: 17e629fffcSJohan Jonker oneOf: 18e629fffcSJohan Jonker - const: snps,dw-wdt 19e629fffcSJohan Jonker - items: 20e629fffcSJohan Jonker - enum: 211080f8a5SJohan Jonker - rockchip,px30-wdt 22e629fffcSJohan Jonker - rockchip,rk3066-wdt 235946401eSJohan Jonker - rockchip,rk3128-wdt 24e629fffcSJohan Jonker - rockchip,rk3188-wdt 251080f8a5SJohan Jonker - rockchip,rk3228-wdt 26e629fffcSJohan Jonker - rockchip,rk3288-wdt 271080f8a5SJohan Jonker - rockchip,rk3308-wdt 281080f8a5SJohan Jonker - rockchip,rk3328-wdt 29e629fffcSJohan Jonker - rockchip,rk3368-wdt 301080f8a5SJohan Jonker - rockchip,rk3399-wdt 31e4c721d7SLiang Chen - rockchip,rk3568-wdt 32*0c36680cSDetlev Casanova - rockchip,rk3576-wdt 33e1a234ebSShreeya Patel - rockchip,rk3588-wdt 341080f8a5SJohan Jonker - rockchip,rv1108-wdt 35e629fffcSJohan Jonker - const: snps,dw-wdt 369807a888SSerge Semin 379807a888SSerge Semin reg: 389807a888SSerge Semin maxItems: 1 399807a888SSerge Semin 409807a888SSerge Semin interrupts: 419807a888SSerge Semin description: DW Watchdog pre-timeout interrupt 429807a888SSerge Semin maxItems: 1 439807a888SSerge Semin 449807a888SSerge Semin clocks: 455b4f68f8SSerge Semin minItems: 1 469807a888SSerge Semin items: 479807a888SSerge Semin - description: Watchdog timer reference clock 485b4f68f8SSerge Semin - description: APB3 interface clock 495b4f68f8SSerge Semin 505b4f68f8SSerge Semin clock-names: 515b4f68f8SSerge Semin minItems: 1 525b4f68f8SSerge Semin items: 535b4f68f8SSerge Semin - const: tclk 545b4f68f8SSerge Semin - const: pclk 559807a888SSerge Semin 569807a888SSerge Semin resets: 579807a888SSerge Semin description: Phandle to the DW Watchdog reset lane 589807a888SSerge Semin maxItems: 1 599807a888SSerge Semin 604ce4e7fdSSerge Semin snps,watchdog-tops: 614ce4e7fdSSerge Semin $ref: /schemas/types.yaml#/definitions/uint32-array 624ce4e7fdSSerge Semin description: | 634ce4e7fdSSerge Semin DW APB Watchdog custom timer intervals - Timeout Period ranges (TOPs). 644ce4e7fdSSerge Semin Each TOP is a number loaded into the watchdog counter at the moment of 654ce4e7fdSSerge Semin the timer restart. The counter decrementing happens each tick of the 664ce4e7fdSSerge Semin reference clock. Therefore the TOPs array is equivalent to an array of 674ce4e7fdSSerge Semin the timer expiration intervals supported by the DW APB Watchdog. Note 684ce4e7fdSSerge Semin DW APB Watchdog IP-core might be synthesized with fixed TOP values, 694ce4e7fdSSerge Semin in which case this property is unnecessary with default TOPs utilized. 704ce4e7fdSSerge Semin default: [0x0001000 0x0002000 0x0004000 0x0008000 714ce4e7fdSSerge Semin 0x0010000 0x0020000 0x0040000 0x0080000 724ce4e7fdSSerge Semin 0x0100000 0x0200000 0x0400000 0x0800000 734ce4e7fdSSerge Semin 0x1000000 0x2000000 0x4000000 0x8000000] 744ce4e7fdSSerge Semin minItems: 16 754ce4e7fdSSerge Semin maxItems: 16 764ce4e7fdSSerge Semin 779807a888SSerge Seminrequired: 789807a888SSerge Semin - compatible 799807a888SSerge Semin - reg 809807a888SSerge Semin - clocks 819807a888SSerge Semin 820f108ccbSKrzysztof KozlowskiunevaluatedProperties: false 830f108ccbSKrzysztof Kozlowski 849807a888SSerge Seminexamples: 859807a888SSerge Semin - | 869807a888SSerge Semin watchdog@ffd02000 { 879807a888SSerge Semin compatible = "snps,dw-wdt"; 889807a888SSerge Semin reg = <0xffd02000 0x1000>; 899807a888SSerge Semin interrupts = <0 171 4>; 909807a888SSerge Semin clocks = <&per_base_clk>; 919807a888SSerge Semin resets = <&wdt_rst>; 929807a888SSerge Semin }; 934ce4e7fdSSerge Semin 944ce4e7fdSSerge Semin - | 954ce4e7fdSSerge Semin watchdog@ffd02000 { 964ce4e7fdSSerge Semin compatible = "snps,dw-wdt"; 974ce4e7fdSSerge Semin reg = <0xffd02000 0x1000>; 984ce4e7fdSSerge Semin interrupts = <0 171 4>; 994ce4e7fdSSerge Semin clocks = <&per_base_clk>; 1004ce4e7fdSSerge Semin clock-names = "tclk"; 1014ce4e7fdSSerge Semin snps,watchdog-tops = <0x000000FF 0x000001FF 0x000003FF 1024ce4e7fdSSerge Semin 0x000007FF 0x0000FFFF 0x0001FFFF 1034ce4e7fdSSerge Semin 0x0003FFFF 0x0007FFFF 0x000FFFFF 1044ce4e7fdSSerge Semin 0x001FFFFF 0x003FFFFF 0x007FFFFF 1054ce4e7fdSSerge Semin 0x00FFFFFF 0x01FFFFFF 0x03FFFFFF 1064ce4e7fdSSerge Semin 0x07FFFFFF>; 1074ce4e7fdSSerge Semin }; 1089807a888SSerge Semin... 109