Lines Matching +full:pre +full:- +full:timeout

1 // SPDX-License-Identifier: GPL-2.0-only
8 * -----
9 * The Watchdog consists of a fixed divide-by-4 clock pre-scaler and a 24-bit
35 /* Clock pre-scaler */
38 /* Timeout values in seconds */
70 spin_lock_irqsave(&lpc18xx_wdt->lock, flags); in lpc18xx_wdt_feed()
71 writel(LPC18XX_WDT_FEED_MAGIC1, lpc18xx_wdt->base + LPC18XX_WDT_FEED); in lpc18xx_wdt_feed()
72 writel(LPC18XX_WDT_FEED_MAGIC2, lpc18xx_wdt->base + LPC18XX_WDT_FEED); in lpc18xx_wdt_feed()
73 spin_unlock_irqrestore(&lpc18xx_wdt->lock, flags); in lpc18xx_wdt_feed()
82 struct watchdog_device *wdt_dev = &lpc18xx_wdt->wdt_dev; in lpc18xx_wdt_timer_feed()
86 /* Use safe value (1/2 of real timeout) */ in lpc18xx_wdt_timer_feed()
87 mod_timer(&lpc18xx_wdt->timer, jiffies + in lpc18xx_wdt_timer_feed()
88 msecs_to_jiffies((wdt_dev->timeout * MSEC_PER_SEC) / 2)); in lpc18xx_wdt_timer_feed()
99 lpc18xx_wdt_timer_feed(&lpc18xx_wdt->timer); in lpc18xx_wdt_stop()
108 val = DIV_ROUND_UP(lpc18xx_wdt->wdt_dev.timeout * lpc18xx_wdt->clk_rate, in __lpc18xx_wdt_set_timeout()
110 writel(val, lpc18xx_wdt->base + LPC18XX_WDT_TC); in __lpc18xx_wdt_set_timeout()
118 lpc18xx_wdt->wdt_dev.timeout = new_timeout; in lpc18xx_wdt_set_timeout()
129 val = readl(lpc18xx_wdt->base + LPC18XX_WDT_TV); in lpc18xx_wdt_get_timeleft()
130 return (val * LPC18XX_WDT_CLK_DIV) / lpc18xx_wdt->clk_rate; in lpc18xx_wdt_get_timeleft()
138 if (timer_pending(&lpc18xx_wdt->timer)) in lpc18xx_wdt_start()
139 timer_delete(&lpc18xx_wdt->timer); in lpc18xx_wdt_start()
141 val = readl(lpc18xx_wdt->base + LPC18XX_WDT_MOD); in lpc18xx_wdt_start()
144 writel(val, lpc18xx_wdt->base + LPC18XX_WDT_MOD); in lpc18xx_wdt_start()
166 spin_lock_irqsave(&lpc18xx_wdt->lock, flags); in lpc18xx_wdt_restart()
168 val = readl(lpc18xx_wdt->base + LPC18XX_WDT_MOD); in lpc18xx_wdt_restart()
171 writel(val, lpc18xx_wdt->base + LPC18XX_WDT_MOD); in lpc18xx_wdt_restart()
173 writel(LPC18XX_WDT_FEED_MAGIC1, lpc18xx_wdt->base + LPC18XX_WDT_FEED); in lpc18xx_wdt_restart()
174 writel(LPC18XX_WDT_FEED_MAGIC2, lpc18xx_wdt->base + LPC18XX_WDT_FEED); in lpc18xx_wdt_restart()
176 writel(LPC18XX_WDT_FEED_MAGIC1, lpc18xx_wdt->base + LPC18XX_WDT_FEED); in lpc18xx_wdt_restart()
177 writel(LPC18XX_WDT_FEED_MAGIC1, lpc18xx_wdt->base + LPC18XX_WDT_FEED); in lpc18xx_wdt_restart()
179 spin_unlock_irqrestore(&lpc18xx_wdt->lock, flags); in lpc18xx_wdt_restart()
204 struct device *dev = &pdev->dev; in lpc18xx_wdt_probe()
208 return -ENOMEM; in lpc18xx_wdt_probe()
210 lpc18xx_wdt->base = devm_platform_ioremap_resource(pdev, 0); in lpc18xx_wdt_probe()
211 if (IS_ERR(lpc18xx_wdt->base)) in lpc18xx_wdt_probe()
212 return PTR_ERR(lpc18xx_wdt->base); in lpc18xx_wdt_probe()
214 lpc18xx_wdt->reg_clk = devm_clk_get_enabled(dev, "reg"); in lpc18xx_wdt_probe()
215 if (IS_ERR(lpc18xx_wdt->reg_clk)) { in lpc18xx_wdt_probe()
217 return PTR_ERR(lpc18xx_wdt->reg_clk); in lpc18xx_wdt_probe()
220 lpc18xx_wdt->wdt_clk = devm_clk_get_enabled(dev, "wdtclk"); in lpc18xx_wdt_probe()
221 if (IS_ERR(lpc18xx_wdt->wdt_clk)) { in lpc18xx_wdt_probe()
223 return PTR_ERR(lpc18xx_wdt->wdt_clk); in lpc18xx_wdt_probe()
227 lpc18xx_wdt->clk_rate = clk_get_rate(lpc18xx_wdt->wdt_clk); in lpc18xx_wdt_probe()
228 if (lpc18xx_wdt->clk_rate == 0) { in lpc18xx_wdt_probe()
230 return -EINVAL; in lpc18xx_wdt_probe()
233 lpc18xx_wdt->wdt_dev.info = &lpc18xx_wdt_info; in lpc18xx_wdt_probe()
234 lpc18xx_wdt->wdt_dev.ops = &lpc18xx_wdt_ops; in lpc18xx_wdt_probe()
236 lpc18xx_wdt->wdt_dev.min_timeout = DIV_ROUND_UP(LPC18XX_WDT_TC_MIN * in lpc18xx_wdt_probe()
237 LPC18XX_WDT_CLK_DIV, lpc18xx_wdt->clk_rate); in lpc18xx_wdt_probe()
239 lpc18xx_wdt->wdt_dev.max_timeout = (LPC18XX_WDT_TC_MAX * in lpc18xx_wdt_probe()
240 LPC18XX_WDT_CLK_DIV) / lpc18xx_wdt->clk_rate; in lpc18xx_wdt_probe()
242 lpc18xx_wdt->wdt_dev.timeout = min(lpc18xx_wdt->wdt_dev.max_timeout, in lpc18xx_wdt_probe()
245 spin_lock_init(&lpc18xx_wdt->lock); in lpc18xx_wdt_probe()
247 lpc18xx_wdt->wdt_dev.parent = dev; in lpc18xx_wdt_probe()
248 watchdog_set_drvdata(&lpc18xx_wdt->wdt_dev, lpc18xx_wdt); in lpc18xx_wdt_probe()
250 watchdog_init_timeout(&lpc18xx_wdt->wdt_dev, heartbeat, dev); in lpc18xx_wdt_probe()
254 timer_setup(&lpc18xx_wdt->timer, lpc18xx_wdt_timer_feed, 0); in lpc18xx_wdt_probe()
256 watchdog_set_nowayout(&lpc18xx_wdt->wdt_dev, nowayout); in lpc18xx_wdt_probe()
257 watchdog_set_restart_priority(&lpc18xx_wdt->wdt_dev, 128); in lpc18xx_wdt_probe()
261 watchdog_stop_on_reboot(&lpc18xx_wdt->wdt_dev); in lpc18xx_wdt_probe()
262 return devm_watchdog_register_device(dev, &lpc18xx_wdt->wdt_dev); in lpc18xx_wdt_probe()
269 dev_warn(&pdev->dev, "I quit now, hardware will probably reboot!\n"); in lpc18xx_wdt_remove()
270 timer_delete_sync(&lpc18xx_wdt->timer); in lpc18xx_wdt_remove()
274 { .compatible = "nxp,lpc1850-wwdt" },
281 .name = "lpc18xx-wdt",