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/linux/Documentation/devicetree/bindings/gpu/
H A Dimg,powervr-sgx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 # Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
5 ---
6 $id: http://devicetree.org/schemas/gpu/img,powervr-sgx.yaml#
7 $schema: http://devicetree.org/meta-schemas/core.yaml#
9 title: Imagination Technologies PowerVR SGX GPUs
12 - Frank Binns <frank.binns@imgtec.com>
17 - items:
18 - enum:
19 - ti,omap3430-gpu # Rev 121
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/linux/Documentation/gpu/imagination/
H A Duapi.rst6 .. kernel-doc:: include/uapi/drm/pvr_drm.h
7 :doc: PowerVR UAPI
11 .. kernel-doc:: include/uapi/drm/pvr_drm.h
14 .. kernel-doc:: include/uapi/drm/pvr_drm.h
19 .. kernel-doc:: include/uapi/drm/pvr_drm.h
20 :doc: PowerVR IOCTL interface
22 .. kernel-doc:: include/uapi/drm/pvr_drm.h
26 ---------
27 .. kernel-doc:: include/uapi/drm/pvr_drm.h
28 :doc: PowerVR IOCTL DEV_QUERY interface
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H A Dindex.rst2 drm/imagination PowerVR Graphics Driver
5 .. kernel-doc:: drivers/gpu/drm/imagination/pvr_drv.c
6 :doc: PowerVR (Series 6 and later) and IMG Graphics Driver
/linux/include/uapi/drm/
H A Dpvr_drm.h1 /* SPDX-License-Identifier: (GPL-2.0-only WITH Linux-syscall-note) OR MIT */
17 * DOC: PowerVR UAPI
19 * The PowerVR IOCTL argument structs have a few limitations in place, in
22 * - All members must be type-aligned.
23 * - The overall struct must be padded to 64-bit alignment.
24 * - Explicit padding is almost always required. This takes the form of
25 * ``_padding_[x]`` members of sufficient size to pad to the next power-of-two
29 * - Unions may only appear as the last member of a struct.
30 * - Individual union members may grow in the future. The space between the
34 * In addition to the IOCTL argument structs, the PowerVR UAPI makes use of
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/linux/drivers/gpu/drm/imagination/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only OR MIT
5 tristate "Imagination Technologies PowerVR (Series 6 and later) & IMG Graphics"
16 Technologies PowerVR (Series 6 or later) or IMG GPU.
18 If "M" is selected, the module will be called powervr.
H A Dpvr_job.c1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
27 xa_erase(&job->pvr_dev->job_ids, job->id); in pvr_job_release()
29 pvr_hwrt_data_put(job->hwrt); in pvr_job_release()
30 pvr_context_put(job->ctx); in pvr_job_release()
32 WARN_ON(job->paired_job); in pvr_job_release()
37 kfree(job->cmd); in pvr_job_release()
42 * pvr_job_put() - Release reference on job
49 kref_put(&job->ref_count, pvr_job_release); in pvr_job_put()
53 * pvr_job_process_stream() - Build job FW structure from stream
64 * * -%ENOMEM on out of memory, or
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H A Dpvr_fw.c1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
51 const struct pvr_fw_layout_entry *layout_entries = pvr_dev->fw_dev.layout_entries; in pvr_fw_find_layout_entry()
52 u32 num_layout_entries = pvr_dev->fw_dev.header->layout_entry_num; in pvr_fw_find_layout_entry()
65 const struct pvr_fw_layout_entry *layout_entries = pvr_dev->fw_dev.layout_entries; in pvr_fw_find_private_data()
66 u32 num_layout_entries = pvr_dev->fw_dev.header->layout_entry_num; in pvr_fw_find_private_data()
81 * pvr_fw_validate() - Parse firmware header and check compatibility
86 * * -EINVAL if firmware is incompatible.
92 const struct firmware *firmware = pvr_dev->fw_dev.firmware; in pvr_fw_validate()
95 const u8 *fw = firmware->data; in pvr_fw_validate()
96 u32 fw_offset = firmware->size - SZ_4K; in pvr_fw_validate()
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H A Dpvr_queue.c1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
40 sizeof(((struct rogue_fwif_frag_ctx_state *)0)->frag_reg_isp_store[0])); in get_xfer_ctx_state_size()
70 sizeof(((struct rogue_fwif_frag_ctx_state *)0)->frag_reg_isp_store[0])); in get_frag_ctx_state_size()
87 return -EINVAL; in get_ctx_state_size()
116 pvr_context_put(fence->queue->ctx); in pvr_queue_fence_release_work()
117 dma_fence_free(&fence->base); in pvr_queue_fence_release_work()
123 struct pvr_device *pvr_dev = fence->queue->ctx->pvr_dev; in pvr_queue_fence_release()
125 queue_work(pvr_dev->sched_wq, &fence->release_work); in pvr_queue_fence_release()
133 switch (fence->queue->type) { in pvr_queue_job_fence_get_timeline_name()
156 switch (fence->queue->type) { in pvr_queue_cccb_fence_get_timeline_name()
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/linux/arch/arm/boot/dts/ti/omap/
H A Domap34xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/media/omap3-isp.h>
16 /* OMAP343x/OMAP35xx variants OPP1-6 */
17 operating-points-v2 = <&cpu0_opp_table>;
19 clock-latency = <300000>; /* From legacy driver */
20 #cooling-cells = <2>;
24 cpu0_opp_table: opp-table {
25 compatible = "operating-points-v2-ti-cpu";
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H A Dam3517.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
11 /delete-node/ &aes1_target;
12 /delete-node/ &aes2_target;
24 operating-points-v2 = <&cpu0_opp_table>;
26 clock-latency = <300000>; /* From legacy driver */
30 cpu0_opp_table: opp-table {
31 compatible = "operating-points-v2-ti-cpu";
38 opp-50-300000000 {
40 opp-hz = /bits/ 64 <300000000>;
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H A Domap5.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/omap.h>
12 #include <dt-bindings/clock/omap5.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
19 interrupt-parent = <&wakeupgen>;
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H A Dam33xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/am33xx.h>
11 #include <dt-bindings/clock/am3.h>
15 interrupt-parent = <&intc>;
16 #address-cells = <1>;
17 #size-cells = <1>;
30 d-can0 = &dcan0;
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H A Dam4372.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/clock/am4.h>
15 interrupt-parent = <&wakeupgen>;
16 #address-cells = <1>;
17 #size-cells = <1>;
41 #address-cells = <1>;
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H A Domap4.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
6 #include <dt-bindings/bus/ti-sysc.h>
7 #include <dt-bindings/clock/omap4.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/omap.h>
11 #include <dt-bindings/clock/omap4.h>
15 interrupt-parent = <&wakeupgen>;
16 #address-cells = <1>;
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/linux/drivers/video/fbdev/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
14 a well-defined interface, so the software doesn't need to know
15 anything about the low-level (hardware register) stuff.
21 On several non-X86 architectures, the frame buffer device is the
29 and the Framebuffer-HOWTO at
30 <http://www.munted.org.uk/programming/Framebuffer-HOWTO-1.3.html> for more
40 are compiling a kernel for a non-x86 architecture.
46 device-aware may cause unexpected results. If unsure, say N.
57 Common utility functions useful to fbdev drivers of VGA-based
82 If you have a PCI-based system, this enables support for these
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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/linux/arch/arm64/boot/dts/ti/
H A Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
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