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/freebsd/sys/contrib/device-tree/Bindings/power/
H A Dapple,pmgr-pwrstate.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/apple,pmgr-pwrstate.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Apple SoC PMGR Power States
10 - Hector Martin <marcan@marcan.st>
13 - $ref: power-domain.yaml#
16 Apple SoCs include PMGR blocks responsible for power management,
17 which can control various clocks, resets, power states, and
18 performance features. This binding describes the device power
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/freebsd/sys/contrib/device-tree/Bindings/arm/msm/
H A Dqcom,idle-state.txt3 ARM provides idle-state node to define the cpuidle states, as defined in [1].
4 cpuidle-qcom is the cpuidle driver for Qualcomm SoCs and uses these idle
6 The idle states supported by the QCOM SoC are defined as -
10 * Standalone Power Collapse (Standalone PC or SPC)
11 * Power Collapse (PC)
26 Retention: Retention is a low power state where the core is clock gated and
33 Standalone PC: A cpu can power down and warmboot if there is a sufficient time
35 to indicate a core entering a power down state without consulting any other
36 cpu or the system resources. This helps save power only on that core. The SPM
37 sequence for this idle state is programmed to power down the supply to the
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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dst,stm32-rcc.txt6 Please refer to clock-bindings.txt for common clock controller binding usage.
10 - compatible: Should be:
11 "st,stm32f42xx-rcc"
12 "st,stm32f469-rcc"
13 "st,stm32f746-rcc"
14 "st,stm32f769-rcc"
16 - reg: should be register base and length as documented in the
18 - #reset-cells: 1, see below
19 - #clock-cells: 2, device nodes should specify the clock in their "clocks"
21 between gated clocks and other clocks and an index specifying the clock to
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H A Dmvebu-gated-clock.txt1 * Gated Clock bindings for Marvell EBU SoCs
4 peripheral clocks to be gated to save some power. The clock consumer
12 -----------------------------------
29 -----------------------------------
56 -----------------------------------
83 -----------------------------------
97 -----------------------------------
124 -----------------------------------
134 -----------------------------------
157 -----------------------------------
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H A Dst,stm32mp25-rcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/st,stm32mp25-rcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gabriel Fernandez <gabriel.fernandez@foss.st.com>
14 RCC makes also power management (resume/supend).
17 include/dt-bindings/clock/st,stm32mp25-rcc.h
18 include/dt-bindings/reset/st,stm32mp25-rcc.h
23 - st,stm32mp25-rcc
28 '#clock-cells':
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/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dtegra234-clock.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved. */
78 * throughput and memory controller power.
81 /** @brief CLK_RST_CONTROLLER_CLK_SOURCE_EQOS_AXI_CLK_0 divider gated output */
83 /** @brief CLK_RST_CONTROLLER_CLK_SOURCE_EQOS_PTP_REF_CLK_0 divider gated output */
87 /** @brief CLK_RST_CONTROLLER_CLK_SOURCE_EQOS_TX_CLK divider gated output */
242 /** @brief CLK_RST_CONTROLLER_CLK_SOURCE_SE switch divider gated output */
533 /** @brief NVHS PLL hardware power sequencer (overrides 'manual' programming of PLL) */
589 /** @brief GBE PLL hardware power sequencer */
599 /** @brief PLLE hardware power sequencer (overrides 'manual' programming of PLL) */
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/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A Drockchip,rk3399-dmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controller
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/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dmaxim,max77686.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Maxim MAX77686 Power Management IC
10 - Chanwoo Choi <cw00.choi@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
14 This is a part of device tree bindings for Maxim MAX77686 Power Management
17 The Maxim MAX77686 is a Power Management IC which includes voltage and
21 (gated/ungated) over I2C. The clock IDs are defined as preprocessor macros
22 in dt-bindings/clock/maxim,max77686.h.
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H A Dmaxim,max77802.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Maxim MAX77802 Power Management IC
10 - Javier Martinez Canillas <javier@dowhile0.org>
11 - Krzysztof Kozlowski <krzk@kernel.org>
14 This is a part of device tree bindings for Maxim MAX77802 Power Management
17 The Maxim MAX77802 is a Power Management IC which includes voltage and
18 current regulators (10 high efficiency Buck regulators and 32 Low-DropOut
22 (gated/ungated) over I2C. The clock IDs are defined as preprocessor macros
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/freebsd/sys/contrib/device-tree/Bindings/bus/
H A Dfsl,imx8qxp-pixel-link-msi-bus.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/fsl,imx8qxp-pixe
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/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3288-veyron-brain.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron.dtsi"
10 #include "rk3288-veyron-broadcom-bluetooth.dtsi"
14 compatible = "google,veyron-brain-rev0", "google,veyron-brain",
17 vcc33_sys: vcc33-sys {
18 vin-supply = <&vcc_5v>;
22 compatible = "regulator-fixed";
23 regulator-name = "vcc33_io";
24 regulator-always-on;
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6qdl-sr-som-ti.dtsi4 * This file is dual-licensed: you can use it either under the terms
41 #include <dt-bindings/gpio/gpio.h>
44 nvcc_sd1: regulator-nvcc-sd1 {
45 compatible = "regulator-fixed";
46 regulator-always-on;
47 regulator-name = "nvcc_sd1";
48 regulator-min-microvolt = <1800000>;
49 regulator-max-microvolt = <1800000>;
50 vin-supply = <&vcc_3v3>;
53 clk_ti_wifi: ti-wifi-clock {
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/freebsd/share/man/man9/
H A Dieee80211_proto.968 .Bl -tag -width IEEE80211_S_ASSOC
105 Beware that data traffic is also gated by whether the associated
127 Asleep to save power (in station mode).
130 when power save operation is enabled and the local station is deemed
131 sufficiently idle to enter low power mode.
178 single-threads the state machine logic in a dedicated
183 After multi-vap scheduling/coordination is done the per-vap
189 layer using the previously defined method pointer (in OOP-parlance they
/freebsd/sys/contrib/device-tree/Bindings/devfreq/
H A Drk3399_dmc.txt4 - compatible: Must be "rockchip,rk3399-dmc".
5 - devfreq-events: Node to get DDR loading, Refer to
7 rockchip-dfi.txt
8 - clocks: Phandles for clock specified in "clock-names" property
9 - clock-names : The name of clock used by the DFI, must be
11 - operating-points-v2: Refer to Documentation/devicetree/bindings/opp/opp-v2.yaml
13 - center-supply: DMC supply node.
14 - status: Marks the node enabled/disabled.
15 - rockchip,pmu: Phandle to the syscon managing the "PMU general register
19 - interrupts: The CPU interrupt number. The interrupt specifier
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/freebsd/sys/dev/rtwn/rtl8188e/pci/
H A Dr88ee_init.c1 /*-
85 /* Disable XTAL output for power saving. */ in r88ee_power_on()
88 /* Unlock ISO/CLK/Power control register. */ in r88ee_power_on()
92 /* Wait for power ready bit */ in r88ee_power_on()
99 device_printf(sc->sc_dev, in r88ee_power_on()
100 "timeout waiting for chip power up\n"); in r88ee_power_on()
119 /* Auto-enable WLAN */ in r88ee_power_on()
148 ((sc->sc_hwcrypto != RTWN_CRYPTO_SW) ? R92C_CR_ENSEC : 0) | in r88ee_power_on()
169 /* Move card to Low Power State. */ in r88ee_power_off()
181 device_printf(sc->sc_dev, "%s: failed to block Tx queues\n", in r88ee_power_off()
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/freebsd/sys/contrib/device-tree/Bindings/arm/tegra/
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra Power Management Controller (PMC)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
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/freebsd/sys/dev/rtwn/rtl8188e/usb/
H A Dr88eu_init.c3 /*-
6 * Copyright (c) 2015-2016 Andriy Voskoboinyk <avos@FreeBSD.org>
81 /* Wait for power ready bit. */ in r88eu_power_on()
88 device_printf(sc->sc_dev, in r88eu_power_on()
89 "timeout waiting for chip power up\n"); in r88eu_power_on()
128 ((sc->sc_hwcrypto != RTWN_CRYPTO_SW) ? R92C_CR_ENSEC : 0) | in r88eu_power_on()
150 /* Move card to Low Power State. */ in r88eu_power_off()
162 device_printf(sc->sc_dev, "%s: failed to block Tx queues\n", in r88eu_power_off()
167 /* CCK and OFDM are disabled, and clock are gated. */ in r88eu_power_off()
216 device_printf(sc->sc_dev, "%s: could not turn off MAC\n", in r88eu_power_off()
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/freebsd/sys/contrib/device-tree/Bindings/soc/tegra/
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra Power Management Controller (PMC)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
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/freebsd/sys/dev/rtwn/rtl8192c/usb/
H A Dr92cu_init.c3 /*-
6 * Copyright (c) 2015-2016 Andriy Voskoboinyk <avos@FreeBSD.org>
97 device_printf(sc->sc_dev, in r92cu_power_on()
102 /* Unlock ISO/CLK/Power control register. */ in r92cu_power_on()
133 device_printf(sc->sc_dev, in r92cu_power_on()
158 device_printf(sc->sc_dev, in r92cu_power_on()
168 ((sc->sc_hwcrypto != RTWN_CRYPTO_SW) ? R92C_CR_ENSEC : 0) | in r92cu_power_on()
181 struct r92c_softc *rs = sc->sc_priv; in r92cu_power_off()
188 callout_stop(&rs->rs_c2h_report); in r92cu_power_off()
189 rs->rs_c2h_paused = 0; in r92cu_power_off()
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/freebsd/sys/dev/rtwn/rtl8821a/
H A Dr21a_init.c1 /*-
71 /* Clear suspend and power down bits.*/ in r21a_power_on()
101 /* Wait for power ready bit. */ in r21a_power_on()
108 device_printf(sc->sc_dev, in r21a_power_on()
109 "timeout waiting for chip power up\n"); in r21a_power_on()
170 ((sc->sc_hwcrypto != RTWN_CRYPTO_SW) ? R92C_CR_ENSEC : 0) | in r21a_power_on()
183 struct r12a_softc *rs = sc->sc_priv; in r21a_power_off()
191 /* Move card to Low Power state. */ in r21a_power_off()
203 device_printf(sc->sc_dev, "%s: failed to block Tx queues\n", in r21a_power_off()
208 /* CCK and OFDM are disabled, and clock are gated. */ in r21a_power_off()
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/freebsd/sys/contrib/device-tree/Bindings/cpu/
H A Didle-states.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
11 - Anup Patel <anup@brainfault.org>
15 1 - Introduction
18 ARM and RISC-V systems contain HW capable of managing power consumption
19 dynamically, where cores can be put in different low-power states (ranging
20 from simple wfi to power gating) according to OS PM policies. The CPU states
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/freebsd/sys/dev/bhnd/cores/pci/
H A Dbhnd_pcireg.h1 /*-
2 * SPDX-License-Identifier: ISC
29 * PCI/PCIe-Gen1 DMA Constants
35 #define BHND_PCIE_DMA32_TRANSLATION 0x80000000 /**< PCIe-Gen1 DMA32 address translation (sb2pcitr…
36 #define BHND_PCIE_DMA32_MASK BHND_PCIE_SBTOPCI2_MASK /**< PCIe-Gen1 DMA32 translation mask */
38 #define BHND_PCIE_DMA64_TRANSLATION _BHND_PCIE_DMA64(TRANSLATION) /**< PCIe-Gen1 DMA64 address tran…
39 #define BHND_PCIE_DMA64_MASK _BHND_PCIE_DMA64(MASK) /**< PCIe-Gen1 DMA64 translation mask */
69 #define BHND_PCI_CTL_CLK_OE 0x04 /* When set, drives clock as gated by PCI_CLK out to pin */
76 /* BHND_PCI_ARB_CTL - ParkID (>= rev8) */
138 * PCIe-Gen1 Core Registers
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/freebsd/sys/dev/rtwn/rtl8192e/
H A Dr92e_init.c1 /*-
82 struct r92e_softc *rs = sc->sc_priv; in r92e_crystalcap_write()
86 val = rs->crystalcap & 0x3f; in r92e_crystalcap_write()
106 /* PathA RF Power On. */ in r92e_init_bb()
111 for (i = 0; i < sc->bb_size; i++) { in r92e_init_bb()
112 const struct rtwn_bb_prog *bb_prog = &sc->bb_prog[i]; in r92e_init_bb()
114 while (!rtwn_check_condition(sc, bb_prog->cond)) { in r92e_init_bb()
115 KASSERT(bb_prog->next != NULL, in r92e_init_bb()
118 bb_prog = bb_prog->next; in r92e_init_bb()
121 for (j = 0; j < bb_prog->count; j++) { in r92e_init_bb()
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/freebsd/sys/dev/rtwn/rtl8812a/
H A Dr12a_init.c1 /*-
66 struct r12a_softc *rs = sc->sc_priv; in r12a_check_condition()
72 "%d/%d (5 GHz)\n", __func__, cond[0], rs->ext_pa_2g, in r12a_check_condition()
73 rs->ext_lna_2g, rs->ext_pa_5g, rs->ext_lna_5g); in r12a_check_condition()
78 if (!rs->ext_pa_2g && !rs->ext_lna_2g && in r12a_check_condition()
79 !rs->ext_pa_5g && !rs->ext_lna_5g) in r12a_check_condition()
83 if (rs->ext_pa_2g) { in r12a_check_condition()
85 mask[nmasks] |= R12A_COND_TYPE(rs->type_pa_2g); in r12a_check_condition()
88 if (rs->ext_pa_5g) { in r12a_check_condition()
90 mask[nmasks] |= R12A_COND_TYPE(rs->type_pa_5g); in r12a_check_condition()
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/freebsd/sys/riscv/sifive/
H A Dsifive_prci.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
85 #define PRCI_LOCK(sc) mtx_lock(&(sc)->mtx)
86 #define PRCI_UNLOCK(sc) mtx_unlock(&(sc)->mtx)
87 #define PRCI_ASSERT_LOCKED(sc) mtx_assert(&(sc)->mtx, MA_OWNED);
88 #define PRCI_ASSERT_UNLOCKED(sc) mtx_assert(&(sc)->mtx, MA_NOTOWNED);
101 bus_space_read_4((_sc)->bst, (_sc)->bsh, (_reg))
103 bus_space_write_4((_sc)->bst, (_sc)->bsh, (_reg), (_val))
239 /* FU740 gated clocks */
268 { "sifive,fu540-c000-prci", (uintptr_t)&fu540_prci_config },
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