/linux/arch/arm64/boot/dts/arm/ |
H A D | juno-scmi.dtsi | 3 power-domains = <&scmi_devpd 8>; 7 power-domains = <&scmi_devpd 8>; 11 power-domains = <&scmi_devpd 8>; 15 power-domains = <&scmi_devpd 8>; 19 power-domains = <&scmi_devpd 8>; 23 power-domains = <&scmi_devpd 8>; 27 power-domains = <&scmi_devpd 8>; 31 power-domains = <&scmi_devpd 8>; 42 /delete-node/ scpi; 47 mbox-names = "tx", "rx"; [all …]
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/linux/arch/arm64/boot/dts/apple/ |
H A D | t8112-pmgr.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 * PMGR Power domains for the Apple T8112 "M2" SoC 10 ps_sbr: power-controller@100 { 11 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; 13 #power-domain-cells = <0>; 14 #reset-cells = <0>; 16 apple,always-on; /* Core device */ 19 ps_aic: power-controller@108 { 20 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate"; 22 #power-domain-cells = <0>; [all …]
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H A D | t600x-pmgr.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 * PMGR Power domains for the Apple T6001 "M1 Max" SoC 9 DIE_NODE(ps_pms_bridge): power-controller@100 { 10 compatible = "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 12 #power-domain-cells = <0>; 13 #reset-cells = <0>; 15 apple,always-on; /* Core device */ 18 DIE_NODE(ps_aic): power-controller@108 { 19 compatible = "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 21 #power-domain-cells = <0>; [all …]
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H A D | t8103-pmgr.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 * PMGR Power domains for the Apple T8103 "M1" SoC 10 ps_sbr: power-controller@100 { 11 compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate"; 13 #power-domain-cells = <0>; 14 #reset-cells = <0>; 16 apple,always-on; /* Core device */ 19 ps_aic: power-controller@108 { 20 compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate"; 22 #power-domain-cells = <0>; [all …]
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/linux/Documentation/devicetree/bindings/power/ |
H A D | power-domain.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/power-domain.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic PM domains 10 - Rafael J. Wysocki <rjw@rjwysocki.net> 11 - Kevin Hilman <khilman@kernel.org> 12 - Ulf Hansson <ulf.hansson@linaro.org> 15 System on chip designs are often divided into multiple PM domains that can be 16 used for power gating of selected IP blocks for power saving by reduced [all …]
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H A D | power_domain.txt | 1 * Generic PM domains 3 System on chip designs are often divided into multiple PM domains that can be 4 used for power gating of selected IP blocks for power saving by reduced leakage 8 their PM domains provided by PM domain providers. A PM domain provider can be 10 domains. A consumer node can refer to the provider by a phandle and a set of 12 #power-domain-cells property in the PM domain provider node. 16 See power-domain.yaml. 21 - power-domains : A list of PM domain specifiers, as defined by bindings of 22 the power controller that is the PM domain provider. 25 - power-domain-names : A list of power domain name strings sorted in the same [all …]
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/linux/drivers/gpu/drm/i915/display/ |
H A D | intel_display_power.c | 1 /* SPDX-License-Identifier: MIT */ 33 for_each_if(test_bit((__domain), (__power_well)->domains.bits)) 37 for_each_if(test_bit((__domain), (__power_well)->domains.bits)) 207 if (pm_runtime_suspended(dev_priv->drm.dev)) in __intel_display_power_is_enabled() 226 * intel_display_power_is_enabled - check for a power domain 228 * @domain: power domain to check 230 * This function can be used to check the hw power domain state. It is mostly 232 * upon explicit power domain reference counting to ensure that the hardware 236 * threads can't disable the power well while the caller tries to read a few 240 * True when the power domain is enabled, false otherwise. [all …]
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/linux/arch/arm64/boot/dts/renesas/ |
H A D | r8a77980.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car V3H (R8A77980) SoC 9 #include <dt-bindings/clock/r8a77980-cpg-mssr.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/power/r8a77980-sysc.h> 16 #address-cells = <2>; 17 #size-cells = <2>; 19 /* External CAN clock - to be overridden by boards that provide it */ 21 compatible = "fixed-clock"; [all …]
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H A D | r8a77995.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car D3 (R8A77995) SoC 9 #include <dt-bindings/clock/r8a77995-cpg-mssr.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/power/r8a77995-sysc.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; 26 clock-frequency = <0>; [all …]
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H A D | r8a77951.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car H3 (R8A77951) SoC 8 #include <dt-bindings/clock/r8a7795-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a7795-sysc.h> 19 #address-cells = <2>; 20 #size-cells = <2>; 28 compatible = "fixed-clock"; 29 #clock-cells = <0>; 30 clock-frequency = <0>; [all …]
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H A D | r8a77970.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car V3M (R8A77970) SoC 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 9 #include <dt-bindings/clock/r8a77970-cpg-mssr.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/power/r8a77970-sysc.h> 16 #address-cells = <2>; 17 #size-cells = <2>; 19 /* External CAN clock - to be overridden by boards that provide it */ [all …]
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H A D | r8a779a0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car V3U (R8A779A0) SoC 8 #include <dt-bindings/clock/r8a779a0-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a779a0-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 17 /* External CAN clock - to be overridden by boards that provide it */ 19 compatible = "fixed-clock"; 20 #clock-cells = <0>; [all …]
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H A D | r8a77990.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC 5 * Copyright (C) 2018-2019 Renesas Electronics Corp. 8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a77990-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 23 compatible = "fixed-clock"; 24 #clock-cells = <0>; [all …]
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H A D | r8a77960.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 8 #include <dt-bindings/clock/r8a7796-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a7796-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 23 compatible = "fixed-clock"; 24 #clock-cells = <0>; [all …]
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H A D | r8a77961.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 8 #include <dt-bindings/clock/r8a77961-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a77961-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 23 compatible = "fixed-clock"; 24 #clock-cells = <0>; [all …]
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H A D | r8a774c0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2018-2019 Renesas Electronics Corp. 8 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a774c0-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 23 compatible = "fixed-clock"; 24 #clock-cells = <0>; 25 clock-frequency = <0>; [all …]
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H A D | r8a774a1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r8a774a1-cpg-mssr.h> 11 #include <dt-bindings/power/r8a774a1-sysc.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; 26 clock-frequency = <0>; [all …]
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H A D | r8a774e1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r8a774e1-cpg-mssr.h> 11 #include <dt-bindings/power/r8a774e1-sysc.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; 26 clock-frequency = <0>; [all …]
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H A D | r8a779g0.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 * Device Tree Source for the R-Car V4H (R8A779G0) SoC 8 #include <dt-bindings/clock/r8a779g0-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a779g0-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 17 /* External Audio clock - to be overridden by boards that provide it */ 19 compatible = "fixed-clock"; 20 #clock-cells = <0>; [all …]
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H A D | r8a779h0.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 * Device Tree Source for the R-Car V4M (R8A779H0) SoC 8 #include <dt-bindings/clock/renesas,r8a779h0-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/renesas,r8a779h0-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 17 /* External Audio clock - to be overridden by boards that provide it */ 19 compatible = "fixed-clock"; 20 #clock-cells = <0>; [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8-ss-dma.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2019 NXP 7 #include <dt-bindings/clock/imx8-lpcg.h> 8 #include <dt-bindings/dma/fsl-edma.h> 9 #include <dt-bindings/firmware/imx/rsrc.h> 11 dma_ipg_clk: clock-dma-ipg { 12 compatible = "fixed-clock"; 13 #clock-cells = <0>; 14 clock-frequency = <120000000>; 15 clock-output-names = "dma_ipg_clk"; [all …]
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/linux/arch/arm/boot/dts/renesas/ |
H A D | r8a77470.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r8a77470-cpg-mssr.h> 11 #include <dt-bindings/power/r8a77470-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 26 #address-cells = <1>; 27 #size-cells = <0>; 31 compatible = "arm,cortex-a7"; [all …]
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H A D | r7s9210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r7s9210-cpg-mssr.h> 14 interrupt-parent = <&gic>; 15 #address-cells = <1>; 16 #size-cells = <1>; 20 #clock-cells = <0>; 21 compatible = "fixed-clock"; 23 clock-frequency = <0>; 27 #clock-cells = <0>; [all …]
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/linux/drivers/base/power/ |
H A D | common.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * drivers/base/power/common.c - Common device power management code. 16 #include "power.h" 19 * dev_pm_get_subsys_data - Create or refcount power.subsys_data for device. 22 * If power.subsys_data is NULL, point it to a new object, otherwise increment 32 return -ENOMEM; in dev_pm_get_subsys_data() 34 spin_lock_irq(&dev->power.lock); in dev_pm_get_subsys_data() 36 if (dev->power.subsys_data) { in dev_pm_get_subsys_data() 37 dev->power.subsys_data->refcount++; in dev_pm_get_subsys_data() 39 spin_lock_init(&psd->lock); in dev_pm_get_subsys_data() [all …]
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/linux/arch/arm/boot/dts/ti/keystone/ |
H A D | keystone-k2g.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/pinctrl/keystone.h> 10 #include <dt-bindings/gpio/gpio.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; 32 #address-cells = <1>; 33 #size-cells = <0>; [all …]
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