1// SPDX-License-Identifier: GPL-2.0+ OR MIT 2/* 3 * PMGR Power domains for the Apple S8001 "A9X" SoC 4 * 5 * Copyright (c) 2024 Nick Chan <towinchenmi@gmail.com> 6 */ 7 8&pmgr { 9 ps_cpu0: power-controller@80000 { 10 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 11 reg = <0x80000 4>; 12 #power-domain-cells = <0>; 13 #reset-cells = <0>; 14 label = "cpu0"; 15 apple,always-on; /* Core device */ 16 }; 17 18 ps_cpu1: power-controller@80008 { 19 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 20 reg = <0x80008 4>; 21 #power-domain-cells = <0>; 22 #reset-cells = <0>; 23 label = "cpu1"; 24 apple,always-on; /* Core device */ 25 }; 26 27 ps_cpm: power-controller@80040 { 28 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 29 reg = <0x80040 4>; 30 #power-domain-cells = <0>; 31 #reset-cells = <0>; 32 label = "cpm"; 33 apple,always-on; /* Core device */ 34 }; 35 36 ps_sio_busif: power-controller@80148 { 37 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 38 reg = <0x80148 4>; 39 #power-domain-cells = <0>; 40 #reset-cells = <0>; 41 label = "sio_busif"; 42 }; 43 44 ps_sio_p: power-controller@80150 { 45 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 46 reg = <0x80150 4>; 47 #power-domain-cells = <0>; 48 #reset-cells = <0>; 49 label = "sio_p"; 50 power-domains = <&ps_sio_busif>; 51 }; 52 53 ps_sbr: power-controller@80100 { 54 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 55 reg = <0x80100 4>; 56 #power-domain-cells = <0>; 57 #reset-cells = <0>; 58 label = "sbr"; 59 apple,always-on; /* Apple fabric, critical block */ 60 }; 61 62 ps_aic: power-controller@80108 { 63 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 64 reg = <0x80108 4>; 65 #power-domain-cells = <0>; 66 #reset-cells = <0>; 67 label = "aic"; 68 apple,always-on; /* Core device */ 69 }; 70 71 ps_dwi: power-controller@80110 { 72 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 73 reg = <0x80110 4>; 74 #power-domain-cells = <0>; 75 #reset-cells = <0>; 76 label = "dwi"; 77 }; 78 79 ps_gpio: power-controller@80118 { 80 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 81 reg = <0x80118 4>; 82 #power-domain-cells = <0>; 83 #reset-cells = <0>; 84 label = "gpio"; 85 }; 86 87 ps_pcie_ref: power-controller@80140 { 88 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 89 reg = <0x80140 4>; 90 #power-domain-cells = <0>; 91 #reset-cells = <0>; 92 label = "pcie_ref"; 93 }; 94 95 ps_mca0: power-controller@80160 { 96 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 97 reg = <0x80160 4>; 98 #power-domain-cells = <0>; 99 #reset-cells = <0>; 100 label = "mca0"; 101 power-domains = <&ps_sio_p>; 102 }; 103 104 ps_mca1: power-controller@80168 { 105 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 106 reg = <0x80168 4>; 107 #power-domain-cells = <0>; 108 #reset-cells = <0>; 109 label = "mca1"; 110 power-domains = <&ps_sio_p>; 111 }; 112 113 ps_mca2: power-controller@80170 { 114 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 115 reg = <0x80170 4>; 116 #power-domain-cells = <0>; 117 #reset-cells = <0>; 118 label = "mca2"; 119 power-domains = <&ps_sio_p>; 120 }; 121 122 ps_mca3: power-controller@80178 { 123 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 124 reg = <0x80178 4>; 125 #power-domain-cells = <0>; 126 #reset-cells = <0>; 127 label = "mca3"; 128 power-domains = <&ps_sio_p>; 129 }; 130 131 ps_mca4: power-controller@80180 { 132 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 133 reg = <0x80180 4>; 134 #power-domain-cells = <0>; 135 #reset-cells = <0>; 136 label = "mca4"; 137 power-domains = <&ps_sio_p>; 138 }; 139 140 ps_pwm0: power-controller@80188 { 141 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 142 reg = <0x80188 4>; 143 #power-domain-cells = <0>; 144 #reset-cells = <0>; 145 label = "pwm0"; 146 power-domains = <&ps_sio_p>; 147 }; 148 149 ps_i2c0: power-controller@80190 { 150 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 151 reg = <0x80190 4>; 152 #power-domain-cells = <0>; 153 #reset-cells = <0>; 154 label = "i2c0"; 155 power-domains = <&ps_sio_p>; 156 }; 157 158 ps_i2c1: power-controller@80198 { 159 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 160 reg = <0x80198 4>; 161 #power-domain-cells = <0>; 162 #reset-cells = <0>; 163 label = "i2c1"; 164 power-domains = <&ps_sio_p>; 165 }; 166 167 ps_i2c2: power-controller@801a0 { 168 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 169 reg = <0x801a0 4>; 170 #power-domain-cells = <0>; 171 #reset-cells = <0>; 172 label = "i2c2"; 173 power-domains = <&ps_sio_p>; 174 }; 175 176 ps_i2c3: power-controller@801a8 { 177 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 178 reg = <0x801a8 4>; 179 #power-domain-cells = <0>; 180 #reset-cells = <0>; 181 label = "i2c3"; 182 power-domains = <&ps_sio_p>; 183 }; 184 185 ps_spi0: power-controller@801b0 { 186 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 187 reg = <0x801b0 4>; 188 #power-domain-cells = <0>; 189 #reset-cells = <0>; 190 label = "spi0"; 191 power-domains = <&ps_sio_p>; 192 }; 193 194 ps_spi1: power-controller@801b8 { 195 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 196 reg = <0x801b8 4>; 197 #power-domain-cells = <0>; 198 #reset-cells = <0>; 199 label = "spi1"; 200 power-domains = <&ps_sio_p>; 201 }; 202 203 ps_spi2: power-controller@801c0 { 204 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 205 reg = <0x801c0 4>; 206 #power-domain-cells = <0>; 207 #reset-cells = <0>; 208 label = "spi2"; 209 power-domains = <&ps_sio_p>; 210 }; 211 212 ps_spi3: power-controller@801c8 { 213 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 214 reg = <0x801c8 4>; 215 #power-domain-cells = <0>; 216 #reset-cells = <0>; 217 label = "spi3"; 218 power-domains = <&ps_sio_p>; 219 }; 220 221 ps_uart0: power-controller@801d0 { 222 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 223 reg = <0x801d0 4>; 224 #power-domain-cells = <0>; 225 #reset-cells = <0>; 226 label = "uart0"; 227 power-domains = <&ps_sio_p>; 228 }; 229 230 ps_uart1: power-controller@801d8 { 231 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 232 reg = <0x801d8 4>; 233 #power-domain-cells = <0>; 234 #reset-cells = <0>; 235 label = "uart1"; 236 power-domains = <&ps_sio_p>; 237 }; 238 239 ps_uart2: power-controller@801e0 { 240 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 241 reg = <0x801e0 4>; 242 #power-domain-cells = <0>; 243 #reset-cells = <0>; 244 label = "uart2"; 245 power-domains = <&ps_sio_p>; 246 }; 247 248 ps_uart3: power-controller@801e8 { 249 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 250 reg = <0x801e8 4>; 251 #power-domain-cells = <0>; 252 #reset-cells = <0>; 253 label = "uart3"; 254 power-domains = <&ps_sio_p>; 255 }; 256 257 ps_uart4: power-controller@801f0 { 258 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 259 reg = <0x801f0 4>; 260 #power-domain-cells = <0>; 261 #reset-cells = <0>; 262 label = "uart4"; 263 power-domains = <&ps_sio_p>; 264 }; 265 266 ps_uart5: power-controller@801f8 { 267 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 268 reg = <0x801f8 4>; 269 #power-domain-cells = <0>; 270 #reset-cells = <0>; 271 label = "uart5"; 272 power-domains = <&ps_sio_p>; 273 }; 274 275 ps_sio: power-controller@80158 { 276 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 277 reg = <0x80158 4>; 278 #power-domain-cells = <0>; 279 #reset-cells = <0>; 280 label = "sio"; 281 power-domains = <&ps_sio_p>; 282 apple,always-on; /* Core device */ 283 }; 284 285 ps_hsic0_phy: power-controller@80128 { 286 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 287 reg = <0x80128 4>; 288 #power-domain-cells = <0>; 289 #reset-cells = <0>; 290 label = "hsic0_phy"; 291 power-domains = <&ps_usb2host1>; 292 }; 293 294 ps_isp_sens0: power-controller@80130 { 295 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 296 reg = <0x80130 4>; 297 #power-domain-cells = <0>; 298 #reset-cells = <0>; 299 label = "isp_sens0"; 300 }; 301 302 ps_isp_sens1: power-controller@80138 { 303 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 304 reg = <0x80138 4>; 305 #power-domain-cells = <0>; 306 #reset-cells = <0>; 307 label = "isp_sens1"; 308 }; 309 310 ps_pms: power-controller@80120 { 311 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 312 reg = <0x80120 4>; 313 #power-domain-cells = <0>; 314 #reset-cells = <0>; 315 label = "pms"; 316 apple,always-on; /* Core device */ 317 }; 318 319 ps_usb: power-controller@80278 { 320 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 321 reg = <0x80278 4>; 322 #power-domain-cells = <0>; 323 #reset-cells = <0>; 324 label = "usb"; 325 }; 326 327 ps_usbctrl: power-controller@80280 { 328 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 329 reg = <0x80280 4>; 330 #power-domain-cells = <0>; 331 #reset-cells = <0>; 332 label = "usbctrl"; 333 power-domains = <&ps_usb>; 334 }; 335 336 ps_usb2host0: power-controller@80288 { 337 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 338 reg = <0x80288 4>; 339 #power-domain-cells = <0>; 340 #reset-cells = <0>; 341 label = "usb2host0"; 342 power-domains = <&ps_usbctrl>; 343 }; 344 345 ps_usb2host1: power-controller@80298 { 346 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 347 reg = <0x80298 4>; 348 #power-domain-cells = <0>; 349 #reset-cells = <0>; 350 label = "usb2host1"; 351 power-domains = <&ps_usbctrl>; 352 }; 353 354 ps_usb2host2: power-controller@802a8 { 355 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 356 reg = <0x802a8 4>; 357 #power-domain-cells = <0>; 358 #reset-cells = <0>; 359 label = "usb2host2"; 360 power-domains = <&ps_usbctrl>; 361 }; 362 363 ps_rtmux: power-controller@802d0 { 364 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 365 reg = <0x802d0 4>; 366 #power-domain-cells = <0>; 367 #reset-cells = <0>; 368 label = "rtmux"; 369 apple,always-on; /* Core device */ 370 }; 371 372 ps_disp1mux: power-controller@802e8 { 373 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 374 reg = <0x802e8 4>; 375 #power-domain-cells = <0>; 376 #reset-cells = <0>; 377 label = "disp1mux"; 378 }; 379 380 ps_disp0: power-controller@802d8 { 381 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 382 reg = <0x802d8 4>; 383 #power-domain-cells = <0>; 384 #reset-cells = <0>; 385 label = "disp0"; 386 power-domains = <&ps_rtmux>; 387 }; 388 389 ps_disp1: power-controller@802f0 { 390 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 391 reg = <0x802f0 4>; 392 #power-domain-cells = <0>; 393 #reset-cells = <0>; 394 label = "disp1"; 395 power-domains = <&ps_disp1mux>; 396 }; 397 398 ps_uart6: power-controller@80200 { 399 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 400 reg = <0x80200 4>; 401 #power-domain-cells = <0>; 402 #reset-cells = <0>; 403 label = "uart6"; 404 power-domains = <&ps_sio_p>; 405 }; 406 407 ps_uart7: power-controller@80208 { 408 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 409 reg = <0x80208 4>; 410 #power-domain-cells = <0>; 411 #reset-cells = <0>; 412 label = "uart7"; 413 power-domains = <&ps_sio_p>; 414 }; 415 416 ps_uart8: power-controller@80210 { 417 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 418 reg = <0x80210 4>; 419 #power-domain-cells = <0>; 420 #reset-cells = <0>; 421 label = "uart8"; 422 power-domains = <&ps_sio_p>; 423 }; 424 425 ps_aes0: power-controller@80218 { 426 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 427 reg = <0x80218 4>; 428 #power-domain-cells = <0>; 429 #reset-cells = <0>; 430 label = "aes0"; 431 power-domains = <&ps_sio_p>; 432 }; 433 434 ps_mcc: power-controller@80230 { 435 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 436 reg = <0x80230 4>; 437 #power-domain-cells = <0>; 438 #reset-cells = <0>; 439 label = "mcc"; 440 apple,always-on; /* Memory cache controller */ 441 }; 442 443 ps_dcs0: power-controller@80238 { 444 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 445 reg = <0x80238 4>; 446 #power-domain-cells = <0>; 447 #reset-cells = <0>; 448 label = "dcs0"; 449 apple,always-on; /* LPDDR4 interface */ 450 }; 451 452 ps_dcs1: power-controller@80240 { 453 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 454 reg = <0x80240 4>; 455 #power-domain-cells = <0>; 456 #reset-cells = <0>; 457 label = "dcs1"; 458 apple,always-on; /* LPDDR4 interface */ 459 }; 460 461 ps_dcs2: power-controller@80248 { 462 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 463 reg = <0x80248 4>; 464 #power-domain-cells = <0>; 465 #reset-cells = <0>; 466 label = "dcs2"; 467 apple,always-on; /* LPDDR4 interface */ 468 }; 469 470 ps_dcs3: power-controller@80250 { 471 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 472 reg = <0x80250 4>; 473 #power-domain-cells = <0>; 474 #reset-cells = <0>; 475 label = "dcs3"; 476 apple,always-on; /* LPDDR4 interface */ 477 }; 478 479 ps_dcs4: power-controller@80258 { 480 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 481 reg = <0x80258 4>; 482 #power-domain-cells = <0>; 483 #reset-cells = <0>; 484 label = "dcs4"; 485 }; 486 487 ps_dcs5: power-controller@80260 { 488 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 489 reg = <0x80260 4>; 490 #power-domain-cells = <0>; 491 #reset-cells = <0>; 492 label = "dcs5"; 493 }; 494 495 ps_dcs6: power-controller@80268 { 496 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 497 reg = <0x80268 4>; 498 #power-domain-cells = <0>; 499 #reset-cells = <0>; 500 label = "dcs6"; 501 }; 502 503 ps_dcs7: power-controller@80270 { 504 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 505 reg = <0x80270 4>; 506 #power-domain-cells = <0>; 507 #reset-cells = <0>; 508 label = "dcs7"; 509 }; 510 511 ps_usb2host0_ohci: power-controller@80290 { 512 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 513 reg = <0x80290 4>; 514 #power-domain-cells = <0>; 515 #reset-cells = <0>; 516 label = "usb2host0_ohci"; 517 power-domains = <&ps_usb2host0>; 518 }; 519 520 ps_usbotg: power-controller@802b8 { 521 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 522 reg = <0x802b8 4>; 523 #power-domain-cells = <0>; 524 #reset-cells = <0>; 525 label = "usbotg"; 526 power-domains = <&ps_usbctrl>; 527 }; 528 529 ps_smx: power-controller@802c0 { 530 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 531 reg = <0x802c0 4>; 532 #power-domain-cells = <0>; 533 #reset-cells = <0>; 534 label = "smx"; 535 apple,always-on; /* Apple fabric, critical block */ 536 }; 537 538 ps_sf: power-controller@802c8 { 539 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 540 reg = <0x802c8 4>; 541 #power-domain-cells = <0>; 542 #reset-cells = <0>; 543 label = "sf"; 544 apple,always-on; /* Apple fabric, critical block */ 545 }; 546 547 ps_dp0: power-controller@802e0 { 548 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 549 reg = <0x802e0 4>; 550 #power-domain-cells = <0>; 551 #reset-cells = <0>; 552 label = "dp0"; 553 power-domains = <&ps_disp0>; 554 }; 555 556 ps_dp1: power-controller@802f8 { 557 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 558 reg = <0x802f8 4>; 559 #power-domain-cells = <0>; 560 #reset-cells = <0>; 561 label = "dp1"; 562 power-domains = <&ps_disp1>; 563 }; 564 565 ps_dpa0: power-controller@80220 { 566 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 567 reg = <0x80220 4>; 568 #power-domain-cells = <0>; 569 #reset-cells = <0>; 570 label = "dpa0"; 571 }; 572 573 ps_dpa1: power-controller@80228 { 574 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 575 reg = <0x80228 4>; 576 #power-domain-cells = <0>; 577 #reset-cells = <0>; 578 label = "dpa1"; 579 }; 580 581 ps_media: power-controller@80308 { 582 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 583 reg = <0x80308 4>; 584 #power-domain-cells = <0>; 585 #reset-cells = <0>; 586 label = "media"; 587 }; 588 589 ps_isp: power-controller@80300 { 590 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 591 reg = <0x80300 4>; 592 #power-domain-cells = <0>; 593 #reset-cells = <0>; 594 label = "isp"; 595 power-domains = <&ps_rtmux>; 596 }; 597 598 ps_msr: power-controller@80318 { 599 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 600 reg = <0x80318 4>; 601 #power-domain-cells = <0>; 602 #reset-cells = <0>; 603 label = "msr"; 604 power-domains = <&ps_media>; 605 }; 606 607 ps_jpg: power-controller@80310 { 608 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 609 reg = <0x80310 4>; 610 #power-domain-cells = <0>; 611 #reset-cells = <0>; 612 label = "jpg"; 613 power-domains = <&ps_media>; 614 }; 615 616 ps_venc: power-controller@80340 { 617 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 618 reg = <0x80340 4>; 619 #power-domain-cells = <0>; 620 #reset-cells = <0>; 621 label = "venc"; 622 power-domains = <&ps_media>; 623 }; 624 625 ps_pcie: power-controller@80348 { 626 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 627 reg = <0x80348 4>; 628 #power-domain-cells = <0>; 629 #reset-cells = <0>; 630 label = "pcie"; 631 }; 632 633 ps_srs: power-controller@80390 { 634 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 635 reg = <0x80390 4>; 636 #power-domain-cells = <0>; 637 #reset-cells = <0>; 638 label = "srs"; 639 power-domains = <&ps_media>; 640 }; 641 642 ps_pcie_aux: power-controller@80350 { 643 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 644 reg = <0x80350 4>; 645 #power-domain-cells = <0>; 646 #reset-cells = <0>; 647 label = "pcie_aux"; 648 }; 649 650 ps_pcie_link0: power-controller@80358 { 651 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 652 reg = <0x80358 4>; 653 #power-domain-cells = <0>; 654 #reset-cells = <0>; 655 label = "pcie_link0"; 656 power-domains = <&ps_pcie>; 657 }; 658 659 ps_pcie_link1: power-controller@80360 { 660 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 661 reg = <0x80360 4>; 662 #power-domain-cells = <0>; 663 #reset-cells = <0>; 664 label = "pcie_link1"; 665 power-domains = <&ps_pcie>; 666 }; 667 668 ps_pcie_link2: power-controller@80368 { 669 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 670 reg = <0x80368 4>; 671 #power-domain-cells = <0>; 672 #reset-cells = <0>; 673 label = "pcie_link2"; 674 power-domains = <&ps_pcie>; 675 }; 676 677 ps_pcie_link3: power-controller@80370 { 678 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 679 reg = <0x80370 4>; 680 #power-domain-cells = <0>; 681 #reset-cells = <0>; 682 label = "pcie_link3"; 683 power-domains = <&ps_pcie>; 684 }; 685 686 ps_pcie_link4: power-controller@80378 { 687 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 688 reg = <0x80378 4>; 689 #power-domain-cells = <0>; 690 #reset-cells = <0>; 691 label = "pcie_link4"; 692 power-domains = <&ps_pcie>; 693 }; 694 695 ps_pcie_link5: power-controller@80380 { 696 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 697 reg = <0x80380 4>; 698 #power-domain-cells = <0>; 699 #reset-cells = <0>; 700 label = "pcie_link5"; 701 power-domains = <&ps_pcie>; 702 }; 703 704 ps_vdec: power-controller@80330 { 705 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 706 reg = <0x80330 4>; 707 #power-domain-cells = <0>; 708 #reset-cells = <0>; 709 label = "vdec"; 710 power-domains = <&ps_media>; 711 }; 712 713 ps_gfx: power-controller@80388 { 714 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 715 reg = <0x80388 4>; 716 #power-domain-cells = <0>; 717 #reset-cells = <0>; 718 label = "gfx"; 719 }; 720 721 ps_pmp: power-controller@80320 { 722 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 723 reg = <0x80320 4>; 724 #power-domain-cells = <0>; 725 #reset-cells = <0>; 726 label = "pmp"; 727 }; 728 729 ps_pms_sram: power-controller@80328 { 730 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 731 reg = <0x80328 4>; 732 #power-domain-cells = <0>; 733 #reset-cells = <0>; 734 label = "pms_sram"; 735 }; 736 737 ps_sep: power-controller@80400 { 738 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 739 reg = <0x80400 4>; 740 #power-domain-cells = <0>; 741 #reset-cells = <0>; 742 label = "sep"; 743 apple,always-on; /* Locked on*/ 744 }; 745 746 ps_venc_pipe: power-controller@88000 { 747 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 748 reg = <0x88000 4>; 749 #power-domain-cells = <0>; 750 #reset-cells = <0>; 751 label = "venc_pipe"; 752 power-domains = <&ps_venc>; 753 }; 754 755 ps_venc_me0: power-controller@88008 { 756 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 757 reg = <0x88008 4>; 758 #power-domain-cells = <0>; 759 #reset-cells = <0>; 760 label = "venc_me0"; 761 }; 762 763 ps_venc_me1: power-controller@88010 { 764 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 765 reg = <0x88010 4>; 766 #power-domain-cells = <0>; 767 #reset-cells = <0>; 768 label = "venc_me1"; 769 }; 770}; 771 772&pmgr_mini { 773 ps_aop: power-controller@80000 { 774 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 775 reg = <0x80000 4>; 776 #power-domain-cells = <0>; 777 #reset-cells = <0>; 778 label = "aop"; 779 power-domains = <&ps_aop_cpu &ps_aop_filter &ps_aop_busif>; 780 apple,always-on; /* Always on processor */ 781 }; 782 783 ps_debug: power-controller@80008 { 784 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 785 reg = <0x80008 4>; 786 #power-domain-cells = <0>; 787 #reset-cells = <0>; 788 label = "debug"; 789 }; 790 791 ps_aop_gpio: power-controller@80010 { 792 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 793 reg = <0x80010 4>; 794 #power-domain-cells = <0>; 795 #reset-cells = <0>; 796 label = "aop_gpio"; 797 }; 798 799 ps_aop_cpu: power-controller@80040 { 800 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 801 reg = <0x80040 4>; 802 #power-domain-cells = <0>; 803 #reset-cells = <0>; 804 label = "aop_cpu"; 805 }; 806 807 ps_aop_filter: power-controller@80048 { 808 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 809 reg = <0x80048 4>; 810 #power-domain-cells = <0>; 811 #reset-cells = <0>; 812 label = "aop_filter"; 813 }; 814 815 ps_aop_busif: power-controller@80050 { 816 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 817 reg = <0x80050 4>; 818 #power-domain-cells = <0>; 819 #reset-cells = <0>; 820 label = "aop_busif"; 821 }; 822}; 823