xref: /linux/arch/arm/boot/dts/renesas/r7s9210.dtsi (revision cdd5b5a9761fd66d17586e4f4ba6588c70e640ea)
1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Device Tree Source for the R7S9210 SoC
4*724ba675SRob Herring *
5*724ba675SRob Herring * Copyright (C) 2018 Renesas Electronics Corporation
6*724ba675SRob Herring *
7*724ba675SRob Herring */
8*724ba675SRob Herring
9*724ba675SRob Herring#include <dt-bindings/interrupt-controller/arm-gic.h>
10*724ba675SRob Herring#include <dt-bindings/clock/r7s9210-cpg-mssr.h>
11*724ba675SRob Herring
12*724ba675SRob Herring/ {
13*724ba675SRob Herring	compatible = "renesas,r7s9210";
14*724ba675SRob Herring	interrupt-parent = <&gic>;
15*724ba675SRob Herring	#address-cells = <1>;
16*724ba675SRob Herring	#size-cells = <1>;
17*724ba675SRob Herring
18*724ba675SRob Herring	/* External clocks */
19*724ba675SRob Herring	extal_clk: extal {
20*724ba675SRob Herring		#clock-cells = <0>;
21*724ba675SRob Herring		compatible = "fixed-clock";
22*724ba675SRob Herring		/* Value must be set by board */
23*724ba675SRob Herring		clock-frequency = <0>;
24*724ba675SRob Herring	};
25*724ba675SRob Herring
26*724ba675SRob Herring	rtc_x1_clk: rtc_x1 {
27*724ba675SRob Herring		#clock-cells = <0>;
28*724ba675SRob Herring		compatible = "fixed-clock";
29*724ba675SRob Herring		/* If clk present, value (32678) must be set by board */
30*724ba675SRob Herring		clock-frequency = <0>;
31*724ba675SRob Herring	};
32*724ba675SRob Herring
33*724ba675SRob Herring	usb_x1_clk: usb_x1 {
34*724ba675SRob Herring		#clock-cells = <0>;
35*724ba675SRob Herring		compatible = "fixed-clock";
36*724ba675SRob Herring		/* If clk present, value (48000000) must be set by board */
37*724ba675SRob Herring		clock-frequency = <0>;
38*724ba675SRob Herring	};
39*724ba675SRob Herring
40*724ba675SRob Herring	cpus {
41*724ba675SRob Herring		#address-cells = <1>;
42*724ba675SRob Herring		#size-cells = <0>;
43*724ba675SRob Herring
44*724ba675SRob Herring		cpu@0 {
45*724ba675SRob Herring			device_type = "cpu";
46*724ba675SRob Herring			compatible = "arm,cortex-a9";
47*724ba675SRob Herring			reg = <0>;
48*724ba675SRob Herring			clock-frequency = <528000000>;
49*724ba675SRob Herring			next-level-cache = <&L2>;
50*724ba675SRob Herring		};
51*724ba675SRob Herring	};
52*724ba675SRob Herring
53*724ba675SRob Herring	soc {
54*724ba675SRob Herring		compatible = "simple-bus";
55*724ba675SRob Herring		interrupt-parent = <&gic>;
56*724ba675SRob Herring
57*724ba675SRob Herring		#address-cells = <1>;
58*724ba675SRob Herring		#size-cells = <1>;
59*724ba675SRob Herring		ranges;
60*724ba675SRob Herring
61*724ba675SRob Herring		L2: cache-controller@1f003000 {
62*724ba675SRob Herring			compatible = "arm,pl310-cache";
63*724ba675SRob Herring			reg = <0x1f003000 0x1000>;
64*724ba675SRob Herring			interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
65*724ba675SRob Herring			arm,early-bresp-disable;
66*724ba675SRob Herring			arm,full-line-zero-disable;
67*724ba675SRob Herring			cache-unified;
68*724ba675SRob Herring			cache-level = <2>;
69*724ba675SRob Herring		};
70*724ba675SRob Herring
71*724ba675SRob Herring		scif0: serial@e8007000 {
72*724ba675SRob Herring			compatible = "renesas,scif-r7s9210";
73*724ba675SRob Herring			reg = <0xe8007000 0x18>;
74*724ba675SRob Herring			interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
75*724ba675SRob Herring				     <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
76*724ba675SRob Herring				     <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
77*724ba675SRob Herring				     <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
78*724ba675SRob Herring				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
79*724ba675SRob Herring				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
80*724ba675SRob Herring			interrupt-names = "eri", "rxi", "txi",
81*724ba675SRob Herring					  "bri", "dri", "tei";
82*724ba675SRob Herring			clocks = <&cpg CPG_MOD 47>;
83*724ba675SRob Herring			clock-names = "fck";
84*724ba675SRob Herring			power-domains = <&cpg>;
85*724ba675SRob Herring			status = "disabled";
86*724ba675SRob Herring		};
87*724ba675SRob Herring
88*724ba675SRob Herring		scif1: serial@e8007800 {
89*724ba675SRob Herring			compatible = "renesas,scif-r7s9210";
90*724ba675SRob Herring			reg = <0xe8007800 0x18>;
91*724ba675SRob Herring			interrupts = <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
92*724ba675SRob Herring				     <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>,
93*724ba675SRob Herring				     <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
94*724ba675SRob Herring				     <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
95*724ba675SRob Herring				     <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
96*724ba675SRob Herring				     <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>;
97*724ba675SRob Herring			interrupt-names = "eri", "rxi", "txi",
98*724ba675SRob Herring					  "bri", "dri", "tei";
99*724ba675SRob Herring			clocks = <&cpg CPG_MOD 46>;
100*724ba675SRob Herring			clock-names = "fck";
101*724ba675SRob Herring			power-domains = <&cpg>;
102*724ba675SRob Herring			status = "disabled";
103*724ba675SRob Herring		};
104*724ba675SRob Herring
105*724ba675SRob Herring		scif2: serial@e8008000 {
106*724ba675SRob Herring			compatible = "renesas,scif-r7s9210";
107*724ba675SRob Herring			reg = <0xe8008000 0x18>;
108*724ba675SRob Herring			interrupts = <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
109*724ba675SRob Herring				     <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
110*724ba675SRob Herring				     <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
111*724ba675SRob Herring				     <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
112*724ba675SRob Herring				     <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
113*724ba675SRob Herring				     <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
114*724ba675SRob Herring			interrupt-names = "eri", "rxi", "txi",
115*724ba675SRob Herring					  "bri", "dri", "tei";
116*724ba675SRob Herring			clocks = <&cpg CPG_MOD 45>;
117*724ba675SRob Herring			clock-names = "fck";
118*724ba675SRob Herring			power-domains = <&cpg>;
119*724ba675SRob Herring			status = "disabled";
120*724ba675SRob Herring		};
121*724ba675SRob Herring
122*724ba675SRob Herring		scif3: serial@e8008800 {
123*724ba675SRob Herring			compatible = "renesas,scif-r7s9210";
124*724ba675SRob Herring			reg = <0xe8008800 0x18>;
125*724ba675SRob Herring			interrupts = <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
126*724ba675SRob Herring				     <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
127*724ba675SRob Herring				     <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>,
128*724ba675SRob Herring				     <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
129*724ba675SRob Herring				     <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>,
130*724ba675SRob Herring				     <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
131*724ba675SRob Herring			interrupt-names = "eri", "rxi", "txi",
132*724ba675SRob Herring					  "bri", "dri", "tei";
133*724ba675SRob Herring			clocks = <&cpg CPG_MOD 44>;
134*724ba675SRob Herring			clock-names = "fck";
135*724ba675SRob Herring			power-domains = <&cpg>;
136*724ba675SRob Herring			status = "disabled";
137*724ba675SRob Herring		};
138*724ba675SRob Herring
139*724ba675SRob Herring		scif4: serial@e8009000 {
140*724ba675SRob Herring			compatible = "renesas,scif-r7s9210";
141*724ba675SRob Herring			reg = <0xe8009000 0x18>;
142*724ba675SRob Herring			interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>,
143*724ba675SRob Herring				     <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>,
144*724ba675SRob Herring				     <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>,
145*724ba675SRob Herring				     <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>,
146*724ba675SRob Herring				     <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>,
147*724ba675SRob Herring				     <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>;
148*724ba675SRob Herring			interrupt-names = "eri", "rxi", "txi",
149*724ba675SRob Herring					  "bri", "dri", "tei";
150*724ba675SRob Herring			clocks = <&cpg CPG_MOD 43>;
151*724ba675SRob Herring			clock-names = "fck";
152*724ba675SRob Herring			power-domains = <&cpg>;
153*724ba675SRob Herring			status = "disabled";
154*724ba675SRob Herring		};
155*724ba675SRob Herring
156*724ba675SRob Herring		spi0: spi@e800c800 {
157*724ba675SRob Herring			compatible = "renesas,rspi-r7s9210", "renesas,rspi-rz";
158*724ba675SRob Herring			reg = <0xe800c800 0x24>;
159*724ba675SRob Herring			interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
160*724ba675SRob Herring				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
161*724ba675SRob Herring				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>;
162*724ba675SRob Herring			interrupt-names = "error", "rx", "tx";
163*724ba675SRob Herring			clocks = <&cpg CPG_MOD 97>;
164*724ba675SRob Herring			power-domains = <&cpg>;
165*724ba675SRob Herring			num-cs = <1>;
166*724ba675SRob Herring			#address-cells = <1>;
167*724ba675SRob Herring			#size-cells = <0>;
168*724ba675SRob Herring			status = "disabled";
169*724ba675SRob Herring		};
170*724ba675SRob Herring
171*724ba675SRob Herring		spi1: spi@e800d000 {
172*724ba675SRob Herring			compatible = "renesas,rspi-r7s9210", "renesas,rspi-rz";
173*724ba675SRob Herring			reg = <0xe800d000 0x24>;
174*724ba675SRob Herring			interrupts = <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
175*724ba675SRob Herring				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
176*724ba675SRob Herring				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>;
177*724ba675SRob Herring			interrupt-names = "error", "rx", "tx";
178*724ba675SRob Herring			clocks = <&cpg CPG_MOD 96>;
179*724ba675SRob Herring			power-domains = <&cpg>;
180*724ba675SRob Herring			num-cs = <1>;
181*724ba675SRob Herring			#address-cells = <1>;
182*724ba675SRob Herring			#size-cells = <0>;
183*724ba675SRob Herring			status = "disabled";
184*724ba675SRob Herring		};
185*724ba675SRob Herring
186*724ba675SRob Herring		spi2: spi@e800d800 {
187*724ba675SRob Herring			compatible = "renesas,rspi-r7s9210", "renesas,rspi-rz";
188*724ba675SRob Herring			reg = <0xe800d800 0x24>;
189*724ba675SRob Herring			interrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
190*724ba675SRob Herring				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
191*724ba675SRob Herring				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>;
192*724ba675SRob Herring			interrupt-names = "error", "rx", "tx";
193*724ba675SRob Herring			clocks = <&cpg CPG_MOD 95>;
194*724ba675SRob Herring			power-domains = <&cpg>;
195*724ba675SRob Herring			num-cs = <1>;
196*724ba675SRob Herring			#address-cells = <1>;
197*724ba675SRob Herring			#size-cells = <0>;
198*724ba675SRob Herring			status = "disabled";
199*724ba675SRob Herring		};
200*724ba675SRob Herring
201*724ba675SRob Herring		ether0: ethernet@e8204000 {
202*724ba675SRob Herring			compatible = "renesas,ether-r7s9210";
203*724ba675SRob Herring			reg = <0xe8204000 0x200>;
204*724ba675SRob Herring			interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
205*724ba675SRob Herring			clocks = <&cpg CPG_MOD 65>;
206*724ba675SRob Herring			power-domains = <&cpg>;
207*724ba675SRob Herring
208*724ba675SRob Herring			phy-mode = "rmii";
209*724ba675SRob Herring			#address-cells = <1>;
210*724ba675SRob Herring			#size-cells = <0>;
211*724ba675SRob Herring			status = "disabled";
212*724ba675SRob Herring		};
213*724ba675SRob Herring
214*724ba675SRob Herring		ether1: ethernet@e8204200 {
215*724ba675SRob Herring			compatible = "renesas,ether-r7s9210";
216*724ba675SRob Herring			reg = <0xe8204200 0x200>;
217*724ba675SRob Herring			interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>;
218*724ba675SRob Herring			clocks = <&cpg CPG_MOD 64>;
219*724ba675SRob Herring			power-domains = <&cpg>;
220*724ba675SRob Herring			phy-mode = "rmii";
221*724ba675SRob Herring			#address-cells = <1>;
222*724ba675SRob Herring			#size-cells = <0>;
223*724ba675SRob Herring			status = "disabled";
224*724ba675SRob Herring		};
225*724ba675SRob Herring
226*724ba675SRob Herring		i2c0: i2c@e803a000 {
227*724ba675SRob Herring			#address-cells = <1>;
228*724ba675SRob Herring			#size-cells = <0>;
229*724ba675SRob Herring			compatible = "renesas,riic-r7s9210", "renesas,riic-rz";
230*724ba675SRob Herring			reg = <0xe803a000 0x44>;
231*724ba675SRob Herring			interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>,
232*724ba675SRob Herring				     <GIC_SPI 233 IRQ_TYPE_EDGE_RISING>,
233*724ba675SRob Herring				     <GIC_SPI 234 IRQ_TYPE_EDGE_RISING>,
234*724ba675SRob Herring				     <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>,
235*724ba675SRob Herring				     <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>,
236*724ba675SRob Herring				     <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>,
237*724ba675SRob Herring				     <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>,
238*724ba675SRob Herring				     <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
239*724ba675SRob Herring			interrupt-names = "tei", "ri", "ti", "spi", "sti",
240*724ba675SRob Herring					  "naki", "ali", "tmoi";
241*724ba675SRob Herring			clocks = <&cpg CPG_MOD 87>;
242*724ba675SRob Herring			power-domains = <&cpg>;
243*724ba675SRob Herring			clock-frequency = <100000>;
244*724ba675SRob Herring			status = "disabled";
245*724ba675SRob Herring		};
246*724ba675SRob Herring
247*724ba675SRob Herring		i2c1: i2c@e803a400 {
248*724ba675SRob Herring			#address-cells = <1>;
249*724ba675SRob Herring			#size-cells = <0>;
250*724ba675SRob Herring			compatible = "renesas,riic-r7s9210", "renesas,riic-rz";
251*724ba675SRob Herring			reg = <0xe803a400 0x44>;
252*724ba675SRob Herring			interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
253*724ba675SRob Herring				     <GIC_SPI 241 IRQ_TYPE_EDGE_RISING>,
254*724ba675SRob Herring				     <GIC_SPI 242 IRQ_TYPE_EDGE_RISING>,
255*724ba675SRob Herring				     <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>,
256*724ba675SRob Herring				     <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
257*724ba675SRob Herring				     <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
258*724ba675SRob Herring				     <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
259*724ba675SRob Herring				     <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
260*724ba675SRob Herring			interrupt-names = "tei", "ri", "ti", "spi", "sti",
261*724ba675SRob Herring					  "naki", "ali", "tmoi";
262*724ba675SRob Herring			clocks = <&cpg CPG_MOD 86>;
263*724ba675SRob Herring			power-domains = <&cpg>;
264*724ba675SRob Herring			clock-frequency = <100000>;
265*724ba675SRob Herring			status = "disabled";
266*724ba675SRob Herring		};
267*724ba675SRob Herring
268*724ba675SRob Herring		i2c2: i2c@e803a800 {
269*724ba675SRob Herring			#address-cells = <1>;
270*724ba675SRob Herring			#size-cells = <0>;
271*724ba675SRob Herring			compatible = "renesas,riic-r7s9210", "renesas,riic-rz";
272*724ba675SRob Herring			reg = <0xe803a800 0x44>;
273*724ba675SRob Herring			interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
274*724ba675SRob Herring				     <GIC_SPI 249 IRQ_TYPE_EDGE_RISING>,
275*724ba675SRob Herring				     <GIC_SPI 250 IRQ_TYPE_EDGE_RISING>,
276*724ba675SRob Herring				     <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
277*724ba675SRob Herring				     <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
278*724ba675SRob Herring				     <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
279*724ba675SRob Herring				     <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
280*724ba675SRob Herring				     <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
281*724ba675SRob Herring			interrupt-names = "tei", "ri", "ti", "spi", "sti",
282*724ba675SRob Herring					  "naki", "ali", "tmoi";
283*724ba675SRob Herring			clocks = <&cpg CPG_MOD 85>;
284*724ba675SRob Herring			power-domains = <&cpg>;
285*724ba675SRob Herring			clock-frequency = <100000>;
286*724ba675SRob Herring			status = "disabled";
287*724ba675SRob Herring		};
288*724ba675SRob Herring
289*724ba675SRob Herring		i2c3: i2c@e803ac00 {
290*724ba675SRob Herring			#address-cells = <1>;
291*724ba675SRob Herring			#size-cells = <0>;
292*724ba675SRob Herring			compatible = "renesas,riic-r7s9210", "renesas,riic-rz";
293*724ba675SRob Herring			reg = <0xe803ac00 0x44>;
294*724ba675SRob Herring			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
295*724ba675SRob Herring				     <GIC_SPI 257 IRQ_TYPE_EDGE_RISING>,
296*724ba675SRob Herring				     <GIC_SPI 258 IRQ_TYPE_EDGE_RISING>,
297*724ba675SRob Herring				     <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
298*724ba675SRob Herring				     <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
299*724ba675SRob Herring				     <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
300*724ba675SRob Herring				     <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
301*724ba675SRob Herring				     <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
302*724ba675SRob Herring			interrupt-names = "tei", "ri", "ti", "spi", "sti",
303*724ba675SRob Herring					  "naki", "ali", "tmoi";
304*724ba675SRob Herring			clocks = <&cpg CPG_MOD 84>;
305*724ba675SRob Herring			power-domains = <&cpg>;
306*724ba675SRob Herring			clock-frequency = <100000>;
307*724ba675SRob Herring			status = "disabled";
308*724ba675SRob Herring		};
309*724ba675SRob Herring
310*724ba675SRob Herring		ostm0: timer@e803b000 {
311*724ba675SRob Herring			compatible = "renesas,r7s9210-ostm", "renesas,ostm";
312*724ba675SRob Herring			reg = <0xe803b000 0x30>;
313*724ba675SRob Herring			interrupts = <GIC_SPI 56 IRQ_TYPE_EDGE_RISING>;
314*724ba675SRob Herring			clocks = <&cpg CPG_MOD 36>;
315*724ba675SRob Herring			power-domains = <&cpg>;
316*724ba675SRob Herring			status = "disabled";
317*724ba675SRob Herring		};
318*724ba675SRob Herring
319*724ba675SRob Herring		ostm1: timer@e803c000 {
320*724ba675SRob Herring			compatible = "renesas,r7s9210-ostm", "renesas,ostm";
321*724ba675SRob Herring			reg = <0xe803c000 0x30>;
322*724ba675SRob Herring			interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
323*724ba675SRob Herring			clocks = <&cpg CPG_MOD 35>;
324*724ba675SRob Herring			power-domains = <&cpg>;
325*724ba675SRob Herring			status = "disabled";
326*724ba675SRob Herring		};
327*724ba675SRob Herring
328*724ba675SRob Herring		ostm2: timer@e803d000 {
329*724ba675SRob Herring			compatible = "renesas,r7s9210-ostm", "renesas,ostm";
330*724ba675SRob Herring			reg = <0xe803d000 0x30>;
331*724ba675SRob Herring			interrupts = <GIC_SPI 58 IRQ_TYPE_EDGE_RISING>;
332*724ba675SRob Herring			clocks = <&cpg CPG_MOD 34>;
333*724ba675SRob Herring			power-domains = <&cpg>;
334*724ba675SRob Herring			status = "disabled";
335*724ba675SRob Herring		};
336*724ba675SRob Herring
337*724ba675SRob Herring		ohci0: usb@e8218000 {
338*724ba675SRob Herring			compatible = "generic-ohci";
339*724ba675SRob Herring			reg = <0xe8218000 0x100>;
340*724ba675SRob Herring			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
341*724ba675SRob Herring			clocks = <&cpg CPG_MOD 61>;
342*724ba675SRob Herring			phys = <&usb2_phy0>;
343*724ba675SRob Herring			phy-names = "usb";
344*724ba675SRob Herring			power-domains = <&cpg>;
345*724ba675SRob Herring			status = "disabled";
346*724ba675SRob Herring		};
347*724ba675SRob Herring
348*724ba675SRob Herring		ehci0: usb@e8218100 {
349*724ba675SRob Herring			compatible = "generic-ehci";
350*724ba675SRob Herring			reg = <0xe8218100 0x100>;
351*724ba675SRob Herring			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
352*724ba675SRob Herring			clocks = <&cpg CPG_MOD 61>;
353*724ba675SRob Herring			phys = <&usb2_phy0>;
354*724ba675SRob Herring			phy-names = "usb";
355*724ba675SRob Herring			power-domains = <&cpg>;
356*724ba675SRob Herring			status = "disabled";
357*724ba675SRob Herring		};
358*724ba675SRob Herring
359*724ba675SRob Herring		usb2_phy0: usb-phy@e8218200 {
360*724ba675SRob Herring			compatible = "renesas,usb2-phy-r7s9210", "renesas,rcar-gen3-usb2-phy";
361*724ba675SRob Herring			reg = <0xe8218200 0x700>;
362*724ba675SRob Herring			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
363*724ba675SRob Herring			clocks = <&cpg CPG_MOD 61>, <&usb_x1_clk>;
364*724ba675SRob Herring			clock-names = "fck", "usb_x1";
365*724ba675SRob Herring			power-domains = <&cpg>;
366*724ba675SRob Herring			#phy-cells = <0>;
367*724ba675SRob Herring			status = "disabled";
368*724ba675SRob Herring		};
369*724ba675SRob Herring
370*724ba675SRob Herring		usbhs0: usb@e8219000 {
371*724ba675SRob Herring			compatible = "renesas,usbhs-r7s9210", "renesas,rza2-usbhs";
372*724ba675SRob Herring			reg = <0xe8219000 0x724>;
373*724ba675SRob Herring			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
374*724ba675SRob Herring			clocks = <&cpg CPG_MOD 61>;
375*724ba675SRob Herring			renesas,buswait = <7>;
376*724ba675SRob Herring			phys = <&usb2_phy0>;
377*724ba675SRob Herring			phy-names = "usb";
378*724ba675SRob Herring			power-domains = <&cpg>;
379*724ba675SRob Herring			status = "disabled";
380*724ba675SRob Herring		};
381*724ba675SRob Herring
382*724ba675SRob Herring		ohci1: usb@e821a000 {
383*724ba675SRob Herring			compatible = "generic-ohci";
384*724ba675SRob Herring			reg = <0xe821a000 0x100>;
385*724ba675SRob Herring			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
386*724ba675SRob Herring			clocks = <&cpg CPG_MOD 60>;
387*724ba675SRob Herring			phys = <&usb2_phy1>;
388*724ba675SRob Herring			phy-names = "usb";
389*724ba675SRob Herring			power-domains = <&cpg>;
390*724ba675SRob Herring			status = "disabled";
391*724ba675SRob Herring		};
392*724ba675SRob Herring
393*724ba675SRob Herring		ehci1: usb@e821a100 {
394*724ba675SRob Herring			compatible = "generic-ehci";
395*724ba675SRob Herring			reg = <0xe821a100 0x100>;
396*724ba675SRob Herring			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
397*724ba675SRob Herring			clocks = <&cpg CPG_MOD 60>;
398*724ba675SRob Herring			phys = <&usb2_phy1>;
399*724ba675SRob Herring			phy-names = "usb";
400*724ba675SRob Herring			power-domains = <&cpg>;
401*724ba675SRob Herring			status = "disabled";
402*724ba675SRob Herring		};
403*724ba675SRob Herring
404*724ba675SRob Herring		usb2_phy1: usb-phy@e821a200 {
405*724ba675SRob Herring			compatible = "renesas,usb2-phy-r7s9210", "renesas,rcar-gen3-usb2-phy";
406*724ba675SRob Herring			reg = <0xe821a200 0x700>;
407*724ba675SRob Herring			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
408*724ba675SRob Herring			clocks = <&cpg CPG_MOD 60>, <&usb_x1_clk>;
409*724ba675SRob Herring			clock-names = "fck", "usb_x1";
410*724ba675SRob Herring			power-domains = <&cpg>;
411*724ba675SRob Herring			#phy-cells = <0>;
412*724ba675SRob Herring			status = "disabled";
413*724ba675SRob Herring		};
414*724ba675SRob Herring
415*724ba675SRob Herring		usbhs1: usb@e821b000 {
416*724ba675SRob Herring			compatible = "renesas,usbhs-r7s9210", "renesas,rza2-usbhs";
417*724ba675SRob Herring			reg = <0xe821b000 0x724>;
418*724ba675SRob Herring			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
419*724ba675SRob Herring			clocks = <&cpg CPG_MOD 60>;
420*724ba675SRob Herring			renesas,buswait = <7>;
421*724ba675SRob Herring			phys = <&usb2_phy1>;
422*724ba675SRob Herring			phy-names = "usb";
423*724ba675SRob Herring			power-domains = <&cpg>;
424*724ba675SRob Herring			status = "disabled";
425*724ba675SRob Herring		};
426*724ba675SRob Herring
427*724ba675SRob Herring		sdhi0: mmc@e8228000 {
428*724ba675SRob Herring			compatible = "renesas,sdhi-r7s9210";
429*724ba675SRob Herring			reg = <0xe8228000 0x8c0>;
430*724ba675SRob Herring			interrupts = <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>;
431*724ba675SRob Herring			clocks = <&cpg CPG_MOD 103>, <&cpg CPG_MOD 102>;
432*724ba675SRob Herring			clock-names = "core", "cd";
433*724ba675SRob Herring			power-domains = <&cpg>;
434*724ba675SRob Herring			cap-sd-highspeed;
435*724ba675SRob Herring			cap-sdio-irq;
436*724ba675SRob Herring			status = "disabled";
437*724ba675SRob Herring		};
438*724ba675SRob Herring
439*724ba675SRob Herring		sdhi1: mmc@e822a000 {
440*724ba675SRob Herring			compatible = "renesas,sdhi-r7s9210";
441*724ba675SRob Herring			reg = <0xe822a000 0x8c0>;
442*724ba675SRob Herring			interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>;
443*724ba675SRob Herring			clocks = <&cpg CPG_MOD 101>, <&cpg CPG_MOD 100>;
444*724ba675SRob Herring			clock-names = "core", "cd";
445*724ba675SRob Herring			power-domains = <&cpg>;
446*724ba675SRob Herring			cap-sd-highspeed;
447*724ba675SRob Herring			cap-sdio-irq;
448*724ba675SRob Herring			status = "disabled";
449*724ba675SRob Herring		};
450*724ba675SRob Herring
451*724ba675SRob Herring		gic: interrupt-controller@e8221000 {
452*724ba675SRob Herring			compatible = "arm,gic-400";
453*724ba675SRob Herring			#interrupt-cells = <3>;
454*724ba675SRob Herring			#address-cells = <0>;
455*724ba675SRob Herring			interrupt-controller;
456*724ba675SRob Herring			reg = <0xe8221000 0x1000>,
457*724ba675SRob Herring			      <0xe8222000 0x1000>;
458*724ba675SRob Herring		};
459*724ba675SRob Herring
460*724ba675SRob Herring		cpg: clock-controller@fcfe0010 {
461*724ba675SRob Herring			compatible = "renesas,r7s9210-cpg-mssr";
462*724ba675SRob Herring			reg = <0xfcfe0010 0x455>;
463*724ba675SRob Herring			clocks = <&extal_clk>;
464*724ba675SRob Herring			clock-names = "extal";
465*724ba675SRob Herring			#clock-cells = <2>;
466*724ba675SRob Herring			#power-domain-cells = <0>;
467*724ba675SRob Herring		};
468*724ba675SRob Herring
469*724ba675SRob Herring		wdt: watchdog@fcfe7000 {
470*724ba675SRob Herring			compatible = "renesas,r7s9210-wdt", "renesas,rza-wdt";
471*724ba675SRob Herring			reg = <0xfcfe7000 0x26>;
472*724ba675SRob Herring			interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
473*724ba675SRob Herring			clocks = <&cpg CPG_CORE R7S9210_CLK_P0>;
474*724ba675SRob Herring		};
475*724ba675SRob Herring
476*724ba675SRob Herring		bsid: chipid@fcfe8004 {
477*724ba675SRob Herring			compatible = "renesas,bsid";
478*724ba675SRob Herring			reg = <0xfcfe8004 4>;
479*724ba675SRob Herring		};
480*724ba675SRob Herring
481*724ba675SRob Herring		irqc: interrupt-controller@fcfef800 {
482*724ba675SRob Herring			compatible = "renesas,r7s9210-irqc",
483*724ba675SRob Herring				     "renesas,rza1-irqc";
484*724ba675SRob Herring			#interrupt-cells = <2>;
485*724ba675SRob Herring			#address-cells = <0>;
486*724ba675SRob Herring			interrupt-controller;
487*724ba675SRob Herring			reg = <0xfcfef800 0x6>;
488*724ba675SRob Herring			interrupt-map =
489*724ba675SRob Herring				<0 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
490*724ba675SRob Herring				<1 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
491*724ba675SRob Herring				<2 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
492*724ba675SRob Herring				<3 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
493*724ba675SRob Herring				<4 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
494*724ba675SRob Herring				<5 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
495*724ba675SRob Herring				<6 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
496*724ba675SRob Herring				<7 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
497*724ba675SRob Herring			interrupt-map-mask = <7 0>;
498*724ba675SRob Herring		};
499*724ba675SRob Herring
500*724ba675SRob Herring		pinctrl: pinctrl@fcffe000 {
501*724ba675SRob Herring			compatible = "renesas,r7s9210-pinctrl";
502*724ba675SRob Herring			reg = <0xfcffe000 0x1000>;
503*724ba675SRob Herring
504*724ba675SRob Herring			gpio-controller;
505*724ba675SRob Herring			#gpio-cells = <2>;
506*724ba675SRob Herring			gpio-ranges = <&pinctrl 0 0 176>;
507*724ba675SRob Herring		};
508*724ba675SRob Herring	};
509*724ba675SRob Herring};
510