/linux/drivers/gpio/ |
H A D | gpiolib-of.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * OF helpers for the GPIO API 5 * Copyright (c) 2007-2008 MontaVista Software, Inc. 22 #include <linux/gpio/consumer.h> 23 #include <linux/gpio/machine.h> 26 #include "gpiolib-of.h" 29 * This is Linux-specific flags. By default controllers' and Linux' mapping 30 * match, but GPIO controllers are free to translate their own flags to 31 * Linux-specific in their .xlate callback. Though, 1:1 mapping is recommended. 44 * of_gpio_named_count() - Count GPIOs for a device [all …]
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/linux/arch/arm64/boot/dts/hisilicon/ |
H A D | hi3798cv200.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd. 8 #include <dt-bindings/clock/histb-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/reset/ti-syscon.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; [all …]
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/linux/Documentation/devicetree/bindings/net/dsa/ |
H A D | mediatek,mt7530.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Arınç ÜNAL <arinc.unal@arinc9.com> 11 - Landen Chao <Landen.Chao@mediatek.com> 12 - DENG Qingfang <dqfext@gmail.com> 13 - Sean Wang <sean.wang@mediatek.com> 14 - Daniel Golle <daniel@makrotopia.org> 17 There are three versions of MT7530, standalone, in a multi-chip module and 18 built-into a SoC. [all …]
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/linux/Documentation/devicetree/bindings/phy/ |
H A D | allwinner,sun8i-r40-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,sun8i-r40-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner R40 USB PHY 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 18 const: allwinner,sun8i-r40-usb-phy 22 - description: PHY Control registers [all …]
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H A D | allwinner,sun6i-a31-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,sun6i-a31-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner A31 USB PHY 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 18 const: allwinner,sun6i-a31-usb-phy 22 - description: PHY Control registers [all …]
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H A D | allwinner,sun4i-a10-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,sun4i-a10-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner A10 USB PHY 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 19 - allwinner,sun4i-a10-usb-phy 20 - allwinner,sun7i-a20-usb-phy [all …]
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H A D | allwinner,sun8i-h3-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,sun8i-h3-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner H3 USB PHY 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 19 - allwinner,sun8i-h3-usb-phy 20 - allwinner,sun50i-h616-usb-phy [all …]
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H A D | allwinner,sun8i-a23-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,sun8i-a23-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner A23 USB PHY 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 19 - allwinner,sun8i-a23-usb-phy 20 - allwinner,sun8i-a33-usb-phy [all …]
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H A D | allwinner,sun50i-h6-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,sun50i-h6-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner H6 USB PHY 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 18 const: allwinner,sun50i-h6-usb-phy 22 - description: PHY Control registers [all …]
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H A D | allwinner,sun8i-a83t-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,sun8i-a83t-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner A83t USB PHY 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 18 const: allwinner,sun8i-a83t-usb-phy 22 - description: PHY Control registers [all …]
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H A D | allwinner,sun5i-a13-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,sun5i-a13-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner A13 USB PHY 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 18 const: allwinner,sun5i-a13-usb-phy 22 - description: PHY Control registers [all …]
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H A D | allwinner,suniv-f1c100s-usb-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,suniv-f1c100s-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner F1C100s USB PHY 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 18 const: allwinner,suniv-f1c100s-usb-phy 22 description: PHY Control registers [all …]
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H A D | allwinner,sun8i-v3s-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,sun8i-v3s-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner V3s USB PHY 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 18 const: allwinner,sun8i-v3s-usb-phy 22 - description: PHY Control registers [all …]
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/linux/arch/arm/boot/dts/marvell/ |
H A D | armada-385-clearfog-gtr.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 * Rabeeh Khoury <rabeeh@solid-run.com>, based on Russell King clearfog work 9 SERDES mapping - 10 0. SATA1 on CON18, or optionally mini PCIe CON3 - PCIe0 12 2. SATA0 on CON17, or optionally mini PCIe CON4 - PCIe1 14 4. mini PCIe CON2 - PCIe2 15 5. SFP connector, or optionally SGMII Ethernet 1512 PHY 17 USB 2.0 mapping - 18 0. USB 2.0 - 0 USB pins header CON12 19 1. USB 2.0 - 1 mini PCIe CON2 [all …]
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H A D | orion5x-netgear-wnr854t.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 4 /dts-v1/; 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include "orion5x-mv88f5181.dtsi" 11 model = "Netgear WNR854-t"; 12 compatible = "netgear,wnr854t", "marvell,orion5x-88f5181", 24 stdout-path = "serial0:115200n8"; 33 gpio-keys { 34 compatible = "gpio-keys"; [all …]
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/linux/arch/mips/boot/dts/qca/ |
H A D | ar9331.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/ath79-clk.h> 7 #address-cells = <1>; 8 #size-cells = <1>; 11 #address-cells = <1>; 12 #size-cells = <0>; 22 cpuintc: interrupt-controller { 23 compatible = "qca,ar7100-cpu-intc"; 25 interrupt-controller; 26 #interrupt-cells = <1>; [all …]
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/linux/arch/arm/boot/dts/st/ |
H A D | stm32mp151a-prtt1c.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 6 /dts-v1/; 8 #include "stm32mp151a-prtt1l.dtsi" 14 clock_ksz9031: clock-ksz9031 { 15 compatible = "fixed-clock"; 16 #clock-cells = <0>; 17 clock-frequency = <25000000>; 20 clock_sja1105: clock-sja1105 { 21 compatible = "fixed-clock"; 22 #clock-cells = <0>; [all …]
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/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | mba6ulx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2018-2022 TQ-Systems GmbH 4 * Author: Markus Niebel <Markus.Niebel@tq-group.com> 8 model = "TQ-Systems MBA6ULx Baseboard"; 18 stdout-path = &uart1; 22 compatible = "pwm-backlight"; 23 power-supply = <®_mba6ul_3v3>; 24 enable-gpios = <&expander_out0 4 GPIO_ACTIVE_HIGH>; 29 compatible = "gpio-beeper"; 33 gpio_buttons: gpio-keys { [all …]
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H A D | imx6ull-dhcom-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause 6 #include "imx6ull-dhcor-som.dtsi" 10 /delete-property/ spi2; 11 /delete-property/ spi3; 28 stdout-path = "serial0:115200n8"; 31 reg_ext_3v3_ref: regulator-ext-3v3-ref { 32 compatible = "regulator-fixed"; 33 regulator-always-on; 34 regulator-max-microvolt = <3300000>; 35 regulator-min-microvolt = <3300000>; [all …]
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/linux/arch/arm64/boot/dts/socionext/ |
H A D | uniphier-pxs3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/uniphier-gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/thermal/thermal.h> 14 compatible = "socionext,uniphier-pxs3"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; 20 #address-cells = <2>; [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx93-kontron-bl-osm-s.dts | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 /dts-v1/; 8 #include "imx93-kontron-osm-s.dtsi" 11 model = "Kontron BL i.MX93 OSM-S"; 12 compatible = "kontron,imx93-bl-osm-s", "kontron,imx93-osm-s", "fsl,imx93"; 20 compatible = "gpio-leds"; 25 linux,default-trigger = "heartbeat"; 29 pwm-beeper { 30 compatible = "pwm-beeper"; 34 reg_vcc_panel: regulator-vcc-panel { [all …]
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H A D | imx8mp-debix-som-a-bmb-08.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 9 #include "imx8mp-debix-som-a.dtsi" 12 model = "Polyhex i.MX8MPlus Debix SOM A on BMB-08"; 13 compatible = "polyhex,imx8mp-debix-som-a-bmb-08", "polyhex,imx8mp-debix-som-a", 22 stdout-path = &uart2; 25 reg_baseboard_vdd3v3: regulator-baseboard-vdd3v3 { 26 compatible = "regulator-fixed"; 27 regulator-min-microvolt = <3300000>; 28 regulator-max-microvolt = <3300000>; [all …]
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/linux/drivers/net/ethernet/chelsio/cxgb3/ |
H A D | aq100x.c | 2 * Copyright (c) 2005-2008 Chelsio, Inc. All rights reserved. 14 * - Redistributions of source code must retain the above 18 * - Redistributions in binary form must reproduce the above 65 static int aq100x_reset(struct cphy *phy, int wait) in aq100x_reset() argument 68 * Ignore the caller specified wait time; always wait for the reset to in aq100x_reset() 71 int err = t3_phy_reset(phy, MDIO_MMD_VEND1, 3000); in aq100x_reset() 74 CH_WARN(phy->adapter, "PHY%d: reset failed (0x%x).\n", in aq100x_reset() 75 phy->mdio.prtad, err); in aq100x_reset() 80 static int aq100x_intr_enable(struct cphy *phy) in aq100x_intr_enable() argument 82 int err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AQ_IMASK_PMA, IMASK_PMA); in aq100x_intr_enable() [all …]
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/linux/arch/arm/boot/dts/microchip/ |
H A D | lan966x-kontron-kswitch-d10-mmt.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "dt-bindings/phy/phy-lan966x-serdes.h" 16 stdout-path = "serial0:115200n8"; 19 gpio-restart { 20 compatible = "gpio-restart"; 21 pinctrl-0 = <&reset_pins>; 22 pinctrl-names = "default"; 23 gpios = <&gpio 56 GPIO_ACTIVE_LOW>; 29 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; [all …]
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/linux/arch/arm64/boot/dts/amlogic/ |
H A D | meson-gxl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "meson-gx.dtsi" 8 #include <dt-bindings/clock/gxbb-clkc.h> 9 #include <dt-bindings/clock/gxbb-aoclkc.h> 10 #include <dt-bindings/gpio/meson-gxl-gpio.h> 11 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> 14 compatible = "amlogic,meson-gxl"; 18 compatible = "amlogic,meson-gxl-usb-ctrl"; 21 #address-cells = <2>; 22 #size-cells = <2>; [all …]
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