Lines Matching +full:phy +full:- +full:reset +full:- +full:gpio

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "dt-bindings/phy/phy-lan966x-serdes.h"
16 		stdout-path = "serial0:115200n8";
19 	gpio-restart {
20 		compatible = "gpio-restart";
21 		pinctrl-0 = <&reset_pins>;
22 		pinctrl-names = "default";
23 		gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
29 	atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
33 		pinctrl-0 = <&usart0_pins>;
34 		pinctrl-names = "default";
40 	atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>;
44 		pinctrl-0 = <&fc3_b_pins>, <&spi3_cs_pins>;
45 		pinctrl-names = "default";
47 		cs-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
51 &gpio {
52 	pinctrl-0 = <&phy_int_pins>;
53 	pinctrl-names = "default";
55 	fc3_b_pins: fc3-b-pins {
61 	miim_c_pins: miim-c-pins {
67 	phy_int_pins: phy-int-pins {
70 		function = "gpio";
73 	reset_pins: reset-pins {
76 		function = "gpio";
79 	sgpio_a_pins: sgpio-a-pins {
85 	sgpio_b_pins: sgpio-b-pins {
91 	spi3_cs_pins: spi3-cs-pins {
94 		function = "gpio";
97 	usart0_pins: usart0-pins {
103 	usbs_a_pins: usbs-a-pins {
106 		function = "gpio";
111 	pinctrl-0 = <&miim_c_pins>;
112 	pinctrl-names = "default";
113 	reset-gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
114 	clock-frequency = <2500000>;
117 	phy4: ethernet-phy@5 {
119 		interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
120 		coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
123 	phy5: ethernet-phy@6 {
125 		interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
126 		coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
129 	phy6: ethernet-phy@7 {
131 		interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
132 		coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
135 	phy7: ethernet-phy@8 {
137 		interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
138 		coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
156 	phy-handle = <&phy0>;
157 	phy-mode = "gmii";
163 	phy-handle = <&phy1>;
164 	phy-mode = "gmii";
170 	phy-handle = <&phy4>;
171 	phy-mode = "qsgmii";
177 	phy-handle = <&phy5>;
178 	phy-mode = "qsgmii";
184 	phy-handle = <&phy6>;
185 	phy-mode = "qsgmii";
191 	phy-handle = <&phy7>;
192 	phy-mode = "qsgmii";
201 	pinctrl-0 = <&sgpio_a_pins>, <&sgpio_b_pins>;
202 	pinctrl-names = "default";
203 	bus-frequency = <8000000>;
205 	microchip,sgpio-port-ranges = <0 11>;
208 	sgpio_in: gpio@0 {
212 	sgpio_out: gpio@1 {
222 	pinctrl-0 = <&usbs_a_pins>;
223 	pinctrl-names = "default";
224 	atmel,vbus-gpio = <&gpio 66 GPIO_ACTIVE_HIGH>;