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/linux/drivers/bcma/
H A Ddriver_pcie2.c20 static u32 bcma_core_pcie2_cfg_read(struct bcma_drv_pcie2 *pcie2, u32 addr)
22 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, addr);
23 pcie2_read32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR);
24 return pcie2_read32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA);
28 static void bcma_core_pcie2_cfg_write(struct bcma_drv_pcie2 *pcie2, u32 addr, in bcma_core_pcie2_cfg_write() argument
31 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, addr); in bcma_core_pcie2_cfg_write()
32 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, val); in bcma_core_pcie2_cfg_write()
39 static u32 bcma_core_pcie2_war_delay_perst_enab(struct bcma_drv_pcie2 *pcie2, in bcma_core_pcie2_war_delay_perst_enab() argument
45 val = pcie2_read32(pcie2, BCMA_CORE_PCIE2_CLK_CONTROL); in bcma_core_pcie2_war_delay_perst_enab()
52 pcie2_write32(pcie2, (BCMA_CORE_PCIE2_CLK_CONTROL), val); in bcma_core_pcie2_war_delay_perst_enab()
[all …]
H A Dbcma_private.h142 void bcma_core_pcie2_init(struct bcma_drv_pcie2 *pcie2);
143 void bcma_core_pcie2_up(struct bcma_drv_pcie2 *pcie2);
145 static inline void bcma_core_pcie2_init(struct bcma_drv_pcie2 *pcie2) in bcma_core_pcie2_init() argument
148 WARN_ON(pcie2->core->bus->hosttype == BCMA_HOSTTYPE_PCI); in bcma_core_pcie2_init()
/linux/include/linux/bcma/
H A Dbcma_driver_pcie2.h151 #define pcie2_read16(pcie2, offset) bcma_read16((pcie2)->core, offset) argument
152 #define pcie2_read32(pcie2, offset) bcma_read32((pcie2)->core, offset) argument
153 #define pcie2_write16(pcie2, offset, val) bcma_write16((pcie2)->core, offset, val) argument
154 #define pcie2_write32(pcie2, offset, val) bcma_write32((pcie2)->core, offset, val) argument
156 #define pcie2_set32(pcie2, offset, set) bcma_set32((pcie2)->core, offset, set) argument
157 #define pcie2_mask32(pcie2, offset, mask) bcma_mask32((pcie2)->core, offset, mask) argument
/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,pcie2-phy.yaml4 $id: http://devicetree.org/schemas/phy/qcom,pcie2-phy.yaml#
7 title: Qualcomm PCIe2 PHY controller
13 The Qualcomm PCIe2 PHY is a Synopsys based phy found in a number of Qualcomm
19 - const: qcom,qcs404-pcie2-phy
20 - const: qcom,pcie2-phy
71 compatible = "qcom,qcs404-pcie2-phy", "qcom,pcie2-phy";
H A Dtransmit-amplitude.yaml55 - pcie2
/linux/arch/arm/boot/dts/marvell/
H A Darmada-388-clearfog.dts79 pcie2-0-clkreq-hog {
83 line-name = "pcie2.0-clkreq";
85 pcie2-0-w-disable-hog {
89 line-name = "pcie2.0-w-disable";
/linux/arch/arm64/boot/dts/marvell/
H A Dcn9130-cf.dtsi59 pcie2-0-clkreq-hog {
63 line-name = "pcie2.0-clkreq";
67 pcie2-0-w-disable-hog {
71 line-name = "pcie2.0-w-disable";
H A Darmada-8040-db.dts114 phy-names = "cp0-pcie2-x1-phy";
228 phy-names = "cp1-pcie2-x1-phy";
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588-rock-5t.dts100 pcie2 {
101 pcie2_1_rst: pcie2-1-rst {
104 pcie2_0_vcc3v3_en: pcie2-0-vcc-en {
H A Drk3588-rock-5b.dtsi64 pcie2 {
65 pcie2_0_vcc3v3_en: pcie2-0-vcc-en {
H A Drk3588-armsom-w3.dts351 pcie2 {
352 pcie2_0_rst: pcie2-0-rst {
356 pcie2_0_vcc3v3_en: pcie2-0-vcc-en {
360 pcie2_2_rst: pcie2-2-rst {
H A Drk3588-ok3588-c.dts320 pcie2 {
321 pcie2_0_rst: pcie2-0-rst {
325 pcie2_2_rst: pcie2-2-rst {
H A Drk3588-mnt-reform2.dts208 pcie2 {
209 pcie2_0_rst: pcie2-0-rst {
H A Drk3588-edgeble-neu6a-io.dtsi192 pcie2 {
193 pcie2_0_rst: pcie2-0-rst {
/linux/include/dt-bindings/memory/
H A Dnvidia,tegra264.h95 /* PCIE2/DMX4 Read clients */
97 /* PCIE2/DMX4 Write clients */
/linux/arch/arm64/boot/dts/broadcom/
H A Drp1.dtso6 &pcie2 {
/linux/arch/sh/drivers/pci/
H A Dpcie-sh7786.c92 .name = "PCIe2 MEM 0",
97 .name = "PCIe2 MEM 1",
102 .name = "PCIe2 MEM 2",
107 .name = "PCIe2 IO",
/linux/Documentation/devicetree/bindings/net/wireless/
H A Dqcom,ath12k-wsi.yaml29 | pcie1 | | pcie2 | | pcie3 |
40 | pcie0 | | pcie1 | | pcie2 | | pcie3 |
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmarvell,armada-38x-pinctrl.txt31 … 13 gpio, ge0(rxd1), pcie0(clkreq), pcie1(clkreq) [1], spi0(cs2), dev(ad15), pcie2(clkreq)
76 mpp58 58 gpio, pcie1(clkreq) [1], i2c1(sck), pcie2(clkreq), spi1(miso), sd0(d1), ua1(…
H A Dmarvell,armada-39x-pinctrl.txt31 mpp13 13 gpio, dev(ad15), pcie2(clkreq), led(data)
80 mpp58 58 gpio, i2c1(sck), pcie2(clkreq), spi1(miso), sd0(d1), ua1(rxd)
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm-nsp-ax.dtsi68 &pcie2 {
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-ipq8064-v2.0.dtsi51 &pcie2 {
/linux/drivers/phy/qualcomm/
H A DMakefile9 obj-$(CONFIG_PHY_QCOM_PCIE2) += phy-qcom-pcie2.o
/linux/arch/riscv/boot/dts/sophgo/
H A Dsg2044-sophgo-srd3-10.dts82 &pcie2 {
/linux/drivers/pinctrl/mvebu/
H A Dpinctrl-armada-cp110.c116 MPP_FUNCTION(7, "pcie2", "clkreq"),
264 MPP_FUNCTION(6, "pcie2", "clkreq"),
323 MPP_FUNCTION(9, "pcie2", "clkreq"),
358 MPP_FUNCTION(9, "pcie2", "clkreq"),

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