1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Device Tree file for SolidRun Clearfog Pro revision A1 rev 2.0 (88F6828) 4 * 5 * Copyright (C) 2015 Russell King 6 */ 7 8/dts-v1/; 9#include "armada-388-clearfog.dtsi" 10 11/ { 12 model = "SolidRun Clearfog A1"; 13 compatible = "solidrun,clearfog-pro-a1", "solidrun,clearfog-a1", 14 "marvell,armada388", "marvell,armada385", 15 "marvell,armada380"; 16 17 soc { 18 internal-regs { 19 usb3@f0000 { 20 /* CON2, nearest CPU, USB2 only. */ 21 status = "okay"; 22 }; 23 }; 24 25 pcie { 26 pcie@3,0 { 27 /* Port 2, Lane 0. CON2, nearest CPU. */ 28 reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>; 29 status = "okay"; 30 }; 31 }; 32 }; 33 34 gpio-keys { 35 compatible = "gpio-keys"; 36 pinctrl-0 = <&rear_button_pins>; 37 pinctrl-names = "default"; 38 39 button-0 { 40 /* The rear SW3 button */ 41 label = "Rear Button"; 42 gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; 43 linux,can-disable; 44 linux,code = <BTN_0>; 45 }; 46 }; 47}; 48 49ð1 { 50 /* ethernet@30000 */ 51 phy-mode = "1000base-x"; 52 53 fixed-link { 54 speed = <1000>; 55 full-duplex; 56 }; 57}; 58 59&expander0 { 60 /* 61 * PCA9655 GPIO expander: 62 * 0-CON3 CLKREQ# 63 * 1-CON3 PERST# 64 * 2-CON2 PERST# 65 * 3-CON3 W_DISABLE 66 * 4-CON2 CLKREQ# 67 * 5-USB3 overcurrent 68 * 6-USB3 power 69 * 7-CON2 W_DISABLE 70 * 8-JP4 P1 71 * 9-JP4 P4 72 * 10-JP4 P5 73 * 11-m.2 DEVSLP 74 * 12-SFP_LOS 75 * 13-SFP_TX_FAULT 76 * 14-SFP_TX_DISABLE 77 * 15-SFP_MOD_DEF0 78 */ 79 pcie2-0-clkreq-hog { 80 gpio-hog; 81 gpios = <4 GPIO_ACTIVE_LOW>; 82 input; 83 line-name = "pcie2.0-clkreq"; 84 }; 85 pcie2-0-w-disable-hog { 86 gpio-hog; 87 gpios = <7 GPIO_ACTIVE_LOW>; 88 output-low; 89 line-name = "pcie2.0-w-disable"; 90 }; 91}; 92 93&mdio { 94 status = "okay"; 95 96 ethernet-switch@4 { 97 compatible = "marvell,mv88e6085"; 98 reg = <4>; 99 pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>; 100 pinctrl-names = "default"; 101 102 ethernet-ports { 103 #address-cells = <1>; 104 #size-cells = <0>; 105 106 ethernet-port@0 { 107 reg = <0>; 108 label = "lan5"; 109 }; 110 111 ethernet-port@1 { 112 reg = <1>; 113 label = "lan4"; 114 }; 115 116 ethernet-port@2 { 117 reg = <2>; 118 label = "lan3"; 119 }; 120 121 ethernet-port@3 { 122 reg = <3>; 123 label = "lan2"; 124 }; 125 126 ethernet-port@4 { 127 reg = <4>; 128 label = "lan1"; 129 }; 130 131 ethernet-port@5 { 132 reg = <5>; 133 ethernet = <ð1>; 134 phy-mode = "1000base-x"; 135 136 fixed-link { 137 speed = <1000>; 138 full-duplex; 139 }; 140 }; 141 142 ethernet-port@6 { 143 /* 88E1512 external phy */ 144 reg = <6>; 145 label = "lan6"; 146 phy-mode = "rgmii-id"; 147 148 fixed-link { 149 speed = <1000>; 150 full-duplex; 151 }; 152 }; 153 }; 154 }; 155}; 156 157&pinctrl { 158 clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins { 159 marvell,pins = "mpp46"; 160 marvell,function = "ref"; 161 }; 162 clearfog_dsa0_pins: clearfog-dsa0-pins { 163 marvell,pins = "mpp23", "mpp41"; 164 marvell,function = "gpio"; 165 }; 166 clearfog_spi1_cs_pins: spi1-cs-pins { 167 marvell,pins = "mpp55"; 168 marvell,function = "spi1"; 169 }; 170 rear_button_pins: rear-button-pins { 171 marvell,pins = "mpp34"; 172 marvell,function = "gpio"; 173 }; 174}; 175 176&spi1 { 177 /* 178 * Add SPI CS pins for clearfog: 179 * CS0: W25Q32 180 * CS1: 181 * CS2: mikrobus 182 */ 183 pinctrl-0 = <&spi1_pins &clearfog_spi1_cs_pins &mikro_spi_pins>; 184}; 185