Revision tags: v6.17-rc2 |
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8d2b0853 |
| 11-Aug-2025 |
Thomas Zimmermann <tzimmermann@suse.de> |
Merge drm/drm-fixes into drm-misc-fixes
Updating drm-misc-fixes to the state of v6.17-rc1. Begins a new release cycle.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
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Revision tags: v6.17-rc1 |
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0c952efa |
| 08-Aug-2025 |
Arnd Bergmann <arnd@arndb.de> |
Merge tag 'tegra-for-6.17-arm64-dt-v3' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/fixes
arm64: tegra: Device tree changes for v6.17-rc1
This contains an extra patch tha
Merge tag 'tegra-for-6.17-arm64-dt-v3' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/fixes
arm64: tegra: Device tree changes for v6.17-rc1
This contains an extra patch that drops numa-node-id properties that were added to the Tegra264 DT files by mistake.
* tag 'tegra-for-6.17-arm64-dt-v3' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Remove numa-node-id properties arm64: tegra: Add p3971-0089+p3834-0008 support arm64: tegra: Add memory controller on Tegra264 arm64: tegra: Add Tegra264 support dt-bindings: memory: tegra: Add Tegra264 support
Link: https://lore.kernel.org/r/20250731162920.3329820-1-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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115e74a2 |
| 29-Jul-2025 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'soc-dt-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC devicetree updates from Arnd Bergmann: "There are a few new variants of existing chips:
- mt6572 is an
Merge tag 'soc-dt-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC devicetree updates from Arnd Bergmann: "There are a few new variants of existing chips:
- mt6572 is an older mobile phone chip from mediatek that was extremely popular a decade ago but never got upstreamed until now
- exynos2200 is a recent high-end mobile phone chip used in a few Samsung phones like the Galaxy S22
- Renesas R-Car V4M-7 (R8A779H2) is an updated version of R-Car V4M (R8A779H0) and used in automotive applications
- Tegra264 is a new chip from NVIDIA, but support is fairly minimal for now, and not much information is public about it
There are five more chips in a separate branch, as those are new chip families that I merged along with the necessary infrastructure.
New board support is not that exciting, with a total of 33 newly added machines here:
- Evaluation platforms for the chips above, plus TI am62d2 and Sophgo sg2042
- Six 32-bit industrial boards based on stm32, imx6 and am33 chips, plus eight 64-bit rockchips rk33xx/rk35xx, am62d2, t527, imx8 and imx95
- Two newly added ASPEED BMC based motherboards, and one that got removed
- Phones and Tablets based on 32-bit mt6572, tegra30 and 64-bit msm8976 SoCs
- Three Laptops based on Mediatek mt8186 and Qualcomm Snapdragon X1
- A set-top box based on Amlogic meson-gxm
Updates for existing machines are spread over all the above families. One notable change here is support for the RP1 I/O chip used in Raspberry Pi 5"
* tag 'soc-dt-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (606 commits) riscv: dts: sophgo: fix mdio node name for CV180X riscv: dts: sophgo: sophgo-srd3-10: reserve uart0 device riscv: dts: sophgo: add Sophgo SG2042_EVB_V2.0 board device tree riscv: dts: sophgo: add Sophgo SG2042_EVB_V1.X board device tree dt-bindings: riscv: add Sophgo SG2042_EVB_V1.X/V2.0 bindings riscv: dts: sophgo: add ethernet GMAC device for sg2042 riscv: dts: sophgo: Enable ethernet device for Huashan Pi riscv: dts: sophgo: Add mdio multiplexer device for cv18xx riscv: dts: sophgo: Add ethernet device for cv18xx riscv: dts: sophgo: sg2044: add pmu configuration riscv: dts: sophgo: sg2044: add ziccrse extension riscv: dts: sophgo: add zfh for sg2042 riscv: dts: sophgo: add ziccrse for sg2042 riscv: dts: sophgo: Add xtheadvector to the sg2042 devicetree riscv: dts: sophgo: sg2044: add PCIe device support for SG2044 riscv: dts: sophgo: sg2044: add MSI device support for SG2044 riscv: dts: sophgo: add reset configuration for Sophgo CV1800 series SoC riscv: dts: sophgo: add reset generator for Sophgo CV1800 series SoC dt-bindings: soc: sophgo: Move SoCs/boards from riscv into soc, add SG2000 riscv: dts: sophgo: sg2044: Add missing riscv,cbop-block-size property ...
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Revision tags: v6.16 |
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62bd59ca |
| 22-Jul-2025 |
Arnd Bergmann <arnd@arndb.de> |
Merge tag 'tegra-for-6.17-memory' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers
memory: tegra: Updates for v6.17-rc1
Enable support for the memory and external mem
Merge tag 'tegra-for-6.17-memory' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers
memory: tegra: Updates for v6.17-rc1
Enable support for the memory and external memory controllers found on Tegra264.
* tag 'tegra-for-6.17-memory' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: memory: tegra: Add Tegra264 MC and EMC support dt-bindings: memory: tegra: Add Tegra264 support
Link: https://lore.kernel.org/r/20250711220943.2389322-4-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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8fa90d09 |
| 22-Jul-2025 |
Arnd Bergmann <arnd@arndb.de> |
Merge tag 'tegra-for-6.17-dt-bindings' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
dt-bindings: Updates for v6.17-rc1
Add Tegra264 compatible strings for some core co
Merge tag 'tegra-for-6.17-dt-bindings' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
dt-bindings: Updates for v6.17-rc1
Add Tegra264 compatible strings for some core components and extend bindings where necessary to accomodate the new hardware generation. Also document some new platforms, for both old and new chips.
* tag 'tegra-for-6.17-dt-bindings' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: arm: tegra: Add Asus Portable AiO P1801-T dt-bindings: arm: tegra: Add Asus VivoTab RT TF600T dt-bindings: Add Tegra264 clock and reset definitions dt-bindings: tegra: Document P3971-0089+P3834-0008 Platform dt-bindings: rtc: tegra: Document Tegra264 RTC dt-bindings: dma: Add Tegra264 compatible string dt-bindings: misc: Document Tegra264 APBMISC compatible dt-bindings: firmware: Document Tegra264 BPMP dt-bindings: mailbox: tegra-hsp: Properly sort compatible string list dt-bindings: mailbox: tegra-hsp: Bump number of shared interrupts dt-bindings: tegra: pmc: Add Tegra264 compatible dt-bindings: memory: tegra: Add Tegra264 support
Link: https://lore.kernel.org/r/20250711220943.2389322-3-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Revision tags: v6.16-rc7, v6.16-rc6 |
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f1358b13 |
| 11-Jul-2025 |
Thierry Reding <treding@nvidia.com> |
Merge branch 'for-6.17/dt-bindings' into for-6.17/arm64/dt
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1f7bc0ec |
| 11-Jul-2025 |
Thierry Reding <treding@nvidia.com> |
Merge branch 'for-6.17/dt-bindings' into for-6.17/memory
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0b226380 |
| 10-Jul-2025 |
Sumit Gupta <sumitg@nvidia.com> |
dt-bindings: memory: tegra: Add Tegra264 support
Add bindings for the Memory Controller (MC) and External Memory Controller (EMC) found on the Tegra264 SoC. Tegra264 SoC has a different number of in
dt-bindings: memory: tegra: Add Tegra264 support
Add bindings for the Memory Controller (MC) and External Memory Controller (EMC) found on the Tegra264 SoC. Tegra264 SoC has a different number of interrupt lines for MC sub-units: UCF_SOC, hub, hub common, syncpoint and MC channel. The total number of interrupt lines is eight. Update maxItems for MC interrupts accordingly.
This also adds a header containing the memory client ID definitions that are used by the interconnects property in DT and the tegra_mc_client table in the MC driver. These IDs are defined by the hardware, so the numbering doesn't start at 0 and contains holes. Also added are the stream IDs for various hardware blocks found on Tegra264. These are allocated as blocks of 256 IDs and each block can be subdivided for additional fine-grained isolation if needed.
Signed-off-by: Sumit Gupta <sumitg@nvidia.com> [treding@nvidia.com: add SMMU stream IDs, squash patches] Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250709222147.3758356-2-thierry.reding@gmail.com Signed-off-by: Thierry Reding <treding@nvidia.com>
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