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/linux/Documentation/devicetree/bindings/usb/
H A Dusb-drd.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/usb-drd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic USB OTG Controller
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
13 otg-rev:
15 Tells usb driver the release number of the OTG and EH supplement with
16 which the device and its descriptors are compliant, in binary-coded
17 decimal (i.e. 2.0 is 0200H). This property is used if any real OTG
[all …]
H A Ddwc2.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DesignWare HS OTG USB 2.0 controller
10 - Rob Herring <robh@kernel.org>
13 - $ref: usb-drd.yaml#
14 - $ref: usb-hcd.yaml#
19 - const: brcm,bcm2835-usb
20 - const: hisilicon,hi6220-usb
21 - const: ingenic,jz4775-otg
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H A Dcdns,usb3.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence USBSS-DRD controller
10 - Pawel Laszczak <pawell@cadence.com>
18 - description: OTG controller registers
19 - description: XHCI Host controller registers
20 - description: DEVICE controller registers
22 reg-names:
24 - const: otg
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H A Dmediatek,musb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek MUSB DRD/OTG Controller
11 - Min Guo <min.guo@mediatek.com>
15 pattern: '^usb@[0-9a-f]+$'
19 - enum:
20 - mediatek,mt8516-musb
21 - mediatek,mt2701-musb
22 - mediatek,mt7623-musb
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H A Dmediatek,mtu3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-drd.yaml
23 - enum:
24 - mediatek,mt2712-mtu3
25 - mediatek,mt8173-mtu3
26 - mediatek,mt8183-mtu3
27 - mediatek,mt8186-mtu3
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/linux/drivers/usb/phy/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
19 Enable this to support the USB OTG transceiver in AB8500 chip.
24 tristate "Freescale USB OTG Transceiver Driver"
29 Enable this to support Freescale USB OTG transceiver.
42 depends on USB_GADGET || !USB_GADGET # if USB_GADGET=m, NOP can't be built-in
46 built-in with usb ip or which are autonomous and doesn't require any
68 Enable this to support the USB OTG transceiver on TWL6030
70 and OTG SRP events capabilities. For all other transceiver functionality
73 The definition of internal PHY APIs are in the mach-omap2 layer.
76 tristate "GPIO based peripheral-only VBUS sensing 'transceiver'"
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/linux/drivers/phy/samsung/
H A Dphy-exynos5250-usb2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Samsung SoC USB 1.1/2.0 PHY driver - Exynos 5250 support
13 #include "phy-samsung-usb2.h"
124 /* Mode switch register */
145 switch (rate) { in exynos5250_rate_to_clk()
168 return -EINVAL; in exynos5250_rate_to_clk()
176 struct samsung_usb2_phy_driver *drv = inst->drv; in exynos5250_isol()
180 if (drv->cfg == &exynos5250_usb2_phy_config && in exynos5250_isol()
181 inst->cfg->id == EXYNOS5250_DEVICE) in exynos5250_isol()
183 else if (drv->cfg == &exynos5250_usb2_phy_config && in exynos5250_isol()
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/linux/include/linux/usb/
H A Dotg.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* USB OTG (On The Go) defines */
28 int (*set_host)(struct usb_otg *otg, struct usb_bus *host);
31 int (*set_peripheral)(struct usb_otg *otg,
34 /* effective for A-peripheral, ignored for B devices */
35 int (*set_vbus)(struct usb_otg *otg, bool enabled);
37 /* for B devices only: start session with A-Host */
38 int (*start_srp)(struct usb_otg *otg);
40 /* start or continue HNP role switch */
41 int (*start_hnp)(struct usb_otg *otg);
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/linux/drivers/usb/common/
H A Dusb-otg-fsm.c1 // SPDX-License-Identifier: GPL-2.0+
3 * OTG Finite State Machine from OTG spec
8 * Jerry Huang <Chang-Ming.Huang@freescale.com>
18 #include <linux/usb/otg.h>
19 #include <linux/usb/otg-fsm.h>
33 if (fsm->protocol != protocol) { in otg_set_protocol()
34 VDBG("Changing role fsm->protocol= %d; new protocol= %d\n", in otg_set_protocol()
35 fsm->protocol, protocol); in otg_set_protocol()
37 if (fsm->protocol == PROTO_HOST) in otg_set_protocol()
39 else if (fsm->protocol == PROTO_GADGET) in otg_set_protocol()
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/linux/Documentation/usb/
H A Dchipidea.rst5 1. How to test OTG FSM(HNP and SRP)
6 -----------------------------------
8 To show how to demo OTG HNP and SRP functions via sys input files
11 1.1 How to enable OTG FSM
12 -------------------------
18 variables for otg fsm, mount debugfs, there are 2 files
19 which can show otg fsm variables and some controller registers value::
21 cat /sys/kernel/debug/ci_hdrc.0/otg
29 otg-rev = <0x0200>;
30 adp-disable;
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/linux/drivers/extcon/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
11 host USB ports. Many of 30-pin connectors including PDMI are
25 tristate "X-Power AXP288 EXTCON support"
30 and USB MUX switching by X-Power AXP288 PMIC.
39 FSA9480 microUSB switch and accessory detector chip. The FSA9480 is a USB
40 port accessory detector and switch. The FSA9480 is fully controlled using
55 Say Y here to enable extcon support for USB OTG ports controlled by
84 microUSB switch and accessory detector chip. The LC824206XA is a USB
85 port accessory detector and switch. The LC824206XA is fully controlled
97 detector and switch.
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/linux/drivers/usb/cdns3/
H A Dcore.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2017-2018 NXP
6 * Copyright (C) 2018-2019 Cadence.
14 #include <linux/usb/otg.h>
20 * struct cdns_role_driver - host/gadget role driver
51 * struct cdns - Representation of Cadence USB3 DRD controller.
56 * @otg_res: the resource for otg
57 * @otg_v0_regs: pointer to base of v0 otg registers
58 * @otg_v1_regs: pointer to base of v1 otg registers
59 * @otg_cdnsp_regs: pointer to base of CDNSP otg registers
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H A Ddrd.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2020 Cadence.
16 #include <linux/usb/otg.h>
22 * cdns_set_mode - change mode of OTG Core
33 switch (mode) { in cdns_set_mode()
39 dev_dbg(cdns->dev, "Set controller to OTG mode\n"); in cdns_set_mode()
41 if (cdns->version == CDNSP_CONTROLLER_V2) in cdns_set_mode()
42 override_reg = &cdns->otg_cdnsp_regs->override; in cdns_set_mode()
43 else if (cdns->version == CDNS3_CONTROLLER_V1) in cdns_set_mode()
44 override_reg = &cdns->otg_v1_regs->override; in cdns_set_mode()
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/linux/drivers/power/supply/
H A Daxp288_charger.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * axp288_charger.c - X-power AXP288 PMIC Charger driver
5 * Copyright (C) 2016-2017 Hans de Goede <hdegoede@redhat.com>
18 #include <linux/usb/otg.h>
126 /* OTG/Host mode */
132 } otg; member
160 else if (cc > info->max_cc) in axp288_charger_set_cc()
161 cc = info->max_cc; in axp288_charger_set_cc()
163 reg_val = (cc - CHRG_CCCV_CC_OFFSET) / CHRG_CCCV_CC_LSB_RES; in axp288_charger_set_cc()
167 ret = regmap_update_bits(info->regmap, in axp288_charger_set_cc()
[all …]
H A Drt5033_charger.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/devm-helpers.h>
18 #include <linux/mfd/rt5033-private.h>
38 bool otg; member
45 struct regmap *regmap = charger->regmap; in rt5033_get_charger_state()
54 switch (reg_data & RT5033_CHG_STAT_MASK) { in rt5033_get_charger_state()
71 /* For OTG mode, RT5033 would still report "charging" */ in rt5033_get_charger_state()
72 if (charger->otg) in rt5033_get_charger_state()
80 struct regmap *regmap = charger->regmap; in rt5033_get_charger_type()
86 switch (reg_data & RT5033_CHG_STAT_TYPE_MASK) { in rt5033_get_charger_type()
[all …]
/linux/drivers/usb/chipidea/
H A Dotg.c1 // SPDX-License-Identifier: GPL-2.0
3 * otg.c - ChipIdea USB IP core OTG driver
11 * This file mainly handles otgsc register, OTG fsm operations for HNP and SRP
15 #include <linux/usb/otg.h>
21 #include "otg.h"
25 * hw_read_otgsc - returns otgsc register bits value.
38 cable = &ci->platdata->vbus_extcon; in hw_read_otgsc()
39 if (!IS_ERR(cable->edev) || ci->role_switch) { in hw_read_otgsc()
40 if (cable->changed) in hw_read_otgsc()
45 if (cable->connected) in hw_read_otgsc()
[all …]
/linux/drivers/usb/musb/
H A Dmusb_virthub.c1 // SPDX-License-Identifier: GPL-2.0
3 * MUSB OTG driver virtual root hub support
6 * Copyright (C) 2005-2006 by Texas Instruments
7 * Copyright (C) 2006-2007 Nokia Corporation
29 spin_lock_irqsave(&musb->lock, flags); in musb_host_finish_resume()
31 power = musb_readb(musb->mregs, MUSB_POWER); in musb_host_finish_resume()
34 musb_writeb(musb->mregs, MUSB_POWER, power); in musb_host_finish_resume()
41 musb->is_active = 1; in musb_host_finish_resume()
42 musb->port1_status &= ~(USB_PORT_STAT_SUSPEND | MUSB_PORT_STAT_RESUME); in musb_host_finish_resume()
43 musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16; in musb_host_finish_resume()
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dnvidia,tegra194-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
H A Dnvidia,tegra186-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
H A Dnvidia,tegra210-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
/linux/Documentation/devicetree/bindings/power/supply/
H A Drichtek,rt9467.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
11 - ChiaEn Wu <chiaen_wu@richtek.com>
14 RT9467 is a switch-mode single cell Li-Ion/Li-Polymer battery charger for
16 MOSFETs, input current sensing and regulation, high-accuracy voltage
20 The RT9467 also features USB On-The-Go (OTG) support. It also integrates
21 D+/D- pin for USB host/charging port detection.
24 https://www.richtek.com/assets/product_file/RT9467/DS9467-01.pdf
[all …]
H A Dqcom,pm8941-charger.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/supply/qcom,pm8941-charger.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Switch-Mode Battery Charger and Boost
10 - Sebastian Reichel <sre@kernel.org>
15 - qcom,pm8226-charger
16 - qcom,pm8941-charger
23 - description: charge done
24 - description: charge fast mode
[all …]
/linux/Documentation/ABI/stable/
H A Dsysfs-class-udc6 Indicates if an OTG A-Host supports HNP at an alternate port.
14 Indicates if an OTG A-Host supports HNP at this port.
22 Indicates if an OTG A-Host enabled HNP support.
38 Indicates that this port is the default Host on an OTG session
39 but HNP was used to switch roles.
47 Indicates that this port support OTG.
81 states are: 'not-attached', 'attached', 'powered',
/linux/arch/mips/lantiq/xway/
H A Dsysctrl.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2011-2012 John Crispin <john@phrozen.org>
5 * Copyright (C) 2013-2015 Lantiq Beteiligungs-GmbH & Co.KG
124 #define PMU1_PCIE_PHY BIT(0) /* vr9-specific,moved in ar10/grx390 */
165 do {} while (--retry && (pmu_r32(PMU_PWDSR) & module)); in ltq_pmu_enable()
180 do {} while (--retry && (!(pmu_r32(PMU_PWDSR) & module))); in ltq_pmu_disable()
191 ltq_cgu_w32(ltq_cgu_r32(ifccr) | clk->bits, ifccr); in cgu_enable()
198 ltq_cgu_w32(ltq_cgu_r32(ifccr) & ~clk->bits, ifccr); in cgu_disable()
208 pmu_w32(clk->bits, PWDCR_EN_XRX(clk->module)); in pmu_enable()
209 do {} while (--retry && in pmu_enable()
[all …]
/linux/arch/arm/mach-omap1/
H A Dusb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Platform level USB initialization for FS USB OTG controller on omap1
12 #include <linux/dma-map-ops.h>
15 #include <linux/soc/ti/omap1-io.h>
24 /* These routines should handle the standard chip-specific modes
27 * Some board-*.c files will need to set up additional mux options,
32 * - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
33 * - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
34 * - 5912 OSK UDC, with *nonstandard* A-to-A cable
35 * - 1510 Innovator UDC with bundled usb0 cable
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