Lines Matching +full:otg +full:- +full:switch
1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2011-2012 John Crispin <john@phrozen.org>
5 * Copyright (C) 2013-2015 Lantiq Beteiligungs-GmbH & Co.KG
124 #define PMU1_PCIE_PHY BIT(0) /* vr9-specific,moved in ar10/grx390 */
165 do {} while (--retry && (pmu_r32(PMU_PWDSR) & module)); in ltq_pmu_enable()
180 do {} while (--retry && (!(pmu_r32(PMU_PWDSR) & module))); in ltq_pmu_disable()
191 ltq_cgu_w32(ltq_cgu_r32(ifccr) | clk->bits, ifccr); in cgu_enable()
198 ltq_cgu_w32(ltq_cgu_r32(ifccr) & ~clk->bits, ifccr); in cgu_disable()
208 pmu_w32(clk->bits, PWDCR_EN_XRX(clk->module)); in pmu_enable()
209 do {} while (--retry && in pmu_enable()
210 (!(pmu_r32(PWDSR_XRX(clk->module)) & clk->bits))); in pmu_enable()
214 pmu_w32(pmu_r32(PWDCR(clk->module)) & ~clk->bits, in pmu_enable()
215 PWDCR(clk->module)); in pmu_enable()
216 do {} while (--retry && in pmu_enable()
217 (pmu_r32(PWDSR(clk->module)) & clk->bits)); in pmu_enable()
234 pmu_w32(clk->bits, PWDCR_DIS_XRX(clk->module)); in pmu_disable()
235 do {} while (--retry && in pmu_disable()
236 (pmu_r32(PWDSR_XRX(clk->module)) & clk->bits)); in pmu_disable()
239 pmu_w32(pmu_r32(PWDCR(clk->module)) | clk->bits, in pmu_disable()
240 PWDCR(clk->module)); in pmu_disable()
241 do {} while (--retry && in pmu_disable()
242 (!(pmu_r32(PWDSR(clk->module)) & clk->bits))); in pmu_disable()
277 if (clk->rate == CLOCK_33M) in pci_enable()
283 if (clk->rate == CLOCK_33M) in pci_enable()
315 if (clk->rates[i] == clk->rate) { in clkout_enable()
316 int shift = 14 - (2 * clk->module); in clkout_enable()
317 int enable = 7 - clk->module; in clkout_enable()
327 return -1; in clkout_enable()
338 clk->cl.dev_id = dev; in clkdev_add_pmu()
339 clk->cl.con_id = con; in clkdev_add_pmu()
340 clk->cl.clk = clk; in clkdev_add_pmu()
341 clk->enable = pmu_enable; in clkdev_add_pmu()
342 clk->disable = pmu_disable; in clkdev_add_pmu()
343 clk->module = module; in clkdev_add_pmu()
344 clk->bits = bits; in clkdev_add_pmu()
352 clkdev_add(&clk->cl); in clkdev_add_pmu()
363 clk->cl.dev_id = dev; in clkdev_add_cgu()
364 clk->cl.con_id = con; in clkdev_add_cgu()
365 clk->cl.clk = clk; in clkdev_add_cgu()
366 clk->enable = cgu_enable; in clkdev_add_cgu()
367 clk->disable = cgu_disable; in clkdev_add_cgu()
368 clk->bits = bits; in clkdev_add_cgu()
369 clkdev_add(&clk->cl); in clkdev_add_cgu()
382 clk->cl.dev_id = "17000000.pci"; in clkdev_add_pci()
383 clk->cl.con_id = NULL; in clkdev_add_pci()
384 clk->cl.clk = clk; in clkdev_add_pci()
385 clk->rate = CLOCK_33M; in clkdev_add_pci()
386 clk->rates = valid_pci_rates; in clkdev_add_pci()
387 clk->enable = pci_enable; in clkdev_add_pci()
388 clk->disable = pmu_disable; in clkdev_add_pci()
389 clk->module = 0; in clkdev_add_pci()
390 clk->bits = PMU_PCI; in clkdev_add_pci()
391 clkdev_add(&clk->cl); in clkdev_add_pci()
396 clk_ext->cl.dev_id = "17000000.pci"; in clkdev_add_pci()
397 clk_ext->cl.con_id = "external"; in clkdev_add_pci()
398 clk_ext->cl.clk = clk_ext; in clkdev_add_pci()
399 clk_ext->enable = pci_ext_enable; in clkdev_add_pci()
400 clk_ext->disable = pci_ext_disable; in clkdev_add_pci()
401 clkdev_add(&clk_ext->cl); in clkdev_add_pci()
431 clk->cl.dev_id = "1f103000.cgu"; in clkdev_add_clkout()
432 clk->cl.con_id = name; in clkdev_add_clkout()
433 clk->cl.clk = clk; in clkdev_add_clkout()
434 clk->rate = 0; in clkdev_add_clkout()
435 clk->rates = valid_clkout_rates[i]; in clkdev_add_clkout()
436 clk->enable = clkout_enable; in clkdev_add_clkout()
437 clk->module = i; in clkdev_add_clkout()
438 clkdev_add(&clk->cl); in clkdev_add_clkout()
447 of_find_compatible_node(NULL, NULL, "lantiq,pmu-xway"); in ltq_soc_init()
449 of_find_compatible_node(NULL, NULL, "lantiq,cgu-xway"); in ltq_soc_init()
451 of_find_compatible_node(NULL, NULL, "lantiq,ebu-xway"); in ltq_soc_init()
508 clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY0); in ltq_soc_init()
509 clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY1); in ltq_soc_init()
510 clkdev_add_pmu("1e108000.switch", "gphy2", 0, 0, PMU_GPHY2); in ltq_soc_init()
511 clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 2, PMU_ANALOG_USB0_P); in ltq_soc_init()
512 clkdev_add_pmu("1f203034.usb2-phy", "phy", 1, 2, PMU_ANALOG_USB1_P); in ltq_soc_init()
532 clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0); in ltq_soc_init()
533 clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P); in ltq_soc_init()
542 clkdev_add_pmu("1e108000.switch", "gphy3", 0, 0, PMU_GPHY3); in ltq_soc_init()
543 clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0); in ltq_soc_init()
544 clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1); in ltq_soc_init()
556 clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0); in ltq_soc_init()
557 clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1); in ltq_soc_init()
567 clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P); in ltq_soc_init()
568 clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0 | PMU_AHBM); in ltq_soc_init()
569 clkdev_add_pmu("1f203034.usb2-phy", "phy", 1, 0, PMU_USB1_P); in ltq_soc_init()
570 clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1 | PMU_AHBM); in ltq_soc_init()
583 clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY); in ltq_soc_init()
584 clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY); in ltq_soc_init()
591 clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P); in ltq_soc_init()
592 clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0 | PMU_AHBM); in ltq_soc_init()
593 clkdev_add_pmu("1f203034.usb2-phy", "phy", 1, 0, PMU_USB1_P); in ltq_soc_init()
594 clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1 | PMU_AHBM); in ltq_soc_init()
595 clkdev_add_pmu("1e180000.etop", "switch", 1, 0, PMU_SWITCH); in ltq_soc_init()
603 clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0 | PMU_AHBM); in ltq_soc_init()
604 clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P); in ltq_soc_init()