/linux/Documentation/devicetree/bindings/cpufreq/ |
H A D | qcom-cpufreq-nvmem.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/cpufreq/qcom-cpufreq-nvmem.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ilia Lin <ilia.lin@kernel.org> 17 on the CPU OPP in use. The CPUFreq driver sets the CPR power domain level 28 - qcom,apq8064 29 - qcom,apq8096 30 - qcom,ipq5332 31 - qcom,ipq6018 [all …]
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/linux/Documentation/devicetree/bindings/power/ |
H A D | qcom,rpmpd.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/power/qcom,rpmpd.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 19 - enum: 20 - qcom,mdm9607-rpmpd 21 - qcom,msm8226-rpmpd 22 - qcom,msm8909-rpmpd 23 - qcom,msm8916-rpmpd [all …]
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | sdm660.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 13 compatible = "qcom,adreno-512.0", "qcom,adreno"; 14 operating-points-v2 = <&gpu_sdm660_opp_table>; 16 gpu_sdm660_opp_table: opp-table { 17 compatible = "operating-points-v2"; 23 * at the same opp-level 25 opp-750000000 { 26 opp-hz = /bits/ 64 <750000000>; 27 opp-level = <RPM_SMD_LEVEL_TURBO>; 28 opp-peak-kBps = <5412000>; [all …]
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H A D | sc7180.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 5 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. 8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h> 9 #include <dt-bindings/clock/qcom,gcc-sc7180.h> 10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h> 11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h> 12 #include <dt-bindings/clock/qcom,rpmh.h> 13 #include <dt-bindings/clock/qcom,videocc-sc7180.h> 14 #include <dt-bindings/firmware/qcom,scm.h> 15 #include <dt-bindings/interconnect/qcom,icc.h> [all …]
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H A D | sdm845.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/qcom,camcc-sdm845.h> 9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h> 10 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h> 12 #include <dt-bindings/clock/qcom,lpass-sdm845.h> 13 #include <dt-bindings/clock/qcom,rpmh.h> 14 #include <dt-bindings/clock/qcom,videocc-sdm845.h> 15 #include <dt-bindings/dma/qcom-gpi.h> 16 #include <dt-bindings/firmware/qcom,scm.h> [all …]
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H A D | sm6350.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 7 #include <dt-bindings/clock/qcom,dispcc-sm6350.h> 8 #include <dt-bindings/clock/qcom,gcc-sm6350.h> 9 #include <dt-bindings/clock/qcom,gpucc-sm6350.h> 10 #include <dt-bindings/clock/qcom,rpmh.h> 11 #include <dt-bindings/clock/qcom,sm6350-camcc.h> 12 #include <dt-bindings/dma/qcom-gpi.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/interconnect/qcom,icc.h> 15 #include <dt-bindings/interconnect/qcom,osm-l3.h> [all …]
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H A D | sc7280.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. 7 #include <dt-bindings/clock/qcom,camcc-sc7280.h> 8 #include <dt-bindings/clock/qcom,dispcc-sc7280.h> 9 #include <dt-bindings/clock/qcom,gcc-sc7280.h> 10 #include <dt-bindings/clock/qcom,gpucc-sc7280.h> 11 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h> 12 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h> 13 #include <dt-bindings/clock/qcom,rpmh.h> 14 #include <dt-bindings/clock/qcom,videocc-sc7280.h> [all …]
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H A D | sdm670.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h> 10 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 11 #include <dt-bindings/clock/qcom,rpmh.h> 12 #include <dt-bindings/dma/qcom-gpi.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/interconnect/qcom,osm-l3.h> 15 #include <dt-bindings/interconnect/qcom,sdm670-rpmh.h> 16 #include <dt-bindings/interrupt-controller/arm-gic.h> 17 #include <dt-bindings/phy/phy-qcom-qusb2.h> [all …]
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H A D | ipq5332.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 5 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. 8 #include <dt-bindings/clock/qcom,apss-ipq.h> 9 #include <dt-bindings/clock/qcom,ipq5332-gcc.h> 10 #include <dt-bindings/interconnect/qcom,ipq5332.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 interrupt-parent = <&intc>; 15 #address-cells = <2>; 16 #size-cells = <2>; 19 sleep_clk: sleep-clk { [all …]
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H A D | sc8280xp.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 7 #include <dt-bindings/clock/qcom,dispcc-sc8280xp.h> 8 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h> 9 #include <dt-bindings/clock/qcom,gpucc-sc8280xp.h> 10 #include <dt-bindings/clock/qcom,rpmh.h> 11 #include <dt-bindings/clock/qcom,sc8280xp-camcc.h> 12 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h> 13 #include <dt-bindings/interconnect/qcom,osm-l3.h> 14 #include <dt-bindings/interconnect/qcom,sc8280xp.h> 15 #include <dt-bindings/interrupt-controller/arm-gic.h> [all …]
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H A D | msm8996-v3.0.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 9 qcom,msm-id = <246 0x30000>; 22 gpu_opp_table_3_0: opp-table-gpu30 { 23 compatible = "operating-points-v2"; 25 opp-624000000 { 26 opp-hz = /bits/ 64 <624000000>; 27 opp-level = <7>; 30 opp-560000000 { 31 opp-hz = /bits/ 64 <560000000>; 32 opp-level = <6>; [all …]
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H A D | ipq5018.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause 8 #include <dt-bindings/clock/qcom,apss-ipq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/qcom,gcc-ipq5018.h> 11 #include <dt-bindings/reset/qcom,gcc-ipq5018.h> 14 interrupt-parent = <&intc>; 15 #address-cells = <2>; 16 #size-cells = <2>; 19 sleep_clk: sleep-clk { 20 compatible = "fixed-clock"; [all …]
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H A D | sm8450.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,gcc-sm8450.h> 8 #include <dt-bindings/clock/qcom,rpmh.h> 9 #include <dt-bindings/clock/qcom,sm8450-camcc.h> 10 #include <dt-bindings/clock/qcom,sm8450-dispcc.h> 11 #include <dt-bindings/clock/qcom,sm8450-gpucc.h> 12 #include <dt-bindings/clock/qcom,sm8450-videocc.h> 13 #include <dt-bindings/dma/qcom-gpi.h> 14 #include <dt-bindings/firmware/qcom,scm.h> [all …]
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H A D | x1e80100.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,rpmh.h> 7 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h> 8 #include <dt-bindings/clock/qcom,x1e80100-dispcc.h> 9 #include <dt-bindings/clock/qcom,x1e80100-gcc.h> 10 #include <dt-bindings/clock/qcom,x1e80100-gpucc.h> 11 #include <dt-bindings/clock/qcom,x1e80100-tcsr.h> 12 #include <dt-bindings/dma/qcom-gpi.h> 13 #include <dt-bindings/interconnect/qcom,icc.h> 14 #include <dt-bindings/interconnect/qcom,x1e80100-rpmh.h> [all …]
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H A D | qdu1000.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,qdu1000-gcc.h> 7 #include <dt-bindings/clock/qcom,rpmh.h> 8 #include <dt-bindings/dma/qcom-gpi.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interconnect/qcom,icc.h> 11 #include <dt-bindings/interconnect/qcom,qdu1000-rpmh.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/power/qcom-rpmpd.h> 14 #include <dt-bindings/soc/qcom,rpmh-rsc.h> [all …]
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/linux/Documentation/devicetree/bindings/opp/ |
H A D | opp-v2-kryo-cpu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ilia Lin <ilia.lin@kernel.org> 13 - $ref: opp-v2-base.yaml# 22 The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide 25 operating-points-v2 table when it is parsed by the OPP framework. 30 - operating-points-v2-krait-cpu 31 - operating-points-v2-kryo-cpu [all …]
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H A D | opp-v2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/opp/opp-v2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic OPP (Operating Performance Points) 10 - Viresh Kumar <viresh.kumar@linaro.org> 13 - $ref: opp-v2-base.yaml# 17 const: operating-points-v2 22 - | 24 * Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states [all …]
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H A D | opp-v2-qcom-level.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/opp/opp-v2-qcom-level.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Niklas Cassel <nks@flawful.org> 13 - $ref: opp-v2-base.yaml# 17 const: operating-points-v2-qcom-level 20 '^opp-?[0-9]+$': 25 opp-level: true 27 qcom,opp-fuse-level: [all …]
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/linux/Documentation/devicetree/bindings/power/avs/ |
H A D | qcom,cpr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/power/avs/qcom,cpr.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Niklas Cassel <nks@flawful.org> 23 - enum: 24 - qcom,qcs404-cpr 25 - const: qcom,cpr 36 - description: Reference clock. 38 clock-names: [all …]
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/linux/Documentation/devicetree/bindings/display/msm/ |
H A D | gpu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Rob Clark <robdclark@gmail.com> 14 # as a work-around: 20 - qcom,adreno 21 - amd,imageon 23 - compatible 28 - description: | 30 figure out the chip-id. [all …]
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/linux/arch/arm/boot/dts/qcom/ |
H A D | qcom-ipq4019.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 /dts-v1/; 8 #include <dt-bindings/clock/qcom,gcc-ipq4019.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 compatible = "qcom,ipq4019"; 18 interrupt-parent = <&intc>; 20 reserved-memory { [all …]
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H A D | qcom-sdx55.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 9 #include <dt-bindings/clock/qcom,gcc-sdx55.h> 10 #include <dt-bindings/clock/qcom,rpmh.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interconnect/qcom,sdx55.h> 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 #include <dt-bindings/power/qcom-rpmpd.h> 15 #include <dt-bindings/soc/qcom,rpmh-rsc.h> 18 #address-cells = <1>; 19 #size-cells = <1>; [all …]
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H A D | qcom-sdx65.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 9 #include <dt-bindings/clock/qcom,gcc-sdx65.h> 10 #include <dt-bindings/clock/qcom,rpmh.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/power/qcom-rpmpd.h> 14 #include <dt-bindings/soc/qcom,rpmh-rsc.h> 15 #include <dt-bindings/interconnect/qcom,sdx65.h> 18 #address-cells = <1>; 19 #size-cells = <1>; [all …]
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/linux/Documentation/devicetree/bindings/soc/qcom/ |
H A D | qcom,rpmh-rsc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/soc/qcom/qcom,rpmh-rsc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 27 ACTIVE - Triggered by Linux 28 SLEEP - Triggered by F/W 29 WAKE - Triggered by F/W 30 CONTROL - Triggered by F/W 31 See also:: <dt-bindings/soc/qcom,rpmh-rsc.h> [all …]
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/linux/drivers/of/ |
H A D | platform.c | 1 // SPDX-License-Identifier: GPL-2.0+ 16 #include <linux/dma-mapping.h> 28 { .compatible = "simple-bus", }, 29 { .compatible = "simple-mfd", }, 32 { .compatible = "arm,amba-bus", }, 38 * of_find_device_by_node - Find the platform_device associated with a node 57 BUG_ON(ofdev->dev.of_node == NULL); in of_device_add() 61 ofdev->name = dev_name(&ofdev->dev); in of_device_add() 62 ofdev->id = PLATFORM_DEVID_NONE; in of_device_add() 69 set_dev_node(&ofdev->dev, of_node_to_nid(ofdev->dev.of_node)); in of_device_add() [all …]
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