/linux/Documentation/devicetree/bindings/sound/ |
H A D | ti,omap4-mcpdm.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/sound/ti,omap4-mcpdm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: OMAP McPDM 10 - Misael Lopez Cruz <misael.lopez@ti.com> 13 OMAP ALSA SoC DAI driver using McPDM port used by TWL6040 17 const: ti,omap4-mcpdm 21 - description: MPU access base address 22 - description: L3 interconnect address [all …]
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H A D | omap-abe-twl6040.txt | 1 * Texas Instruments OMAP4+ and twl6040 based audio setups 4 - compatible: "ti,abe-twl6040" 5 - ti,model: Name of the sound card ( for example "SDP4430") 6 - ti,mclk-freq: MCLK frequency for HPPLL operation 7 - ti,mcpdm: phandle for the McPDM node 8 - ti,twl6040: phandle for the twl6040 core node 9 - ti,audio-routing: List of connections between audio components. 14 - ti,dmic: phandle for the OMAP dmic node if the machine have it connected 15 - ti,jack-detection: Need to be present if the board capable to detect jack 18 Available audio endpoints for the audio-routing table: [all …]
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/linux/arch/arm/boot/dts/ti/omap/ |
H A D | omap4-mcpdm.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Common omap4 mcpdm configuration 6 * pmic to ABE as mcpdm uses an external clock for the module. 10 mcpdm_pins: mcpdm-pins { 11 pinctrl-single,pins = < 32 * McPDM pads must be muxed at the interconnect target module 36 pinctrl-names = "default"; 37 pinctrl-0 = <&mcpdm_pins>; 41 &mcpdm { 43 clock-names = "pdmclk";
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H A D | omap4-duovero.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include "omap4-mcpdm.dtsi" 11 compatible = "gumstix,omap4-duovero", "ti,omap4430", "ti,omap4"; 14 stdout-path = &uart3; 23 compatible = "ti,abe-twl6040"; 26 ti,mclk-freq = <38400000>; 28 ti,mcpdm = <&mcpdm>; 33 ti,audio-routing = 42 compatible = "usb-nop-xceiv"; 43 reset-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; /* gpio_62 */ [all …]
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H A D | omap5-l4-abe.dtsi | 2 compatible = "ti,omap5-l4-abe", "simple-pm-bus"; 5 reg-names = "la", "ap"; 6 power-domains = <&prm_abe>; 7 /* OMAP5_L4_ABE_CLKCTRL is read-only */ 8 #address-cells = <1>; 9 #size-cells = <1>; 13 compatible = "simple-pm-bus"; 14 #address-cells = <1>; 15 #size-cells = <1>; 89 target-module@22000 { /* 0x40122000, ap 2 02.0 */ [all …]
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H A D | omap4-l4-abe.dtsi | 2 compatible = "ti,omap4-l4-abe", "simple-pm-bus"; 5 reg-names = "la", "ap"; 6 power-domains = <&prm_abe>; 7 /* OMAP4_L4_ABE_CLKCTRL is read-only */ 8 #address-cells = <1>; 9 #size-cells = <1>; 13 compatible = "simple-pm-bus"; 14 #address-cells = <1>; 15 #size-cells = <1>; 89 target-module@22000 { /* 0x40122000, ap 2 02.0 */ [all …]
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H A D | omap4-sdp.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 9 #include "omap4-mcpdm.dtsi" 12 model = "TI OMAP4 SDP board"; 13 compatible = "ti,omap4-sdp", "ti,omap4430", "ti,omap4"; 26 vdd_eth: fixedregulator-vdd-eth { 27 pinctrl-names = "default"; 28 pinctrl-0 = <&enet_enable_gpio>; 30 compatible = "regulator-fixed"; [all …]
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H A D | omap4-var-som-om44.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * Copyright (C) 2012 Variscite Ltd. - https://www.variscite.com 7 #include "omap4-mcpdm.dtsi" 10 model = "Variscite VAR-SOM-OM44"; 11 compatible = "variscite,var-som-om44", "ti,omap4460", "ti,omap4"; 19 compatible = "ti,abe-twl6040"; 20 ti,model = "VAR-SOM-OM44"; 22 ti,mclk-freq = <38400000>; 23 ti,mcpdm = <&mcpdm>; 27 ti,audio-routing = [all …]
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H A D | omap4-panda-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2011-2013 Texas Instruments Incorporated - https://www.ti.com/ 5 #include <dt-bindings/input/input.h> 7 #include "omap4-mcpdm.dtsi" 15 reserved-memory { 16 #address-cells = <1>; 17 #size-cells = <1>; 20 dsp_memory_region: dsp-memory@98000000 { 21 compatible = "shared-dma-pool"; 27 ipu_memory_region: ipu-memory@98800000 { [all …]
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/linux/sound/soc/ti/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 36 - daVinci devices 37 - Sitara line of SoCs (AM335x, AM438x, etc) 38 - OMAP4 39 - DRA7x devices 40 - Keystone devices 41 - K3 devices (am654, j721e) 49 OMAP4 and OMAP5. 60 tristate "Multichannel PDM Controller (McPDM) support" 64 Say Y or M here if you want to have support for McPDM IP found in [all …]
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H A D | omap-mcpdm.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * omap-mcpdm.c -- OMAP ALSA SoC DAI driver using McPDM port 5 * Copyright (C) 2009 - 2011 Texas Instruments 30 #include "omap-mcpdm.h" 31 #include "sdma-pcm.h" 51 /* McPDM dn offsets for rx1, and 2 channels */ 54 /* McPDM needs to be restarted due to runtime reconfiguration */ 67 static inline void omap_mcpdm_write(struct omap_mcpdm *mcpdm, u16 reg, u32 val) in omap_mcpdm_write() argument 69 writel_relaxed(val, mcpdm->io_base + reg); in omap_mcpdm_write() 72 static inline int omap_mcpdm_read(struct omap_mcpdm *mcpdm, u16 reg) in omap_mcpdm_read() argument [all …]
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/linux/Documentation/devicetree/bindings/mfd/ |
H A D | twl6040.txt | 3 The TWL6040s are 8-channel high quality low-power audio codecs providing audio, 4 vibra and GPO functionality on OMAP4+ platforms. 5 They are connected to the host processor via i2c for commands, McPDM for audio 9 - compatible : "ti,twl6040" for twl6040, "ti,twl6041" for twl6041 10 - reg: must be 0x4b for i2c address 11 - interrupts: twl6040 has one interrupt line connecteded to the main SoC 12 - gpio-controller: 13 - #gpio-cells = <1>: twl6040 provides GPO lines. 14 - #clock-cells = <0>; twl6040 is a provider of pdmclk which is used by McPDM 15 - twl6040,audpwron-gpio: Power on GPIO line for the twl6040 [all …]
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/linux/drivers/clk/ |
H A D | clk-twl6040.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * TWL6040 clock module driver for OMAP4 McPDM functional clock 13 #include <linux/clk-provider.h> 27 return pdmclk->enabled; in twl6040_pdmclk_is_prepared() 36 ret = twl6040_set_bits(pdmclk->twl6040, reg, reset_mask); in twl6040_pdmclk_reset_one_clock() 40 ret = twl6040_clear_bits(pdmclk->twl6040, reg, reset_mask); in twl6040_pdmclk_reset_one_clock() 73 ret = twl6040_power(pdmclk->twl6040, 1); in twl6040_pdmclk_prepare() 81 pdmclk->enabled = 1; in twl6040_pdmclk_prepare() 86 dev_err(pdmclk->dev, "%s: error %i\n", __func__, ret); in twl6040_pdmclk_prepare() 87 twl6040_power(pdmclk->twl6040, 0); in twl6040_pdmclk_prepare() [all …]
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H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs 88 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each. 98 multi-function device has one fixed-rate oscillator, clocked 129 be pre-programmed to support other configurations and features not yet 178 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer. 196 For example, the CDCE925 contains two PLLs with spread-spectrum 206 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier" 237 provides read-only PLLs, derived from the main crystal clock (which 296 clock. These multi-function devices have two (S2MPS14) or three [all …]
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/linux/drivers/bus/ |
H A D | ti-sysc.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * ti-sysc.c - Texas Instruments sysc interconnect target driver 8 * Copyright (C) 2017-2024 Texas Instruments Incorporated - https://www.ti.com/ 13 * Copyright (C) 2009-2011 Nokia Corporation 14 * Copyright (C) 2011-2021 Texas Instruments Incorporated - https://www.ti.com/ 35 #include <linux/platform_data/ti-sysc.h> 37 #include <dt-bindings/bus/ti-sysc.h> 107 * struct sysc - TI sysc interconnect target module registers and capabilities 113 * @mdata: ti-sysc to hwmod translation data for a module 130 * @pre_reset_quirk: module specific pre-reset quirk [all …]
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