Searched +full:octeon +full:- +full:3860 +full:- +full:gpio (Results 1 – 9 of 9) sorted by relevance
/linux/arch/mips/boot/dts/cavium-octeon/ |
H A D | octeon_3xxx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /* OCTEON 3XXX DTS common parts. */ 4 /dts-v1/; 7 compatible = "cavium,octeon-3860"; 8 #address-cells = <2>; 9 #size-cells = <2>; 10 interrupt-parent = <&ciu>; 13 compatible = "simple-bus"; 14 #address-cells = <2>; 15 #size-cells = <2>; [all …]
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H A D | octeon_68xx.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 * OCTEON 68XX device tree skeleton. 7 * use. Because of this, it contains a super-set of the available 11 compatible = "cavium,octeon-6880"; 12 #address-cells = <2>; 13 #size-cells = <2>; 14 interrupt-parent = <&ciu2>; 17 compatible = "simple-bus"; 18 #address-cells = <2>; [all …]
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H A D | octeon_3xxx.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * OCTEON 3XXX, 5XXX, 63XX device tree skeleton. 6 * use. Because of this, it contains a super-set of the available 15 phy0: ethernet-phy@0 { 17 marvell,reg-init = 21 <3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */ 22 /* irq, blink-activity, blink-link */ 23 <3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */ 27 phy1: ethernet-phy@1 { 29 marvell,reg-init = [all …]
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H A D | dlink_dsr-500n.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Device tree source for D-Link DSR-500N. 8 /include/ "dlink_dsr-500n-1000n.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 12 model = "dlink,dsr-500n"; 13 compatible = "dlink,dsr-500n", "cavium,octeon-3860"; 17 clock-frequency = <300000000>; 22 compatible = "gpio-leds"; 24 led-usb { 25 gpios = <&gpio 9 GPIO_ACTIVE_LOW>; [all …]
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/linux/Documentation/devicetree/bindings/gpio/ |
H A D | cavium,octeon-3860-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/cavium,octeon-3860-gpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Cavium Octeon 3860 GPIO controller 10 - Bartosz Golaszewski <brgl@bgdev.pl> 14 const: cavium,octeon-3860-gpio 19 gpio-controller: true 21 '#gpio-cells': 24 interrupt-controller: true [all …]
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/linux/drivers/gpio/ |
H A D | gpio-octeon.c | 12 #include <linux/gpio/driver.h> 15 #include <asm/octeon/octeon.h> 16 #include <asm/octeon/cvmx-gpio-defs.h> 22 * The address offset of the GPIO configuration register for a given 34 return 8 * (offset - 16) + 0x100; in bit_cfg_reg() 44 struct octeon_gpio *gpio = gpiochip_get_data(chip); in octeon_gpio_dir_in() local 46 cvmx_write_csr(gpio->register_base + bit_cfg_reg(offset), 0); in octeon_gpio_dir_in() 53 struct octeon_gpio *gpio = gpiochip_get_data(chip); in octeon_gpio_set() local 55 u64 reg = gpio->register_base + (value ? TX_SET : TX_CLEAR); in octeon_gpio_set() 64 struct octeon_gpio *gpio = gpiochip_get_data(chip); in octeon_gpio_dir_out() local [all …]
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/linux/Documentation/devicetree/bindings/serial/ |
H A D | 8250.yaml | 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - devicetree@vger.kernel.org 13 - $ref: serial.yaml# 14 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml# 15 - if: 17 - required: 18 - aspeed,lpc-io-reg 19 - required: 20 - aspeed,lpc-interrupts [all …]
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/linux/arch/mips/cavium-octeon/ |
H A D | octeon-platform.c | 6 * Copyright (C) 2004-2017 Cavium, Inc. 17 #include <asm/octeon/octeon.h> 18 #include <asm/octeon/cvmx-helper-board.h> 24 #include <asm/octeon/cvmx-uctlx-defs.h> 78 if (dev->of_node) { in octeon2_usb_clocks_start() 82 uctl_node = of_get_parent(dev->of_node); in octeon2_usb_clocks_start() 88 "refclk-frequency", &clock_rate); in octeon2_usb_clocks_start() 90 dev_err(dev, "No UCTL \"refclk-frequency\"\n"); in octeon2_usb_clocks_start() 95 "refclk-type", &clock_type); in octeon2_usb_clocks_start() 203 * Step 4: Program the power-on reset field in the UCTL in octeon2_usb_clocks_start() [all …]
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H A D | octeon-irq.c | 6 * Copyright (C) 2004-2016 Cavium, Inc. 20 #include <asm/octeon/octeon.h> 21 #include <asm/octeon/cvmx-ciu2-defs.h> 22 #include <asm/octeon/cvmx-ciu3-defs.h> 105 return -ENOMEM; in octeon_irq_set_ciu_mapping() 109 cd->line = line; in octeon_irq_set_ciu_mapping() 110 cd->bit = bit; in octeon_irq_set_ciu_mapping() 111 cd->gpio_line = gpio_line; in octeon_irq_set_ciu_mapping() 135 return -EINVAL; in octeon_irq_force_ciu_mapping() 164 unsigned int bit = cd->bit; in octeon_irq_core_ack() [all …]
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