xref: /linux/Documentation/devicetree/bindings/gpio/cavium,octeon-3860-gpio.yaml (revision fcb117e0758d1462128a50c5788555e03b48833b) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/cavium,octeon-3860-gpio.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Cavium Octeon 3860 GPIO controller
8
9maintainers:
10  - Bartosz Golaszewski <brgl@bgdev.pl>
11
12properties:
13  compatible:
14    const: cavium,octeon-3860-gpio
15
16  reg:
17    maxItems: 1
18
19  gpio-controller: true
20
21  '#gpio-cells':
22    const: 2
23
24  interrupt-controller: true
25
26  '#interrupt-cells':
27    const: 2
28
29  interrupts:
30    maxItems: 16
31
32required:
33  - compatible
34  - reg
35  - gpio-controller
36  - '#gpio-cells'
37  - interrupt-controller
38  - '#interrupt-cells'
39  - interrupts
40
41additionalProperties: false
42
43examples:
44  - |
45    bus {
46        #address-cells = <2>;
47        #size-cells = <2>;
48
49        gpio@1070000000800 {
50            compatible = "cavium,octeon-3860-gpio";
51            reg = <0x10700 0x00000800 0x0 0x100>;
52            gpio-controller;
53            #gpio-cells = <2>;
54            interrupt-controller;
55            #interrupt-cells = <2>;
56            /* The GPIO pin connect to 16 consecutive CUI bits */
57            interrupts = <0 16>, <0 17>, <0 18>, <0 19>,
58                        <0 20>, <0 21>, <0 22>, <0 23>,
59                        <0 24>, <0 25>, <0 26>, <0 27>,
60                        <0 28>, <0 29>, <0 30>, <0 31>;
61        };
62    };
63