Home
last modified time | relevance | path

Searched +full:num +full:- +full:irqs (Results 1 – 25 of 43) sorted by relevance

12

/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dfsl,irqsteer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/fsl,irqsteer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lucas Stach <l.stach@pengutronix.de>
15 - const: fsl,imx-irqsteer
16 - items:
17 - enum:
18 - fsl,imx8m-irqsteer
19 - fsl,imx8mp-irqsteer
[all …]
H A Dimg,pdc-intc.txt10 - compatible: Specifies the compatibility list for the interrupt controller.
11 The type shall be <string> and the value shall include "img,pdc-intc".
13 - reg: Specifies the base PDC physical address(s) and size(s) of the
14 addressable register space. The type shall be <prop-encoded-array>.
16 - interrupt-controller: The presence of this property identifies the node
19 - #interrupt-cells: Specifies the number of cells needed to encode an
22 - num-perips: Number of waking peripherals.
24 - num-syswakes: Number of SysWake inputs.
26 - interrupts: List of interrupt specifiers. The first specifier shall be the
34 - <1st-cell>: The interrupt-number that identifies the interrupt source.
[all …]
/freebsd/sys/dev/acpica/
H A Dacpi_hpet.c1 /*-
2 * Copyright (c) 2005 Poul-Henning Kamp
94 int num; member
142 sc = tc->tc_priv; in hpet_get_timecount()
143 return (bus_read_4(sc->mem_res, HPET_MAIN_COUNTER)); in hpet_get_timecount()
151 sc = tc->tc_priv; in hpet_vdso_timehands()
152 vdso_th->th_algo = VDSO_TH_ALGO_X86_HPET; in hpet_vdso_timehands()
153 vdso_th->th_x86_shift = 0; in hpet_vdso_timehands()
154 vdso_th->th_x86_hpet_idx = device_get_unit(sc->dev); in hpet_vdso_timehands()
155 vdso_th->th_x86_pvc_last_systime = 0; in hpet_vdso_timehands()
[all …]
/freebsd/sys/powerpc/powernv/
H A Dopal_dev.c1 /*-
143 pcell_t *irqs; in opaldev_probe() local
146 if (!ofw_bus_is_compatible(dev, "ibm,opal-v3")) in opaldev_probe()
153 /* Manually add IRQs before attaching */ in opaldev_probe()
154 if (OF_hasprop(ofw_bus_get_node(dev), "opal-interrupts")) { in opaldev_probe()
155 iparent = OF_finddevice("/interrupt-controller@0"); in opaldev_probe()
159 "opal-interrupts") / sizeof(*irqs); in opaldev_probe()
160 irqs = malloc(n_irqs * sizeof(*irqs), M_DEVBUF, M_WAITOK); in opaldev_probe()
161 OF_getencprop(ofw_bus_get_node(dev), "opal-interrupts", irqs, in opaldev_probe()
162 n_irqs * sizeof(*irqs)); in opaldev_probe()
[all …]
H A Dopal_pci.c1 /*-
2 * Copyright (c) 2015-2016 Nathan Whitehorn
3 * Copyright (c) 2017-2018 Semihalf
80 int count, int maxcount, int *irqs);
82 int count, int *irqs);
186 if (!OF_hasprop(ofw_bus_get_node(dev), "ibm,opal-phbid")) in opalpci_probe()
189 device_set_desc(dev, "OPAL Host-PCI bridge"); in opalpci_probe()
198 bus_write_8(sc->r_reg, 0x210, PHB3_TCE_KILL_INVAL_ALL); in pci_phb3_tce_invalidate_entire()
207 return (1 << (flsl(val + (val - 1)) - 1)); in round_pow2()
212 * "ibm,supported-tce-sizes", to denote the TCE sizes available. This allows us
[all …]
/freebsd/sys/arm/arm/
H A Dgic.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
104 ((_sc->typer & GICD_TYPER_SECURITYEXT) == GICD_TYPER_SECURITYEXT)
117 /* be used for MSI/MSI-X interrupts */
119 /* for a MSI/MSI-X interrupt */
127 static u_int sgi_to_ipi[GIC_LAST_SGI - GIC_FIRST_SGI + 1];
131 #define GIC_INTR_ISRC(sc, irq) (&sc->gic_irqs[irq].gi_isrc)
137 { -1, 0 }
153 bus_read_4((_sc)->gic_res[GIC_RES_CPU], (_reg))
155 bus_write_4((_sc)->gic_res[GIC_RES_CPU], (_reg), (_val))
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8qm-ss-lvds.dtsi1 // SPDX-License-Identifier: GPL-2.0+
9 clock-indices = <IMX_LPCG_CLK_4>;
15 clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>;
21 clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>;
35 interrupt-parent = <&irqsteer_lvds0>;
37 irqsteer_lvds0: interrupt-controller@56240000 {
38 compatible = "fsl,imx8qm-irqsteer", "fsl,imx-irqsteer";
41 interrupt-controller;
42 interrupt-parent = <&gic>;
43 #interrupt-cells = <1>;
[all …]
H A Dimx8-ss-lvds1.dtsi1 // SPDX-License-Identifier: GPL-2.0-only and MIT
8 compatible = "simple-bus";
9 interrupt-parent = <&irqsteer_lvds1>;
10 #address-cells = <1>;
11 #size-cells = <1>;
14 irqsteer_lvds1: interrupt-controller@57240000 {
15 compatible = "fsl,imx8qm-irqsteer", "fsl,imx-irqsteer";
18 interrupt-controller;
19 interrupt-parent = <&gic>;
20 #interrupt-cells = <1>;
[all …]
H A Dimx8-ss-mipi0.dtsi1 // SPDX-License-Identifier: GPL-2.0-only and MIT
8 compatible = "simple-bus";
9 interrupt-parent = <&irqsteer_mipi0>;
10 #address-cells = <1>;
11 #size-cells = <1>;
14 irqsteer_mipi0: interrupt-controller@56220000 {
15 compatible = "fsl,imx8qxp-irqsteer", "fsl,imx-irqsteer";
18 interrupt-controller;
19 interrupt-parent = <&gic>;
20 #interrupt-cells = <1>;
[all …]
H A Dimx8-ss-mipi1.dtsi1 // SPDX-License-Identifier: GPL-2.0-only and MIT
8 compatible = "simple-bus";
9 interrupt-parent = <&irqsteer_mipi1>;
10 #address-cells = <1>;
11 #size-cells = <1>;
14 irqsteer_mipi1: interrupt-controller@57220000 {
15 compatible = "fsl,imx8qm-irqsteer", "fsl,imx-irqsteer";
18 interrupt-controller;
19 interrupt-parent = <&gic>;
20 #interrupt-cells = <1>;
[all …]
/freebsd/sys/contrib/dev/athk/ath11k/
H A Dcore.h1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
51 /* SMBIOS type structure length (excluding strings-set) */
188 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX]; member
201 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */
505 /* the following are protected by ar->data_lock */
534 /* Protected with ar->data_lock */
561 #define ATH11K_DEFAULT_NOISE_FLOOR -95
563 #define ATH11K_INVALID_RSSI_FULL -1
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx7d.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
7 #include <dt-bindings/reset/imx7-reset.h>
18 clock-frequency = <996000000>;
19 operating-points-v2 = <&cpu0_opp_table>;
20 #cooling-cells = <2>;
21 nvmem-cell
[all...]
/freebsd/sys/kern/
H A Dsubr_intr.c1 /*-
2 * Copyright (c) 2015-2016 Svatopluk Kraus
3 * Copyright (c) 2015-2016 Michal Meloun
5 * Copyright (c) 2015-2016 The FreeBSD Foundation
35 * New-style Interrupt Framework
37 * TODO: - add support for disconnected PICs.
38 * - to support IPI (PPI) enabling on other CPUs if already started.
39 * - to complete things for removable PICs.
172 "Number of IRQs");
201 * - 2 counters for each I/O interrupt. in intr_irq_init()
[all …]
/freebsd/sys/dev/pci/
H A Dpci_dw.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
64 #define DBI_WR1(sc, reg, val) pci_dw_dbi_wr1((sc)->dev, reg, val)
65 #define DBI_WR2(sc, reg, val) pci_dw_dbi_wr2((sc)->dev, reg, val)
66 #define DBI_WR4(sc, reg, val) pci_dw_dbi_wr4((sc)->dev, reg, val)
67 #define DBI_RD1(sc, reg) pci_dw_dbi_rd1((sc)->dev, reg)
68 #define DBI_RD2(sc, reg) pci_dw_dbi_rd2((sc)->dev, reg)
69 #define DBI_RD4(sc, reg) pci_dw_dbi_rd4((sc)->dev, reg)
72 bus_write_4((sc)->iatu_ur_res, (sc)->iatu_ur_offset + (reg), (val))
74 bus_read_4((sc)->iatu_ur_res, (sc)->iatu_ur_offset + (reg))
[all …]
H A Dpci.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
88 (((cfg)->hdrtype == PCIM_HDRTYPE_NORMAL && reg == PCIR_BIOS) || \
89 ((cfg)->hdrtype == PCIM_HDRTYPE_BRIDGE && reg == PCIR_BIOS_1))
237 #define PCI_QUIRK_DISABLE_MSI 2 /* Neither MSI nor MSI-X work */
240 #define PCI_QUIRK_DISABLE_MSIX 5 /* MSI-X doesn't work */
243 #define PCI_QUIRK_DISABLE_FLR 8 /* Function-Level Reset (FLR) not working. */
256 * MSI doesn't work with the ServerWorks CNB20-HE Host Bridge
257 * or the CMIC-SL (AKA ServerWorks GC_LE).
275 * MSI doesn't work with devices behind the AMD 8131 HT-PCIX
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Ddra7.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/clock/dra7.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/dra.h>
12 #include <dt-bindings/clock/dra7.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
21 interrupt-parent = <&crossbar_mpu>;
[all …]
H A Dam4372.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/clock/am4.h>
15 interrupt-parent = <&wakeupgen>;
16 #address-cells = <1>;
17 #size-cells = <1>;
41 #address-cells = <1>;
[all …]
/freebsd/sys/dev/dpaa2/
H A Ddpaa2_rc.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright © 2021-2022 Dmitry Salychev
112 if (dinfo->portal) in dpaa2_rc_detach()
113 dpaa2_mcp_free_portal(dinfo->portal); in dpaa2_rc_detach()
130 sc->dev = dev; in dpaa2_rc_attach()
131 sc->unit = device_get_unit(dev); in dpaa2_rc_attach()
133 if (sc->unit == 0) { in dpaa2_rc_attach()
155 dinfo->pdev = pdev; in dpaa2_rc_attach()
156 dinfo->dev = dev; in dpaa2_rc_attach()
[all …]
/freebsd/sys/contrib/device-tree/src/arm/intel/ixp/
H A Dintel-ixp42x-linksys-wrv54g.dts1 // SPDX-License-Identifier: ISC
9 /dts-v1/;
11 #include "intel-ixp42x.dtsi"
12 #include <dt-bindings/input/input.h>
17 #address-cells = <1>;
18 #size-cells = <1>;
28 stdout-path = "uart1:115200n8";
39 compatible = "gpio-leds";
40 led-powe
[all...]
/freebsd/sys/arm/nvidia/
H A Dtegra_pcie.c1 /*-
29 * Nvidia Integrated PCI/PCI-Express controller driver.
232 #define PADS_WR4(_sc, _r, _v) bus_write_4((_sc)->pads_mem_res, (_r), (_v))
233 #define PADS_RD4(_sc, _r) bus_read_4((_sc)->pads_mem_res, (_r))
234 #define AFI_WR4(_sc, _r, _v) bus_write_4((_sc)->afi_mem_res, (_r), (_v))
235 #define AFI_RD4(_sc, _r) bus_read_4((_sc)->afi_mem_res, (_r))
265 "avddio-pex-supply",
266 "dvddio-pex-supply",
267 "avdd-pex-pll-supply",
268 "hvdd-pex-supply",
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dsocrates.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
34 d-cache-size = <0x8000>; // L1, 32K
35 i-cache-size = <0x8000>; // L1, 32K
[all …]
/freebsd/sys/arm64/vmm/
H A Dvmm_arm64.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
142 * ~SCTLR_EL2_EE: Data accesses are little-endian in arm_setup_vectors()
153 WRITE_SPECIALREG(vtcr_el2, el2_regs->vtcr_el2); in arm_setup_vectors()
168 vmm_call_hyp(vmmpmap_to_ttbr0(), stack_top, el2_regs->tcr_el2, in arm_setup_vectors()
169 sctlr_el2, el2_regs->vtcr_el2); in arm_setup_vectors()
299 * EL2. EL2 code is identity-mapped; the allocator is used to in vmmops_modinit()
306 hyp_code_len = round_page(&vmm_hyp_code_end - &vmm_hyp_code); in vmmops_modinit()
316 /* Create a per-CPU hypervisor stack */ in vmmops_modinit()
333 el2_regs.tcr_el2 |= TCR_EL2_T0SZ(64 - EL2_VIRT_BITS); in vmmops_modinit()
[all …]
/freebsd/sys/arm64/rockchip/
H A Drk_pcie.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
78 #define ATU_OB_REGION_0_SIZE (( ATU_OB_REGIONS - 1) * ATU_OB_REGION_SIZE)
179 #define APB_WR4(_sc, _r, _v) bus_write_4((_sc)->apb_mem_res, (_r), (_v))
180 #define APB_RD4(_sc, _r) bus_read_4((_sc)->apb_mem_res, (_r))
240 {"rockchip,rk3399-pcie", 1},
258 val = bus_read_4(sc->apb_mem_res, base + reg); in rk_pcie_local_cfg_read()
261 val = bus_read_2(sc->apb_mem_res, base + reg); in rk_pcie_local_cfg_read()
264 val = bus_read_1(sc->apb_mem_res, base + reg); in rk_pcie_local_cfg_read()
286 bus_write_4(sc->apb_mem_res, base + reg, val); in rk_pcie_local_cfg_write()
[all …]
/freebsd/sys/riscv/riscv/
H A Daplic.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
76 #define APLIC_DOMAIN_CFG_IE (1UL << 8) /* Enable domain IRQs */
96 #define APLIC_SRC_CFG(_idx) (0x0004 + (((_idx) - 1) * 4))
97 #define APLIC_TARGET(_idx) (0x3004 + (((_idx) - 1) * 4))
139 ((_sc->hart_indices[_cpu]) * APLIC_IDC_SZ))
157 (_sc->hart_indices[_cpu] << 18 | ((_prio) & 0xff))
159 #define aplic_read(sc, reg) bus_read_4(sc->mem_res, (reg))
160 #define aplic_write(sc, reg, val) bus_write_4(sc->mem_res, (reg), (val))
167 return pcpu_find(cpu)->pc_hart; in riscv_cpu_to_hartid()
[all …]
/freebsd/sys/arm/ti/
H A Dti_spi.c1 /*-
93 for (i = 0; i < sc->sc_numcs; i++) { in ti_spi_printr()
103 while (j-- > 0) in ti_spi_printr()
108 device_printf(dev, "wordlen: %-2d clock: %d\n", wl, clk); in ti_spi_printr()
155 if (!ofw_bus_is_compatible(dev, "ti,omap4-mcspi")) in ti_spi_probe()
171 sc->sc_dev = dev; in ti_spi_attach()
181 if ((OF_getencprop(ofw_bus_get_node(dev), "ti,spi-num-cs", in ti_spi_attach()
182 &sc->sc_numcs, sizeof(sc->sc_numcs))) <= 0) { in ti_spi_attach()
183 sc->sc_numcs = 2; in ti_spi_attach()
187 sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, in ti_spi_attach()
[all …]

12