| /freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | arm,nvic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/arm,nvic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
13 The NVIC provides an interrupt controller that is tightly coupled to Cortex-M
15 number of interrupts and priority bits per interrupt.
20 - arm,armv7m-nvic # deprecated
21 - arm,v6m-nvic
22 - arm,v7m-nvic
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| H A D | arm,nvic.txt | 4 Cortex-M based processor cores. The NVIC implemented on different SoCs
5 vary in the number of interrupts and priority bits per interrupt.
9 - compatible : should be one of:
10 "arm,v6m-nvic"
11 "arm,v7m-nvic"
12 "arm,v8m-nvic"
13 - interrupt-controller : Identifies the node as an interrupt controller
14 - #interrupt-cells : Specifies the number of cells needed to encode an
19 The 2nd cell is the priority of the interrupt.
21 - reg : Specifies base physical address(s) and size of the NVIC registers.
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| /freebsd/sys/arm/arm/ |
| H A D | gic.c | 1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
104 ((_sc->typer & GICD_TYPER_SECURITYEXT) == GICD_TYPER_SECURITYEXT)
117 /* be used for MSI/MSI-X interrupts */
118 #define GI_FLAG_MSI_USED (1 << 2) /* This irq is already allocated */
119 /* for a MSI/MSI-X interrupt */
127 static u_int sgi_to_ipi[GIC_LAST_SGI - GIC_FIRST_SGI + 1];
131 #define GIC_INTR_ISRC(sc, irq) (&sc->gic_irqs[irq].gi_isrc) argument
137 { -1, 0 }
153 bus_read_4((_sc)->gic_res[GIC_RES_CPU], (_reg))
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| /freebsd/sys/dev/mlx5/mlx5_en/ |
| H A D | mlx5_en_ethtool.c | 1 /*-
2 * Copyright (c) 2015-2021 Mellanox Technologies. All rights reserved.
35 const char **desc, unsigned num, u64 * arg) in mlx5e_create_stats() argument
46 for (x = 0; x != num; x++) { in mlx5e_create_stats()
55 const char **desc, unsigned num, counter_u64_t *arg) in mlx5e_create_counter_stats() argument
66 for (x = 0; x != num; x++) { in mlx5e_create_counter_stats()
84 uint64_t max = priv->params_ethtool.tx_queue_size / in mlx5e_ethtool_sync_tx_completion_fact()
90 * 16-bits. in mlx5e_ethtool_sync_tx_completion_fact()
96 priv->params_ethtool.tx_completion_fact_max = max; in mlx5e_ethtool_sync_tx_completion_fact()
102 if (priv->params_ethtool.tx_completion_fact < 1) in mlx5e_ethtool_sync_tx_completion_fact()
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| H A D | mlx5_en_main.c | 1 /*-
2 * Copyright (c) 2015-2021 Mellanox Technologies. All rights reserved.
370 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_update_carrier()
385 priv->media_status_last |= IFM_ACTIVE; in mlx5e_update_carrier()
387 priv->media_status_last &= ~IFM_ACTIVE; in mlx5e_update_carrier()
388 priv->media_active_last = IFM_ETHER; in mlx5e_update_carrier()
389 if_link_state_change(priv->ifp, LINK_STATE_DOWN); in mlx5e_update_carrier()
396 priv->media_active_last = IFM_ETHER; in mlx5e_update_carrier()
397 if_setbaudrate(priv->ifp, 1); in mlx5e_update_carrier()
398 mlx5_en_err(priv->ifp, "query port ptys failed: 0x%x\n", in mlx5e_update_carrier()
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| /freebsd/sys/contrib/ncsw/Peripherals/QM/ |
| H A D | fsl_qman.h | 3 � 1995-2003, 2004, 2005-2011 Freescale Semiconductor, Inc.
50 /* QMan s/w corenet portal, low-level i/face */
53 e_QmPortalPCI = 0, /* PI index, cache-inhibited */
54 e_QmPortalPCE, /* PI index, cache-enabled */
55 e_QmPortalPVB /* valid-bit */
59 e_QmPortalEqcrCCI = 0, /* CI index, cache-inhibited */
60 e_QmPortalEqcrCCE /* CI index, cache-enabled */
64 e_QmPortalDqrrCCI = 0, /* CI index, cache-inhibited */
65 e_QmPortalDqrrCCE, /* CI index, cache-enabled */
70 e_QmPortalMrCCI = 0, /* CI index, cache-inhibited */
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| /freebsd/sys/dev/bnxt/bnxt_en/ |
| H A D | bnxt_sysctl.c | 1 /*-
2 * Broadcom NetXtreme-C/E network driver.
60 sysctl_ctx_init(&softc->hw_stats); in bnxt_init_sysctl_ctx()
61 ctx = device_get_sysctl_ctx(softc->dev); in bnxt_init_sysctl_ctx()
62 softc->hw_stats_oid = SYSCTL_ADD_NODE(ctx, in bnxt_init_sysctl_ctx()
63 SYSCTL_CHILDREN(device_get_sysctl_tree(softc->dev)), OID_AUTO, in bnxt_init_sysctl_ctx()
65 if (!softc->hw_stats_oid) { in bnxt_init_sysctl_ctx()
66 sysctl_ctx_free(&softc->hw_stats); in bnxt_init_sysctl_ctx()
70 sysctl_ctx_init(&softc->ver_info->ver_ctx); in bnxt_init_sysctl_ctx()
71 ctx = device_get_sysctl_ctx(softc->dev); in bnxt_init_sysctl_ctx()
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| /freebsd/sys/dev/drm2/ |
| H A D | drm.h | 11 /*-
85 * backwards-compatibility reasons.
116 * The lock structure is a simple cache-line aligned integer. To avoid
137 char __user *date; /**< User-space buffer to hold date */
139 char __user *desc; /**< User-space buffer to hold desc */
153 int count; /**< Length of user-space structures */
173 int irq; member
193 _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */
197 _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */
219 void *handle; /**< User-space: "Handle" to pass to mmap() */
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| /freebsd/sys/contrib/device-tree/src/arm/ti/davinci/ |
| H A D | da850.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
20 #address-cells = <1>;
21 #size-cells = <0>;
24 compatible = "arm,arm926ej-s";
28 operating-points-v2 = <&opp_table>;
32 opp_table: opp-table {
33 compatible = "operating-points-v2";
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| /freebsd/sys/contrib/dev/ath/ath_hal/ar9300/ |
| H A D | ar9300reg.h | 32 /* MAC Control Register - only write values of 1 have effect */
37 #define AR_CR_SWI 0x00000040 // One-shot software interrupt
47 #define AR_CFG_AP_ADHOC_INDICATION 0x00000020 // AP/adhoc indication (0-AP 1-Adhoc)
55 /* Rx DMA Data Buffer Pointer Threshold - High and Low Priority register */
115 #define AR_FTRIG_256B 0x00000040 // 5 bits total
116 #define AR_FTRIG_512B 0x00000080 // 5 bits total
124 #define AR_RXCFG_ZLFDMA 0x00000010 // Enable DMA of zero-length frame
222 /* MAC Indicates the size of High and Low priority rx_dp FIFOs */
229 /* MAC Rx High Priority Queue RXDP Pointer (lower 32 bits) */
232 /* MAC Rx Low Priority Queue RXDP Pointer (lower 32 bits) */
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| H A D | ar9300_misc.c | 59 ahp->ah_hang_wars = *hangs; in ar9300_get_hw_hangs()
64 * HT20, HT40, fast-clock, turbo mode, etc.
70 const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan; in ar9300_mac_to_usec()
85 const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan; in ar9300_mac_to_clks()
101 OS_MEMCPY(mac, ahp->ah_macaddr, IEEE80211_ADDR_LEN); in ar9300_get_mac_address()
109 OS_MEMCPY(ahp->ah_macaddr, mac, IEEE80211_ADDR_LEN); in ar9300_set_mac_address()
118 OS_MEMCPY(mask, ahp->ah_bssid_mask, IEEE80211_ADDR_LEN); in ar9300_get_bss_id_mask()
127 OS_MEMCPY(ahp->ah_bssid_mask, mask, IEEE80211_ADDR_LEN); in ar9300_set_bss_id_mask()
129 OS_REG_WRITE(ah, AR_BSSMSKL, LE_READ_4(ahp->ah_bssid_mask)); in ar9300_set_bss_id_mask()
130 OS_REG_WRITE(ah, AR_BSSMSKU, LE_READ_2(ahp->ah_bssid_mask + 4)); in ar9300_set_bss_id_mask()
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| /freebsd/sys/dev/mlx4/mlx4_core/ |
| H A D | mlx4.h | 18 * - Redistributions of source code must retain the above
22 * - Redistributions in binary form must reproduce the above
41 #include <linux/radix-tree.h>
86 MLX4_MAX_QP_PER_MGM = 4 * ((1 << MLX4_MAX_MGM_LOG_ENTRY_SIZE) / 16 - 2),
222 &(mdev)->persist->pdev->dev, format, \
227 dev_err(&(mdev)->persist->pdev->dev, format, ##__VA_ARGS__)
229 dev_info(&(mdev)->persist->pdev->dev, format, ##__VA_ARGS__)
231 dev_warn(&(mdev)->persist->pdev->dev, format, ##__VA_ARGS__)
254 unsigned long **bits; member
295 #define MLX4_EQ_TO_CQ_VECTOR(vector) ((vector) - \
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| /freebsd/sys/dev/iwx/ |
| H A D | if_iwxreg.h | 1 /*-
2 * SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause
7 /*-
8 * Based on BSD-licensed source modules in the Linux iwlwifi driver,
19 * Copyright(c) 2018 - 2019 Intel Corporation
33 * Copyright(c) 2018 - 2019 Intel Corporation
71 * enum iwx_context_info_flags - Context information control flags
77 * exponent, the actual size is 2**value, valid sizes are 8-2048.
78 * The value is four bits long. Maximum valid exponent is 12
80 * default is short format - not supported by the driver)
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| H A D | if_iwx.c | 1 /*-
2 * SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) AND ISC
28 /*-
64 /*-
65 * Based on BSD-licensed source modules in the Linux iwlwifi driver,
76 * Copyright(c) 2018 - 2019 Intel Corporation
90 * Copyright(c) 2018 - 2019 Intel Corporation
122 /*-
123 * Copyright (c) 2007-2010 Damien Bergamini <damien.bergamini@free.fr>
187 #define DEVNAME(_sc) (device_get_nameunit((_sc)->sc_dev))
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| /freebsd/sys/dev/iwm/ |
| H A D | if_iwmreg.h | 10 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
35 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
73 * BEGIN iwl-csr.h
81 * low power states due to driver-invoked device resets
82 * (e.g. IWM_CSR_RESET_REG_FLAG_SW_RESET) or uCode-driven power-saving modes.
95 #define IWM_CSR_INT_COALESCING (0x004) /* accum ints, 32-usec units */
109 * 31-16: Reserved
110 * 15-
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| /freebsd/sys/dev/dpaa2/ |
| H A D | dpaa2_ni.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright © 2021-2023 Dmitry Salychev
35 * high-functioning network interface. The DPNI supports features that are
104 /* Frame Dequeue Response status bits. */
112 mtx_assert(&(__sc)->lock, MA_NOTOWNED); \
113 mtx_lock(&(__sc)->lock); \
116 mtx_assert(&(__sc)->lock, MA_OWNED); \
117 mtx_unlock(&(__sc)->lock); \
120 mtx_assert(&(__sc)->lock, MA_OWNED); \
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| /freebsd/sys/sys/ |
| H A D | proc.h | 1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
55 #include <sys/priority.h>
72 #include <machine/proc.h> /* Machine-dependent proc substruct. */
86 u_int s_count; /* Ref cnt; pgrps in session - atomic. */
128 /*-
142 * * - not yet protected
143 * a - only touched by curproc or parent during fork/wait
144 * b - created at fork, never changes
147 * c - locked by proc mtx
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| /freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
| H A D | mt8195.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8195-clk.h>
9 #include <dt-bindings/gce/mt8195-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8195-memory-port.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
15 #include <dt-bindings/power/mt8195-power.h>
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| /freebsd/sys/dev/cadence/ |
| H A D | if_cgem.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2012-2014 Thomas Skibo <thomasskibo@yahoo.com>
31 * interface such as the one used in Xilinx Zynq-7000 SoC.
33 * Reference: Zynq-7000 All Programmable SoC Technical Reference Manual.
106 { "cdns,zynq-gem", HWQUIRK_RXHANGWAR }, /* Deprecated */
107 { "cdns,zynqmp-gem", HWQUIRK_NEEDNULLQS }, /* Deprecated */
108 { "xlnx,zynq-gem", HWQUIRK_RXHANGWAR },
109 { "xlnx,zynqmp-gem", HWQUIRK_NEEDNULLQS },
110 { "microchip,mpfs-mss-gem", HWQUIRK_NEEDNULLQS },
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| /freebsd/sys/dev/iwn/ |
| H A D | if_iwnreg.h | 3 /*-
52 /* RX buffers must be large enough to hold a full 4K A-MPDU. */
56 /* HW supports 36-bit DMA addresses. */
108 * Flow-Handler registers.
191 #define IWN_PRPH_DWORD ((sizeof (uint32_t) - 1) << 24)
417 * 29: flag fast IRQ request
418 * 28-14: Reserved
419 * 13-00: RX frame size
444 /* 0:4 TX queue id - 5:6 reserved - 7 unsolicited RX
445 * or uCode-originated notification
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| /freebsd/sys/dev/sym/ |
| H A D | sym_hipd.c | 1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
5 * PCI-SCSI controllers.
7 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
9 * This driver also supports the following Symbios/LSI PCI-SCSI chips:
14 * This driver for FreeBSD-CAM is derived from the Linux sym53c8xx driver.
15 * Copyright (C) 1998-1999 Gerard Roudier
18 * a port of the FreeBSD ncr driver to Linux-1.2.13.
22 * Stefan Esser <se@mi.Uni-Koeln.de>
26 * FreeBSD-CAM services is based on the aic7xxx driver for FreeBSD-CAM
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| /freebsd/sys/dev/bxe/ |
| H A D | bxe.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2007-2014 QLogic Corporation. All rights reserved.
64 * FLR Support - bxe_pf_flr_clnup() is called during nic_load in the per
241 static int load_count[2][3] = { {0} }; /* per-path: 0-common, 1-port0, 2-port1 */
253 /* Interrupt Mode: 0 (IRQ), 1 (MSI/IRQ), and 2 (MSI-X/MSI/IRQ) */
256 &bxe_interrupt_mode, 0, "Interrupt (MSI-X/MSI/INTx) mode");
261 &bxe_queue_count, 0, "Multi-Queue queue count");
288 /* PCI MRRS: -1 (Auto), 0 (128B), 1 (256B), 2 (512B), 3 (1KB) */
289 static int bxe_mrrs = -1;
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| /freebsd/sys/contrib/dev/iwlwifi/pcie/gen1_2/ |
| H A D | tx.c | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2003-2014, 2018-2021, 2023-2025 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
24 #include "iwl-fh.h"
25 #include "iwl-debug.h"
26 #include "iwl-csr.h"
27 #include "iwl-prph.h"
28 #include "iwl-io.h"
29 #include "iwl-scd.h"
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| /freebsd/sys/dev/isp/ |
| H A D | isp.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2009-2020 Alexander Motin <mav@FreeBSD.org>
5 * Copyright (c) 1997-2009 by Matthew Jacob
34 * code for the Qlogic ISP SCSI and FC-SCSI adapters.
151 if (fcp->isp_fwstate == state) in isp_change_fw_state()
154 "Chan %d Firmware state <%s-> in isp_change_fw_state()
1561 isp_gethandles(ispsoftc_t * isp,int chan,uint16_t * handles,int * num,int loop) isp_gethandles() argument
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