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/linux/drivers/infiniband/hw/hfi1/
H A Dmsix.c1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright(c) 2018 - 2020 Intel Corporation.
12 * msix_initialize() - Calculate, request and configure MSIx IRQs
28 * ...any new IRQs should be added here. in msix_initialize()
30 total = 1 + dd->num_sdma + dd->n_krcv_queues + dd->num_netdev_contexts; in msix_initialize()
33 return -EINVAL; in msix_initialize()
35 ret = pci_alloc_irq_vectors(dd->pcidev, total, total, PCI_IRQ_MSIX); in msix_initialize()
41 entries = kcalloc(total, sizeof(*dd->msix_info.msix_entries), in msix_initialize()
44 pci_free_irq_vectors(dd->pcidev); in msix_initialize()
45 return -ENOMEM; in msix_initialize()
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Dmmp3.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/marvell,mmp2.h>
7 #include <dt-bindings/power/marvell,mmp2.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
17 enable-method = "marvell,mmp3-smp";
22 next-level-cache = <&l2>;
[all …]
H A Dmmp2.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/marvell,mmp2.h>
8 #include <dt-bindings/power/marvell,mmp2.h>
9 #include <dt-bindings/clock/marvell,mmp2-audio.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <1>;
27 compatible = "simple-bus";
28 interrupt-parent = <&intc>;
[all …]
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dmrvl,intc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/mrvl,intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Gregory Clement <gregory.clement@bootlin.com>
14 - if:
19 const: marvell,orion-intc
22 - mrvl,intc-nr-irqs
23 - if:
[all …]
/linux/drivers/pcmcia/
H A Dsa1111_generic.c1 // SPDX-License-Identifier: GPL-2.0-only
21 #include <asm/mach-types.h>
71 u32 status = readl_relaxed(s->dev->mapbase + PCSR); in sa1111_pcmcia_socket_state()
73 switch (skt->nr) { in sa1111_pcmcia_socket_state()
75 state->detect = status & PCSR_S0_DETECT ? 0 : 1; in sa1111_pcmcia_socket_state()
76 state->ready = status & PCSR_S0_READY ? 1 : 0; in sa1111_pcmcia_socket_state()
77 state->bvd1 = status & PCSR_S0_BVD1 ? 1 : 0; in sa1111_pcmcia_socket_state()
78 state->bvd2 = status & PCSR_S0_BVD2 ? 1 : 0; in sa1111_pcmcia_socket_state()
79 state->wrprot = status & PCSR_S0_WP ? 1 : 0; in sa1111_pcmcia_socket_state()
80 state->vs_3v = status & PCSR_S0_VS1 ? 0 : 1; in sa1111_pcmcia_socket_state()
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H A Ddb1xxx_ss.c1 // SPDX-License-Identifier: GPL-2.0-only
13 * The Db1000 is used as a reference: Per-socket card-, carddetect- and
14 * statuschange IRQs connected to SoC GPIOs, control and status register
15 * bits arranged in per-socket groups in an external PLD. All boards
19 * - Pb1100/Pb1500: single socket only; voltage key bits VS are
21 * - Au1200-based: additional card-eject irqs, irqs not gpios!
22 * - Db1300: Db1200-like, no pwr ctrl, single socket (#1).
37 #include <asm/mach-au1x00/au1000.h>
38 #include <asm/mach-db1x00/bcsr.h>
45 int nr; /* socket number */ member
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/linux/Documentation/devicetree/bindings/gpio/
H A Dapm,xgene-gpio-sb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/apm,xgene-gpio-sb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: APM X-Gene Standby GPIO controller
10 - Khuong Dinh <khuong@os.amperecomputing.com>
16 +-----------------+
17 | X-Gene standby |
18 | GPIO controller +------ GPIO_0
19 +------------+ | | ...
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/linux/arch/mips/dec/
H A Dint-handler.S1 /* SPDX-License-Identifier: GPL-2.0 */
12 * Rewritten extensively for controller-driven IRQ support
50 * 3) Linux only thinks in terms of all IRQs on or all IRQs
51 * off, nothing in between like BSD spl() brain-damage.
53 * Furthermore, the IRQs on the DECstations look basically (barring
54 * software IRQs which we don't use at all) like...
59 * -------- ------
72 * -------- ------
85 * -------- ------
98 * -------- ------
[all …]
/linux/include/pcmcia/
H A Dsoc_common.h1 /* SPDX-License-Identifier: GPL-2.0 */
23 * This structure encapsulates per-socket state which we might need to
32 unsigned int nr; member
87 /* nr of sockets */
88 int nr; member
97 * Enable card status IRQs on (re-)initialisation. This can
104 * Disable card status IRQs and PCMCIA bus on suspend.
/linux/arch/arm/mach-pxa/
H A Dirq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-pxa/irq.c
24 #include "irqs.h"
27 #include "pxa-regs.h"
37 ((i) < 64) ? (0x0b0 + (((i) - 32) << 2)) : \
38 (0x144 + (((i) - 64) << 2)))
46 * This is for peripheral IRQs internal to the PXA chip.
104 handle_IRQ(PXA_IRQ(fls(mask) - 1), regs); in icip_handle_irq()
159 __raw_writel(0, base + ICMR); /* disable all IRQs */ in pxa_init_irq_common()
160 __raw_writel(0, base + ICLR); /* all IRQs are IRQ, not FIQ */ in pxa_init_irq_common()
[all …]
H A Dgeneric.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-pxa/generic.c
25 #include <asm/mach-types.h>
27 #include "addr-map.h"
28 #include "irqs.h"
31 #include "pxa3xx-regs.h"
47 * For non device-tree builds, keep legacy timer init
68 void pxa_smemc_set_pcmcia_socket(int nr) in pxa_smemc_set_pcmcia_socket() argument
70 switch (nr) { in pxa_smemc_set_pcmcia_socket()
97 * Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table
/linux/Documentation/trace/
H A Deprobetrace.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Eprobe - Event-based Probe Tracing
9 - Written for v6.17
24 -------------------------
28 -:[EGRP/][EEVENT] : Clear a probe
39 @SYM[+|-offs] : Fetch memory at SYM +|- offs (SYM should be a data symbol)
41 +|-[u]OFFS(FETCHARG) : Fetch memory at FETCHARG +|- OFFS address.(\*3)(\*4)
51 -----
65 ---------------------------
75 ---------
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/linux/drivers/irqchip/
H A Dirq-mmp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-mmp/irq.c
6 * Copyright (C) 2008 - 2012 Marvell Technology Group Ltd.
69 struct irq_domain *domain = d->domain; in icu_mask_ack_irq()
70 struct icu_chip_data *data = (struct icu_chip_data *)domain->host_data; in icu_mask_ack_irq()
74 hwirq = d->irq - data->virq_base; in icu_mask_ack_irq()
77 r &= ~data->conf_mask; in icu_mask_ack_irq()
78 r |= data->conf_disable; in icu_mask_ack_irq()
82 if ((data->virq_base == data->clr_mfp_irq_base) in icu_mask_ack_irq()
83 && (hwirq == data->clr_mfp_hwirq)) in icu_mask_ack_irq()
[all …]
H A Dirq-apple-aic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Based on irq-lpc32xx:
6 * Copyright 2015-2016 Vladimir Zapolskiy <vz@mleia.com>
7 * Based on irq-bcm2836:
14 * - 896 level-triggered hardware IRQs
15 * - Single mask bit per IRQ
16 * - Per-IRQ affinity setting
17 * - Automatic masking on event delivery (auto-ack)
18 * - Software triggering (ORed with hw line)
19 * - 2 per-CPU IPIs (meant as "self" and "other", but they are
[all …]
/linux/drivers/dma/dw-edma/
H A Ddw-edma-pcie.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018-2019 Synopsys, Inc. and/or its affiliates.
14 #include <linux/pci-epf.h>
18 #include "dw-edma-core.h"
50 u8 irqs; member
62 /* Channel 0 - BAR 2, offset 0 Mbytes, size 2 Kbytes */
64 /* Channel 1 - BAR 2, offset 2 Mbytes, size 2 Kbytes */
68 /* Channel 0 - BAR 2, offset 4 Mbytes, size 2 Kbytes */
70 /* Channel 1 - BAR 2, offset 6 Mbytes, size 2 Kbytes */
75 /* Channel 0 - BAR 2, offset 8 Mbytes, size 2 Kbytes */
[all …]
/linux/arch/loongarch/kvm/intc/
H A Dpch_pic.c1 // SPDX-License-Identifier: GPL-2.0
21 if (mask & s->irr & ~s->mask) { in pch_pic_update_irq()
22 s->isr |= mask; in pch_pic_update_irq()
23 irq = s->htmsi_vector[irq]; in pch_pic_update_irq()
24 eiointc_set_irq(s->kvm->arch.eiointc, irq, level); in pch_pic_update_irq()
27 if (mask & s->isr & ~s->irr) { in pch_pic_update_irq()
28 s->isr &= ~mask; in pch_pic_update_irq()
29 irq = s->htmsi_vector[irq]; in pch_pic_update_irq()
30 eiointc_set_irq(s->kvm->arch.eiointc, irq, level); in pch_pic_update_irq()
35 /* update batch irqs, the irq_mask is a bitmap of irqs */
[all …]
/linux/drivers/pci/msi/
H A Dapi.c1 // SPDX-License-Identifier: GPL-2.0
3 * PCI MSI/MSI-X — Exported APIs for device drivers
5 * Copyright (C) 2003-2004 Intel
17 * pci_enable_msi() - Enable MSI interrupt mode on device
22 * Linux IRQ will be saved at @dev->irq. The driver must invoke
40 * pci_disable_msi() - Disable MSI interrupt mode on device
45 * The PCI device Linux IRQ (@dev->irq) is restored to its default
46 * pin-assertion IRQ. This is the cleanup pair of pci_enable_msi().
53 if (!pci_msi_enabled() || !dev || !dev->msi_enabled) in pci_disable_msi()
56 guard(msi_descs_lock)(&dev->dev); in pci_disable_msi()
[all …]
/linux/include/linux/
H A Dinterrupt.h1 /* SPDX-License-Identifier: GPL-2.0 */
44 * IRQF_SHARED - allow sharing the irq among several devices
45 * IRQF_PROBE_SHARED - set by callers when they expect sharing mismatches to occur
46 * IRQF_TIMER - Flag to mark this interrupt as timer interrupt
47 * IRQF_PERCPU - Interrupt is per cpu
48 * IRQF_NOBALANCING - Flag to exclude this interrupt from irq balancing
49 * IRQF_IRQPOLL - Interrupt is used for polling (only the interrupt that is
52 * IRQF_ONESHOT - Interrupt is not reenabled after the hardirq handler finished.
55 * IRQF_NO_SUSPEND - Do not disable this IRQ during suspend. Does not guarantee
57 * state. See Documentation/power/suspend-and-interrupts.rst
[all …]
/linux/arch/arm/kernel/
H A Dentry-header.S1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <asm/asm-offsets.h>
9 #include <asm/uaccess-asm.h>
13 @ -----------------
59 * ARMv7-M exception entry/exit macros.
86 @ we cannot rely on r0-r3 and r12 matching the value saved in the
87 @ exception frame because of tail-chaining. So these have to be
89 ldmia r12!, {r0-r3}
91 @ Linux expects to have irqs off. Do it here before taking stack space
94 sub sp, #PT_REGS_SIZE-S_IP
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/linux/arch/arm/include/asm/mach/
H A Darch.h1 /* SPDX-License-Identifier: GPL-2.0-only */
25 unsigned int nr; /* architecture number */ member
31 unsigned int nr_irqs; /* number of IRQs */
34 phys_addr_t dma_zone_size; /* size of DMA-able area */
63 * Current machine - only accessible during boot.
68 * Machine type table - also only accessible during boot
82 .nr = MACH_TYPE_##_type, \
92 .nr = ~0, \
/linux/kernel/irq/
H A Dirqdesc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
4 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
7 * information is available in Documentation/core-api/genericirq.rst
23 * lockdep: we want to handle all irq_desc locks as a single lock-class:
57 if (!zalloc_cpumask_var_node(&desc->irq_common_data.affinity, in alloc_masks()
59 return -ENOMEM; in alloc_masks()
62 if (!zalloc_cpumask_var_node(&desc->irq_common_data.effective_affinity, in alloc_masks()
64 free_cpumask_var(desc->irq_common_data.affinity); in alloc_masks()
65 return -ENOMEM; in alloc_masks()
[all …]
/linux/arch/arm/include/asm/
H A Dhighmem.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 #define PKMAP_BASE (PAGE_OFFSET - PMD_SIZE)
10 #define LAST_PKMAP_MASK (LAST_PKMAP - 1)
11 #define PKMAP_NR(virt) (((virt) - PKMAP_BASE) >> PAGE_SHIFT)
12 #define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT)) argument
30 * the locking involved must also disable IRQs which is incompatible with
/linux/arch/arm/mach-dove/
H A Dpcie.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/mach-dove/pcie.c
17 #include <plat/addr-map.h>
18 #include "irqs.h"
19 #include "bridge-regs.h"
35 static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys) in dove_pcie_setup() argument
40 if (nr >= num_pcie_ports) in dove_pcie_setup()
43 pp = &pcie_port[nr]; in dove_pcie_setup()
44 sys->private_data = pp; in dove_pcie_setup()
45 pp->root_bus_nr = sys->busnr; in dove_pcie_setup()
[all …]
/linux/drivers/gpio/
H A Dgpio-xgene-sb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * AppliedMicro X-Gene SoC GPIO-Standby Driver
25 #include "gpiolib-acpi.h"
42 * struct xgene_gpio_sb - GPIO-Standby private data structure.
43 * @gc: memory-mapped GPIO controllers.
59 #define HWIRQ_TO_GPIO(priv, hwirq) ((hwirq) + (priv)->irq_start)
60 #define GPIO_TO_HWIRQ(priv, gpio) ((gpio) - (priv)->irq_start)
67 data = gc->read_reg(reg); in xgene_gpio_set_bit()
72 gc->write_reg(reg, data); in xgene_gpio_set_bit()
78 int gpio = HWIRQ_TO_GPIO(priv, d->hwirq); in xgene_gpio_sb_irq_set_type()
[all …]
/linux/drivers/net/ethernet/meta/fbnic/
H A Dfbnic_irq.c1 // SPDX-License-Identifier: GPL-2.0
30 dev_warn(fbd->dev, "FW mailbox did not enter ready state\n"); in __fbnic_fw_enable_mbx()
42 * fbnic_fw_request_mbx - Configure and initialize Firmware Mailbox
48 * Return: non-zero on failure.
52 struct pci_dev *pdev = to_pci_dev(fbd->dev); in fbnic_fw_request_mbx()
55 WARN_ON(fbd->fw_msix_vector); in fbnic_fw_request_mbx()
64 dev_name(fbd->dev), fbd); in fbnic_fw_request_mbx()
73 fbd->fw_msix_vector = vector; in fbnic_fw_request_mbx()
79 * fbnic_fw_disable_mbx - Temporarily place mailbox in standby state
88 disable_irq(fbd->fw_msix_vector); in fbnic_fw_disable_mbx()
[all …]

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