Lines Matching +full:nr +full:- +full:irqs
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018-2019 Synopsys, Inc. and/or its affiliates.
14 #include <linux/pci-epf.h>
18 #include "dw-edma-core.h"
50 u8 irqs; member
62 /* Channel 0 - BAR 2, offset 0 Mbytes, size 2 Kbytes */
64 /* Channel 1 - BAR 2, offset 2 Mbytes, size 2 Kbytes */
68 /* Channel 0 - BAR 2, offset 4 Mbytes, size 2 Kbytes */
70 /* Channel 1 - BAR 2, offset 6 Mbytes, size 2 Kbytes */
75 /* Channel 0 - BAR 2, offset 8 Mbytes, size 2 Kbytes */
77 /* Channel 1 - BAR 2, offset 9 Mbytes, size 2 Kbytes */
81 /* Channel 0 - BAR 2, offset 10 Mbytes, size 2 Kbytes */
83 /* Channel 1 - BAR 2, offset 11 Mbytes, size 2 Kbytes */
88 .irqs = 1,
93 static int dw_edma_pcie_irq_vector(struct device *dev, unsigned int nr) in dw_edma_pcie_irq_vector() argument
95 return pci_irq_vector(to_pci_dev(dev), nr); in dw_edma_pcie_irq_vector()
108 pcibios_resource_to_bus(pdev->bus, ®ion, &res); in dw_edma_pcie_address()
134 pci_dbg(pdev, "Detected PCIe Vendor-Specific Extended Capability DMA\n"); in dw_edma_pcie_get_vsec_dma_data()
143 pdata->mf = map; in dw_edma_pcie_get_vsec_dma_data()
144 pdata->rg.bar = FIELD_GET(DW_PCIE_VSEC_DMA_BAR, val); in dw_edma_pcie_get_vsec_dma_data()
147 pdata->wr_ch_cnt = min_t(u16, pdata->wr_ch_cnt, in dw_edma_pcie_get_vsec_dma_data()
149 pdata->rd_ch_cnt = min_t(u16, pdata->rd_ch_cnt, in dw_edma_pcie_get_vsec_dma_data()
157 pdata->rg.off = off; in dw_edma_pcie_get_vsec_dma_data()
163 struct dw_edma_pcie_data *pdata = (void *)pid->driver_data; in dw_edma_pcie_probe()
165 struct device *dev = &pdev->dev; in dw_edma_pcie_probe()
172 return -ENOMEM; in dw_edma_pcie_probe()
184 * Tries to find if exists a PCIe Vendor-Specific Extended Capability in dw_edma_pcie_probe()
190 mask = BIT(vsec_data->rg.bar); in dw_edma_pcie_probe()
191 for (i = 0; i < vsec_data->wr_ch_cnt; i++) { in dw_edma_pcie_probe()
192 mask |= BIT(vsec_data->ll_wr[i].bar); in dw_edma_pcie_probe()
193 mask |= BIT(vsec_data->dt_wr[i].bar); in dw_edma_pcie_probe()
195 for (i = 0; i < vsec_data->rd_ch_cnt; i++) { in dw_edma_pcie_probe()
196 mask |= BIT(vsec_data->ll_rd[i].bar); in dw_edma_pcie_probe()
197 mask |= BIT(vsec_data->dt_rd[i].bar); in dw_edma_pcie_probe()
208 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); in dw_edma_pcie_probe()
217 return -ENOMEM; in dw_edma_pcie_probe()
219 /* IRQs allocation */ in dw_edma_pcie_probe()
220 nr_irqs = pci_alloc_irq_vectors(pdev, 1, vsec_data->irqs, in dw_edma_pcie_probe()
223 pci_err(pdev, "fail to alloc IRQ vector (number of IRQs=%u)\n", in dw_edma_pcie_probe()
225 return -EPERM; in dw_edma_pcie_probe()
229 chip->dev = dev; in dw_edma_pcie_probe()
231 chip->mf = vsec_data->mf; in dw_edma_pcie_probe()
232 chip->nr_irqs = nr_irqs; in dw_edma_pcie_probe()
233 chip->ops = &dw_edma_pcie_plat_ops; in dw_edma_pcie_probe()
235 chip->ll_wr_cnt = vsec_data->wr_ch_cnt; in dw_edma_pcie_probe()
236 chip->ll_rd_cnt = vsec_data->rd_ch_cnt; in dw_edma_pcie_probe()
238 chip->reg_base = pcim_iomap_table(pdev)[vsec_data->rg.bar]; in dw_edma_pcie_probe()
239 if (!chip->reg_base) in dw_edma_pcie_probe()
240 return -ENOMEM; in dw_edma_pcie_probe()
242 for (i = 0; i < chip->ll_wr_cnt; i++) { in dw_edma_pcie_probe()
243 struct dw_edma_region *ll_region = &chip->ll_region_wr[i]; in dw_edma_pcie_probe()
244 struct dw_edma_region *dt_region = &chip->dt_region_wr[i]; in dw_edma_pcie_probe()
245 struct dw_edma_block *ll_block = &vsec_data->ll_wr[i]; in dw_edma_pcie_probe()
246 struct dw_edma_block *dt_block = &vsec_data->dt_wr[i]; in dw_edma_pcie_probe()
248 ll_region->vaddr.io = pcim_iomap_table(pdev)[ll_block->bar]; in dw_edma_pcie_probe()
249 if (!ll_region->vaddr.io) in dw_edma_pcie_probe()
250 return -ENOMEM; in dw_edma_pcie_probe()
252 ll_region->vaddr.io += ll_block->off; in dw_edma_pcie_probe()
253 ll_region->paddr = pci_bus_address(pdev, ll_block->bar); in dw_edma_pcie_probe()
254 ll_region->paddr += ll_block->off; in dw_edma_pcie_probe()
255 ll_region->sz = ll_block->sz; in dw_edma_pcie_probe()
257 dt_region->vaddr.io = pcim_iomap_table(pdev)[dt_block->bar]; in dw_edma_pcie_probe()
258 if (!dt_region->vaddr.io) in dw_edma_pcie_probe()
259 return -ENOMEM; in dw_edma_pcie_probe()
261 dt_region->vaddr.io += dt_block->off; in dw_edma_pcie_probe()
262 dt_region->paddr = pci_bus_address(pdev, dt_block->bar); in dw_edma_pcie_probe()
263 dt_region->paddr += dt_block->off; in dw_edma_pcie_probe()
264 dt_region->sz = dt_block->sz; in dw_edma_pcie_probe()
267 for (i = 0; i < chip->ll_rd_cnt; i++) { in dw_edma_pcie_probe()
268 struct dw_edma_region *ll_region = &chip->ll_region_rd[i]; in dw_edma_pcie_probe()
269 struct dw_edma_region *dt_region = &chip->dt_region_rd[i]; in dw_edma_pcie_probe()
270 struct dw_edma_block *ll_block = &vsec_data->ll_rd[i]; in dw_edma_pcie_probe()
271 struct dw_edma_block *dt_block = &vsec_data->dt_rd[i]; in dw_edma_pcie_probe()
273 ll_region->vaddr.io = pcim_iomap_table(pdev)[ll_block->bar]; in dw_edma_pcie_probe()
274 if (!ll_region->vaddr.io) in dw_edma_pcie_probe()
275 return -ENOMEM; in dw_edma_pcie_probe()
277 ll_region->vaddr.io += ll_block->off; in dw_edma_pcie_probe()
278 ll_region->paddr = pci_bus_address(pdev, ll_block->bar); in dw_edma_pcie_probe()
279 ll_region->paddr += ll_block->off; in dw_edma_pcie_probe()
280 ll_region->sz = ll_block->sz; in dw_edma_pcie_probe()
282 dt_region->vaddr.io = pcim_iomap_table(pdev)[dt_block->bar]; in dw_edma_pcie_probe()
283 if (!dt_region->vaddr.io) in dw_edma_pcie_probe()
284 return -ENOMEM; in dw_edma_pcie_probe()
286 dt_region->vaddr.io += dt_block->off; in dw_edma_pcie_probe()
287 dt_region->paddr = pci_bus_address(pdev, dt_block->bar); in dw_edma_pcie_probe()
288 dt_region->paddr += dt_block->off; in dw_edma_pcie_probe()
289 dt_region->sz = dt_block->sz; in dw_edma_pcie_probe()
293 if (chip->mf == EDMA_MF_EDMA_LEGACY) in dw_edma_pcie_probe()
294 pci_dbg(pdev, "Version:\teDMA Port Logic (0x%x)\n", chip->mf); in dw_edma_pcie_probe()
295 else if (chip->mf == EDMA_MF_EDMA_UNROLL) in dw_edma_pcie_probe()
296 pci_dbg(pdev, "Version:\teDMA Unroll (0x%x)\n", chip->mf); in dw_edma_pcie_probe()
297 else if (chip->mf == EDMA_MF_HDMA_COMPAT) in dw_edma_pcie_probe()
298 pci_dbg(pdev, "Version:\tHDMA Compatible (0x%x)\n", chip->mf); in dw_edma_pcie_probe()
299 else if (chip->mf == EDMA_MF_HDMA_NATIVE) in dw_edma_pcie_probe()
300 pci_dbg(pdev, "Version:\tHDMA Native (0x%x)\n", chip->mf); in dw_edma_pcie_probe()
302 pci_dbg(pdev, "Version:\tUnknown (0x%x)\n", chip->mf); in dw_edma_pcie_probe()
305 vsec_data->rg.bar, vsec_data->rg.off, vsec_data->rg.sz, in dw_edma_pcie_probe()
306 chip->reg_base); in dw_edma_pcie_probe()
309 for (i = 0; i < chip->ll_wr_cnt; i++) { in dw_edma_pcie_probe()
311 i, vsec_data->ll_wr[i].bar, in dw_edma_pcie_probe()
312 vsec_data->ll_wr[i].off, chip->ll_region_wr[i].sz, in dw_edma_pcie_probe()
313 chip->ll_region_wr[i].vaddr.io, &chip->ll_region_wr[i].paddr); in dw_edma_pcie_probe()
316 i, vsec_data->dt_wr[i].bar, in dw_edma_pcie_probe()
317 vsec_data->dt_wr[i].off, chip->dt_region_wr[i].sz, in dw_edma_pcie_probe()
318 chip->dt_region_wr[i].vaddr.io, &chip->dt_region_wr[i].paddr); in dw_edma_pcie_probe()
321 for (i = 0; i < chip->ll_rd_cnt; i++) { in dw_edma_pcie_probe()
323 i, vsec_data->ll_rd[i].bar, in dw_edma_pcie_probe()
324 vsec_data->ll_rd[i].off, chip->ll_region_rd[i].sz, in dw_edma_pcie_probe()
325 chip->ll_region_rd[i].vaddr.io, &chip->ll_region_rd[i].paddr); in dw_edma_pcie_probe()
328 i, vsec_data->dt_rd[i].bar, in dw_edma_pcie_probe()
329 vsec_data->dt_rd[i].off, chip->dt_region_rd[i].sz, in dw_edma_pcie_probe()
330 chip->dt_region_rd[i].vaddr.io, &chip->dt_region_rd[i].paddr); in dw_edma_pcie_probe()
333 pci_dbg(pdev, "Nr. IRQs:\t%u\n", chip->nr_irqs); in dw_edma_pcie_probe()
338 return -EPERM; in dw_edma_pcie_probe()
364 /* Freeing IRQs */ in dw_edma_pcie_remove()
375 .name = "dw-edma-pcie",