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/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_l2_api.h2 * Copyright (c) 2017-2018 Cavium, Inc.
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
41 ECORE_RSS_IPV6_TCP = 0x8,
204 /* Add / remove / move / remove-all unicast MAC-VLAN filters.
236 * @brief ecore_eth_rx_queue_start - RX Queue Start Ramrod
246 * @param cqe_pbl_addr Physical address of the CQE PBL Table.
247 * @param cqe_pbl_size Size of the CQE PBL Table
263 * @brief ecore_eth_rx_queue_stop - This ramrod closes an Rx queue
283 * @brief - TX Queue Start Ramrod
292 * @param pbl_addr address of the pbl array
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H A Dreg_addr.h2 * Copyright (c) 2017-2018 Cavium, Inc.
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
53 … 0x001d14UL //Access:RW DataWidth:0x8 // DBMUX register…
67 … 0x003800UL //Access:RW DataWidth:0x8 // First VF
69 … 0x003808UL //Access:RW DataWidth:0x8 // rx_hdr_almost_…
70 … 0x00380cUL //Access:RW DataWidth:0x8 // rx_hdr_almost_…
71 … 0x003810UL //Access:RW DataWidth:0x8 // rx_data_almost…
72 … 0x003814UL //Access:RW DataWidth:0x8 // rx_data_almost…
78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
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/freebsd/sys/dev/dwc/
H A Dif_dwc.c1 /*-
5 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
32 * Chapter 17, Altera Cyclone V Device Handbook (CV-5V2 2014.07.22)
34 * EMAC is an instance of the Synopsys DesignWare 3504-0
82 { -1, 0 }
100 mii = sc->mii_softc; in dwc_media_status()
103 ifmr->ifm_active = mii->mii_media_active; in dwc_media_status()
104 ifmr->ifm_status = mii->mii_media_status; in dwc_media_status()
112 return (mii_mediachg(sc->mii_softc)); in dwc_media_change_locked()
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H A Ddwc1000_reg.h1 /*-
5 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
78 #define MAC_ADDRESS_HIGH(n) ((n > 15 ? 0x800 : 0x40) + 0x8 * n)
79 #define MAC_ADDRESS_LOW(n) ((n > 15 ? 0x804 : 0x44) + 0x8 * n)
218 #define BUS_MODE_EIGHTXPBL (1 << 24) /* Multiplies PBL by 8 */
291 #define GMAC_MII_CLK_DIV4 0x8
/freebsd/sys/dev/bnxt/bnxt_en/
H A Dhsi_struct_def.h1 /*-
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
34 * Copyright(c) 2001-2025, Broadcom. All rights reserved. The
71 * * 0x0-0xFFF8 - The function ID
72 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
73 * * 0xFFFD - Reserved for user-space HWRM interface
74 * * 0xFFFF - HWRM
122 /* Engine CKV - The Alias key EC curve and ECC public key information. */
124 /* Engine CKV - Initialization vector. */
126 /* Engine CKV - Authentication tag. */
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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
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H A Dstarfive,jh7110-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Emil Renner Berthing <kernel@esmil.dk>
12 - Samin Guo <samin.guo@starfivetech.com>
19 - starfive,jh7100-dwmac
20 - starfive,jh7110-dwmac
22 - compatible
27 - items:
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/freebsd/sys/dev/eqos/
H A Dif_eqos_starfive.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
42 #define WR4(sc, o, v) bus_write_4(sc->base.res[EQOS_RES_MEM], (o), (v))
45 {"starfive,jh7110-dwmac", 1},
77 return (-EINVAL); in if_eqos_starfive_set_speed()
80 clk_set_freq(sc->gtx, freq, 0); in if_eqos_starfive_set_speed()
81 err = clk_enable(sc->gtx); in if_eqos_starfive_set_speed()
84 clk_get_name(sc->gtx)); in if_eqos_starfive_set_speed()
98 if (clk_get_by_ofw_name(dev, 0, "gtx", &sc->gtx) != 0) { in if_eqos_starfive_clk_init()
99 device_printf(sc->base.dev, "could not get gtx clock\n"); in if_eqos_starfive_clk_init()
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/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-ipq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mfd/qcom-rpm.h>
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
8 #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
11 #include <dt-bindings/soc/qcom,gsbi.h>
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/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dstm32h743.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
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H A Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
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/freebsd/sys/contrib/device-tree/src/riscv/starfive/
H A Djh7110.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include <dt-bindings/clock/starfive,jh7110-crg.h>
9 #include <dt-bindings/power/starfive,jh7110-pmu.h>
10 #include <dt-bindings/reset/starfive,jh7110-crg.h>
11 #include <dt-bindings/thermal/thermal.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
19 #address-cells = <1>;
20 #size-cells = <0>;
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/freebsd/sys/dev/cxgbe/iw_cxgbe/
H A Dt4.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2009-2013 Chelsio, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
19 * - Redistributions in binary form must reproduce the above
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
66 #define T4_PAGESIZE_MASK 0xffffffff000 /* 4KB-
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/freebsd/sys/dev/cxgbe/firmware/
H A Dt6fw_cfg_uwire.txt3 # Copyright (C) 2014-2015 Chelsio Communications. All rights reserved.
6 # WILL RESULT IN A NON-FUNCTIONAL ADAPTER AND MAY RESULT IN PHYSICAL DAMAGE
10 # This file provides the default, power-on configuration for 2-port T6-based
25 # 4. MSI-X Vectors: 1088.
26 # 5. Multi-Port Support (MPS) TCAM: 336 entries to support MAC destination
34 # functions for ports 0-1 on PF0-1, FCoE on PF4, iSCSI on PF5, etc.
39 # Ingress Queues and MSI-X Vectors to allow up to some number of CPUs
47 # 16 Ingress Queue/MSI-X Vectors per application function
49 # for a total of 96 Ingress Queues and MSI-X Vectors on the Unified PF.
52 # 9. Some customers will want to use PCI-E SR-IOV Capability to allow Virtual
[all …]
H A Dt4fw_interface.h1 /*-
2 * Copyright (c) 2012-2017, 2025 Chelsio Communications.
16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
37 FW_ENOENT = 2, /* no such file or directory */
45 FW_ENODEV = 19, /* no such device */
47 FW_ENOSPC = 28, /* no space left on device */
49 FW_ENODATA = 61, /* no data available */
55 FW_ENOBUFS = 105, /* no buffer space available */
72 FW_SCSI_TASK_ERR = 142, /* No SCSI tasks available */
184 /* atomic flag (hi) - firmware encapsulates CPLs in CPL_BARRIER
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/freebsd/contrib/ofed/libcxgb4/
H A Dt4.h2 * Copyright (c) 2006-2016 Chelsio, Inc. All rights reserved.
14 * - Redistributions of source code must retain the above
17 * - Redistributions in binary form must reproduce the above
25 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
54 #define ROUND_UP(x, n) (((x) + (n) - 1u) & ~((n) - 1u))
55 #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
82 #define T4_MAX_EQ_SIZE (65520 - T4_EQ_STATUS_ENTRIES)
83 #define T4_MAX_IQ_SIZE (65520 - 1)
84 #define T4_MAX_RQ_SIZE (8192 - T4_EQ_STATUS_ENTRIES)
85 #define T4_MAX_SQ_SIZE (T4_MAX_EQ_SIZE - 1)
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/freebsd/sys/contrib/device-tree/src/arm/allwinner/
H A Dsun9i-a80.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun9i-a80-ccu.h>
48 #include <dt-bindings/clock/sun9i-a80-de.h>
49 #include <dt-bindings/clock/sun9i-a80-usb.h>
50 #include <dt-bindings/reset/sun9i-a80-ccu.h>
51 #include <dt-bindings/reset/sun9i-a80-de.h>
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/freebsd/sys/dev/bxe/
H A Decore_hsi.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2007-2017 QLogic Corporation. All rights reserved.
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
145 /* Up to 16 bytes of NULL-terminated string */
164 (if multiple found, priority order is: NC-SI, UMP, IPMI) */
169 /* Use SPIO4 as an arbiter between: 0-NC_SI, 1-IPMI
170 (can only be used when an add-in board, not BMC, pulls-down SPIO4) */
172 /* Use SPIO4 as an arbiter between: 0-UMP, 1-IPMI
173 (can only be used when an add-in board, not BMC, pulls-down SPIO4) */
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsa8775p.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interconnect/qcom,icc.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
10 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
11 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
12 #include <dt-bindings/mailbox/qcom-ipcc.h>
13 #include <dt-bindings/firmware/qcom,scm.h>
14 #include <dt-bindings/power/qcom,rpmhpd.h>
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H A Dsc8280xp.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,dispcc-sc8280xp.h>
8 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
9 #include <dt-bindings/clock/qcom,gpucc-sc8280xp.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/clock/qcom,sc8280xp-camcc.h>
12 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
13 #include <dt-bindings/interconnect/qcom,osm-l3.h>
14 #include <dt-bindings/interconnect/qcom,sc8280xp.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
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/freebsd/sys/dev/mthca/
H A Dmthca_cmd.c16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
81 CMD_CLOSE_HCA = 0x8,
154 * commands. So we can't use strict timeouts described in PRM -- we
193 return readl(dev->hcr + HCR_STATUS_OFFSET) & in go_bit()
205 void __iomem *ptr = dev->cmd.dbell_map; in mthca_cmd_post_dbell()
206 u16 *offs = dev->cmd.dbell_offsets; in mthca_cmd_post_dbell()
248 return -EAGAIN; in mthca_cmd_post_hcr()
256 __raw_writel((__force u32) cpu_to_be32(in_param >> 32), dev->hcr + 0 * 4); in mthca_cmd_post_hcr()
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