Lines Matching +full:no +full:- +full:pbl +full:- +full:x8

1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
42 #define	WR4(sc, o, v) bus_write_4(sc->base.res[EQOS_RES_MEM], (o), (v))
45 	{"starfive,jh7110-dwmac",	1},
77 		return (-EINVAL);  in if_eqos_starfive_set_speed()
80 	clk_set_freq(sc->gtx, freq, 0);  in if_eqos_starfive_set_speed()
81 	err = clk_enable(sc->gtx);  in if_eqos_starfive_set_speed()
84 		    clk_get_name(sc->gtx));  in if_eqos_starfive_set_speed()
98 	if (clk_get_by_ofw_name(dev, 0, "gtx", &sc->gtx) != 0) {  in if_eqos_starfive_clk_init()
99 		device_printf(sc->base.dev, "could not get gtx clock\n");  in if_eqos_starfive_clk_init()
103 	if (clk_get_by_ofw_name(dev, 0, "tx", &sc->tx) == 0) {  in if_eqos_starfive_clk_init()
104 		err = clk_enable(sc->tx);  in if_eqos_starfive_clk_init()
107 			    clk_get_name(sc->tx));  in if_eqos_starfive_clk_init()
110 	if (clk_get_by_ofw_name(dev, 0, "stmmaceth", &sc->stmmaceth) == 0) {  in if_eqos_starfive_clk_init()
111 		err = clk_enable(sc->stmmaceth);  in if_eqos_starfive_clk_init()
114 			    clk_get_name(sc->stmmaceth));  in if_eqos_starfive_clk_init()
117 	if (clk_get_by_ofw_name(dev, 0, "pclk", &sc->pclk) == 0) {  in if_eqos_starfive_clk_init()
118 		err = clk_enable(sc->pclk);  in if_eqos_starfive_clk_init()
121 			    clk_get_name(sc->pclk));  in if_eqos_starfive_clk_init()
137 	sc->base.ttc = 0x10;  in if_eqos_starfive_init()
138 	sc->base.rtc = 0;  in if_eqos_starfive_init()
141 		sc->base.thresh_dma_mode = true;  in if_eqos_starfive_init()
143 	if (OF_hasprop(node, "snps,no-pbl-x8"))  in if_eqos_starfive_init()
144 		sc->base.pblx8 = false;  in if_eqos_starfive_init()
147 		OF_getencprop(node, "snps,txpbl", &sc->base.txpbl,  in if_eqos_starfive_init()
148 		    sizeof(sc->base.txpbl));  in if_eqos_starfive_init()
151 		OF_getencprop(node, "snps,rxpbl", &sc->base.rxpbl,  in if_eqos_starfive_init()
152 		    sizeof(sc->base.rxpbl));  in if_eqos_starfive_init()
173 	sc->base.csr_clock = JH7110_CSR_FREQ;  in if_eqos_starfive_init()
174 	sc->base.csr_clock_range = GMAC_MAC_MDIO_ADDRESS_CR_150_250;  in if_eqos_starfive_init()
197 	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)  in eqos_starfive_probe()