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/linux/arch/mips/kernel/
H A Dsmp-cps.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include <asm/mips-cps.h>
22 #include <asm/pm-cps.h>
26 #include <asm/smp-cps.h>
44 static void power_up_other_cluster(unsigned int cluster) in power_up_other_cluster() argument
49 mips_cm_lock_other(cluster, CM_GCR_Cx_OTHER_CORE_CM, 0, in power_up_other_cluster()
60 mips_cm_lock_other(cluster, 0, 0, CM_GCR_Cx_OTHER_BLOCK_GLOBAL); in power_up_other_cluster()
67 mips_cm_lock_other(cluster, CM_GCR_Cx_OTHER_CORE_CM, 0, in power_up_other_cluster()
78 timeout--; in power_up_other_cluster()
80 pr_warn("Waiting for cluster %u CM to power up... STAT_CONF=0x%x\n", in power_up_other_cluster()
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/linux/arch/arm/common/
H A Dmcpm_head.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/common/mcpm_head.S -- kernel entry point for multi-cluster PM
6 * Copyright: (C) 2012-2013 Linaro Limited
8 * Refer to Documentation/arch/arm/cluster-pm-race-avoidance.rst
18 .arch armv7-a
28 1903: .asciz " cluster"
56 ubfx r10, r0, #8, #8 @ r10 = cluster
88 mla r8, r0, r10, r8 @ r8 = sync cluster base
96 @ At this point, the cluster cannot unexpectedly enter the GOING_DOWN
100 mla r11, r0, r10, r11 @ r11 = cluster first man lock
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H A Dmcpm_entry.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/common/mcpm_entry.c -- entry point for multi-cluster PM
6 * Copyright: (C) 2012-2013 Linaro Limited
24 * see Documentation/arch/arm/cluster-pm-race-avoidance.rst.
34 static void __mcpm_cpu_going_down(unsigned int cpu, unsigned int cluster) in __mcpm_cpu_going_down() argument
36 mcpm_sync.clusters[cluster].cpus[cpu].cpu = CPU_GOING_DOWN; in __mcpm_cpu_going_down()
37 sync_cache_w(&mcpm_sync.clusters[cluster].cpus[cpu].cpu); in __mcpm_cpu_going_down()
42 * cluster can be torn down without disrupting this CPU.
47 static void __mcpm_cpu_down(unsigned int cpu, unsigned int cluster) in __mcpm_cpu_down() argument
50 mcpm_sync.clusters[cluster].cpus[cpu].cpu = CPU_DOWN; in __mcpm_cpu_down()
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/linux/arch/arm/mach-sunxi/
H A Dmc_smp.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018 Chen-Yu Tsai
5 * Chen-Yu Tsai <wens@csie.org>
7 * arch/arm/mach-sunxi/mc_smp.c
9 * Based on Allwinner code, arch/arm/mach-exynos/mcpm-exynos.c, and
10 * arch/arm/mach-hisi/platmcpm.c
11 * Cluster cache enable trampoline code adapted from MCPM framework
14 #include <linux/arm-cci.h>
19 #include <linux/irqchip/arm-gic.h>
70 /* R_CPUCFG registers, specific to sun8i-a83t */
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/linux/Documentation/arch/arm/
H A Dcluster-pm-race-avoidance.rst2 Cluster-wide Power-up/power-down race avoidance algorithm
6 cluster setup and teardown operations and to manage hardware coherency
16 ---------
29 cluster-level operations are only performed when it is truly safe to do
34 are not immediately enabled when a cluster powers up. Since enabling or
35 disabling those mechanisms may itself be a non-atomic operation (such as
38 power-down and power-up at the cluster level.
46 -----------
48 Each cluster and CPU is assigned a state, as follows:
50 - DOWN
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/linux/Documentation/admin-guide/perf/
H A Dhisi-pmu.rst10 The HiSilicon SoC encapsulates multiple CPU and IO dies. Each CPU cluster
12 called Super CPU cluster (SCCL) and is made up of 6 CCLs. Each SCCL has
13 two HHAs (0 - 1) and four DDRCs (0 - 3), respectively.
16 -------------------------------
28 name will appear in event listing as hisi_sccl<sccl-id>_module<index-id>.
29 where "sccl-id" is the identifier of the SCCL and "index-id" is the index of
48 ------------------------------------------
50 ------------------------------------------
52 ------------------------------------------
54 ------------------------------------------
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/linux/Documentation/devicetree/bindings/arm/
H A Darm,cci-400.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,cci-400.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
13 ARM multi-cluster systems maintain intra-cluster coherency through a cache
24 pattern: "^cci(@[0-9a-f]+)?$"
28 - arm,cci-400
29 - arm,cci-500
30 - arm,cci-550
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/linux/arch/arm/mach-versatile/
H A Dplatsmp-vexpress.c1 // SPDX-License-Identifier: GPL-2.0-only
27 * The best way to detect a multi-cluster configuration in vexpress_smp_init_ops()
40 cci_node = of_parse_phandle(cpu_node, "cci-control-port", 0); in vexpress_smp_init_ops()
57 { .compatible = "arm,cortex-a5-scu", },
58 { .compatible = "arm,cortex-a9-scu", },
72 * system-wide flags register. The boot monitor waits in vexpress_smp_dt_prepare_cpus()
/linux/fs/exfat/
H A Dexfat_fs.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd.
49 (ES_IDX_FIRST_FILENAME + EXFAT_FILENAME_ENTRY_NUM(name_len) - 1)
75 #define MAX_CHARSET_SIZE 6 /* max size of multi-byte character */
79 #define EXFAT_HINT_NONE -1
83 * helpers for cluster size to byte conversion.
85 #define EXFAT_CLU_TO_B(b, sbi) ((b) << (sbi)->cluster_size_bits)
86 #define EXFAT_B_TO_CLU(b, sbi) ((b) >> (sbi)->cluster_size_bits)
88 (((b - 1) >> (sbi)->cluster_size_bits) + 1)
89 #define EXFAT_CLU_OFFSET(off, sbi) ((off) & ((sbi)->cluster_size - 1))
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/linux/include/sound/
H A Dsdca_function.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
4 * https://www.mipi.org/mipi-sdca-v1-0-download
20 #define SDCA_NO_INTERRUPT -1
34 * The Cluster IDs are 16-bit, so a maximum of 65535 Clusters per
41 * Sanity check on number of channels per Cluster, can be expanded if needed.
56 * enum sdca_function_type - SDCA Function Type codes
66 * @SDCA_FUNCTION_TYPE_IMP_DEF: Implementation-defined function.
88 /* Human-readable names used for kernel logs and Function device registration/bind */
101 * struct sdca_init_write - a single initialization write
111 * define SDCA_CTL_TYPE - create a unique identifier for an SDCA Control
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/linux/drivers/bus/
H A Darm-cci.c17 #include <linux/arm-cci.h>
49 {.compatible = "arm,cci-400", .data = CCI400_PORTS_DATA },
52 { .compatible = "arm,cci-500", },
53 { .compatible = "arm,cci-550", },
59 OF_DEV_AUXDATA("arm,cci-400-pmu", 0, NULL, &cci_ctrl_base),
60 OF_DEV_AUXDATA("arm,cci-400-pmu,r0", 0, NULL, &cci_ctrl_base),
61 OF_DEV_AUXDATA("arm,cci-400-pmu,r1", 0, NULL, &cci_ctrl_base),
62 OF_DEV_AUXDATA("arm,cci-500-pmu,r0", 0, NULL, &cci_ctrl_base),
63 OF_DEV_AUXDATA("arm,cci-550-pmu,r0", 0, NULL, &cci_ctrl_base),
67 #define DRIVER_NAME "ARM-CCI"
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/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,saw2.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
19 power-controller that transitions a piece of hardware (like a processor or
27 - enum:
28 - qcom,ipq4019-saw2-cpu
29 - qcom,ipq4019-saw2-l2
30 - qcom,ipq8064-saw2-cpu
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/linux/Documentation/filesystems/
H A Df2fs.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Flash-Friendly File System (F2FS)
10 NAND flash memory-based storage devices, such as SSD, eMMC, and SD cards, have
16 F2FS is a file system exploiting NAND flash memory-based storage devices, which
17 is based on Log-structured File System (LFS). The design has been focused on
21 Since a NAND flash memory-based storage device shows different characteristic
23 F2FS and its tools support various parameters not only for configuring on-disk
29 - git://git.kernel.org/pub/scm/linux/kernel/git/jaegeuk/f2fs-tools.git
33 - linux-f2fs-devel@lists.sourceforge.net
37 - https://bugzilla.kernel.org/enter_bug.cgi?product=File%20System&component=f2fs
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/linux/fs/dlm/
H A Dlowcomms.c1 // SPDX-License-Identifier: GPL-2.0-only
5 ** Copyright (C) Sistina Software, Inc. 1997-2003 All rights reserved.
6 ** Copyright (C) 2004-2009 Red Hat, Inc. All rights reserved.
15 * This is the "low-level" comms layer.
18 * from other nodes in the cluster.
20 * Cluster nodes are referred to by their nodeids. nodeids are
21 * simply 32 bit numbers to the locking module - if they need to
22 * be expanded for the cluster infrastructure then that is its
25 * whatever it needs for inter-node communication.
29 * up to the mid-level comms layer (which understands the
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/linux/drivers/acpi/
H A Dpptt.c1 // SPDX-License-Identifier: GPL-2.0
3 * pptt.c - parsing of Processor Properties Topology Table (PPTT)
33 if (pptt_ref + sizeof(struct acpi_subtable_header) > table_hdr->length) in fetch_pptt_subtable()
38 if (entry->length == 0) in fetch_pptt_subtable()
41 if (pptt_ref + entry->length > table_hdr->length) in fetch_pptt_subtable()
65 if (resource >= node->number_of_priv_resources) in acpi_get_pptt_resource()
81 * acpi_pptt_walk_cache() - Attempt to find the requested acpi_pptt_cache
111 if (res->type != ACPI_PPTT_TYPE_CACHE) in acpi_pptt_walk_cache()
118 if (!(cache->flags & ACPI_PPTT_CACHE_TYPE_VALID)) { in acpi_pptt_walk_cache()
119 cache = fetch_pptt_cache(table_hdr, cache->next_level_of_cache); in acpi_pptt_walk_cache()
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/linux/fs/erofs/
H A Derofs_fs.h1 /* SPDX-License-Identifier: GPL-2.0-only OR Apache-2.0 */
3 * EROFS (Enhanced ROM File System) on-disk format definition
5 * Copyright (C) 2017-2018 HUAWEI, Inc.
39 ((EROFS_FEATURE_INCOMPAT_METABOX << 1) - 1)
53 /* erofs on-disk super block (currently 144 bytes at maximum) */
56 __le32 checksum; /* crc32c to avoid unexpected on-disk overlap */
64 __le64 inos; /* total valid ino # (== f_files - f_favail) */
70 __u8 uuid[16]; /* 128-bit uuid for volume */
95 * EROFS inode datalayout (i_format in on-disk inode):
96 * 0 - uncompressed flat inode without tail-packing inline data:
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/linux/Documentation/arch/arm/samsung/
H A Dbootloader-interface.rst14 In the document "boot loader" means any of following: U-boot, proprietary
19 1. Non-Secure mode
65 3. Other (regardless of secure/non-secure mode)
72 0x0908 Non-zero Secondary CPU boot up indicator
79 AFTR - ARM Off Top Running, a low power mode, Cortex cores and many other
81 MCPM - Multi-Cluster Power Management
/linux/drivers/edac/
H A Dx38_edac.c3 * Copyright (C) 2008 Cluster Computing, Inc.
18 #include <linux/io-64-nonatomic-lo-hi.h>
29 /* Intel X38 register addresses - device 0 function 0 - DRAM Controller */
55 * 9 LOCK to non-DRAM Memory Flag (LCKF)
59 * 1 Multi-bit DRAM ECC Error Flag (DMERR)
60 * 0 Single-bit DRAM ECC Error Flag (DSERR)
67 /* Intel MMIO register space - device 0 function 0 - MMR space */
154 pdev = to_pci_dev(mci->pdev); in x38_clear_error_info()
168 void __iomem *window = mci->pvt_info; in x38_get_and_clear_error_info()
170 pdev = to_pci_dev(mci->pdev); in x38_get_and_clear_error_info()
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/linux/arch/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
22 # IOMMUs not handled by dma-iommu. Drivers must never select this symbol.
29 menu "General architecture-dependent options"
34 Select if the architecture can check permissions at sub-page
63 bool "Cluster scheduler support"
67 Cluster scheduler support improves the CPU scheduler's decision
69 Cluster usually means a couple of CPUs which are placed closely
70 by sharing mid-level caches, last-level cache tags or internal
74 bool "Multi-Core Cache (MC) scheduler support"
78 Multi-core scheduler support improves the CPU scheduler's decision
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/linux/mm/
H A Dswapfile.c1 // SPDX-License-Identifier: GPL-2.0-only
22 #include <linux/blk-cgroup.h>
31 #include <linux/backing-dev.h>
77 static int least_priority = -1;
101 * swap_info_struct changes between not-full/full, it needs to
102 * add/remove itself to/from this list, but the swap_info_struct->lock
104 * before any swap_info_struct->lock.
159 * off-list bit in the atomic counter, updates no longer need any lock
165 #define SWAP_USAGE_OFFLIST_BIT (1UL << (BITS_PER_TYPE(atomic_t) - 2))
169 return atomic_long_read(&si->inuse_pages) & SWAP_USAGE_COUNTER_MASK; in swap_usage_in_pages()
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
30 compress them into a dynamically allocated RAM-based memory pool.
145 int "Maximum number of physical pages per-zspage"
226 specifically-sized allocations with user-controlled contents
230 user-controlled allocations. This may very slightly increase
232 of extra pages since the bulk of user-controlled allocations
233 are relatively long-lived.
248 Try running: slabinfo -DA
285 utilization of a direct-mapped memory-side-cache. See section
288 the presence of a memory-side-cache. There are also incidental
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/linux/arch/arm/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
47 # https://github.com/llvm/llvm-project/commit/d130f402642fba3d065aacb506cb061c899558de
164 The ARM series is a line of low-power-consumption RISC chip designs
166 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
167 manufactured, but legacy ARM-based PC hardware remains popular in
175 relocations. The combined range is -/+ 256 MiB, which is usually
268 Patch phys-to-virt and virt-to-phys translation functions at
272 This can only be used with non-XIP MMU kernels where the base
318 bool "MMU-based Paged Memory Management Support"
321 Select if you want MMU-based virtualised addressing space
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/linux/fs/f2fs/
H A Df2fs.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 #include <linux/page-flags.h>
88 #define IS_FAULT_SET(fi, type) ((fi)->inject_type & BIT(type))
136 #define F2FS_OPTION(sbi) ((sbi)->mount_opt)
143 ((long long)((a) - (b)) > 0))
146 * should not change u32, since it is the on-disk block
173 * prevents priority inversion when a low-priority reader acquires the read lock
175 * higher-priority clients.
221 unsigned char compress_log_size; /* cluster log size */
250 ((raw_super->feature & cpu_to_le32(mask)) != 0)
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/linux/drivers/media/dvb-frontends/
H A Dnxt200x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Support for NXT2002 and NXT2004 - VSB/QAM
6 * Copyright (C) 2006-2014 Michael Krufky <mkrufky@linuxtv.org>
8 * and nxt2004 by Jean-Francois Thibert <jeanfrancois@sagetv.com>
15 * B2C2/BBTI Technisat Air2PC - ATSC (NXT2002)
31 #define NXT2002_DEFAULT_FIRMWARE "dvb-fe-nxt2002.fw"
32 #define NXT2004_DEFAULT_FIRMWARE "dvb-fe-nxt2004.fw"
63 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) { in i2c_writebytes()
66 return -EREMOTEIO; in i2c_writebytes()
76 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) { in i2c_readbytes()
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/linux/drivers/eisa/
H A Deisa.ids6 # Marc Zyngier <maz@wild-wind.fr.eu.org>
10 ABP0510 "Advansys ABP-510 ISA SCSI Host Adapter"
11 ABP0540 "Advansys ABP-540/542 ISA SCSI Host Adapter"
12 ABP7401 "AdvanSys ABP-740/742 EISA Single Channel SCSI Host Adapter"
13 ABP7501 "AdvanSys ABP-750/752 EISA Dual Channel SCSI Host Adapter"
14 ACC1200 "ACCTON EtherCombo-32 Ethernet Adapter"
15 ACC120A "ACCTON EtherCombo-32 Ethernet Adapter"
25 ACE7010 "ACME Multi-Function Board"
39 ACR1711 "AcerFrame 1000 486/33 SYSTEM-2"
41 ACR3211 "AcerFrame 3000MP 486 SYSTEM-1"
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