| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | pci-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/pci-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 - Kishon Vijay Abraham I <kishon@kernel.org>
14 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
18 pattern: "^pcie-ep@"
20 iommu-map:
21 $ref: /schemas/types.yaml#/definitions/uint32-matrix
24 - description: Device ID (see msi-map) base
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| H A D | hisilicon-histb-pcie.txt | 6 Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml.
11 - compatible: Should be one of the following strings:
12 "hisilicon,hi3798cv200-pcie"
13 - reg: Should contain sysctl, rc_dbi, config registers location and length.
14 - reg-names: Must include the following entries:
16 "rc-dbi": configuration space of PCIe controller;
18 - bus-range: PCI bus numbers covered.
19 - interrupts: MSI interrupt.
20 - interrupt-names: Must include "msi" entries.
21 - clocks: List of phandle and clock specifier pairs as listed in clock-names
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| H A D | xlnx,nwl-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/xlnx,nwl-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thippeswamy Havalige <thippeswamy.havalige@amd.com>
13 - $ref: /schemas/pci/pci-host-bridge.yaml#
14 - $ref: /schemas/interrupt-controller/msi-controller.yaml#
18 const: xlnx,nwl-pcie-2.11
22 - description: PCIe bridge registers location.
23 - description: PCIe Controller registers location.
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| H A D | nvidia,tegra194-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Vidya Sagar <vidyas@nvidia.com>
16 inherits all the common properties defined in snps,dw-pcie.yaml. Some of
20 See nvidia,tegra194-pcie-ep.yaml for details on the Endpoint mode device
26 - nvidia,tegra194-pcie
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| H A D | mediatek-pcie.txt | 4 - compatible: Should contain one of the following strings:
5 "mediatek,mt2701-pcie"
6 "mediatek,mt2712-pcie"
7 "mediatek,mt7622-pcie"
8 "mediatek,mt7623-pcie"
9 "mediatek,mt7629-pcie"
10 "airoha,en7523-pcie"
11 - device_type: Must be "pci"
12 - reg: Base addresses and lengths of the root ports.
13 - reg-names: Names of the above areas to use during resource lookup.
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| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | msi-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/msi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MSI controller
10 - Marc Zyngier <maz@kernel.org>
13 An MSI controller signals interrupts to a CPU when a write is made
14 to an MMIO address by some master. An MSI controller may feature a
18 "#msi-cells":
20 The number of cells in an msi-specifier, required if not zero.
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| H A D | msi.txt | 1 This document describes the generic device tree binding for MSI controllers and
9 those busses to the MSI controllers which they are capable of using,
14 - The doorbell (the MMIO address written to).
17 they can address. An MSI controller may feature a number of doorbells.
19 - The payload (the value written to the doorbell).
22 MSI controllers may have restrictions on permitted payloads.
24 - Sideband information accompanying the write.
28 MSI controller and device rather than a property of either in isolation).
31 MSI controllers:
34 An MSI controller signals interrupts to a CPU when a write is made to an MMIO
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| /linux/Documentation/devicetree/bindings/misc/ |
| H A D | fsl,qoriq-mc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/misc/fsl,qoriq-mc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
13 The Freescale Management Complex (fsl-mc) is a hardware resource
15 network-oriented packet processing applications. After the fsl-mc
22 For an overview of the DPAA2 architecture and fsl-mc bus see:
26 same hardware "isolation context" and a 10-bit value called an ICID
31 between ICIDs and IOMMUs, so an iommu-map property is used to define
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| /linux/include/linux/ |
| H A D | irqdomain.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * irq_domain - IRQ Translation Domains
5 * See Documentation/core-api/irq/irq-domain.rst for the details.
16 #include <linux/radix-tree.h>
32 * struct irq_fwspec - generic IRQ specifier structure
34 * @fwnode: Pointer to a firmware-specific descriptor
35 * @param_count: Number of device-specific parameters
36 * @param: Device-specific parameters
39 * pass a device-specific description of an interrupt.
52 * struct irq_domain_ops - Methods for irq_domain objects
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| H A D | pci.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
7 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
60 * The PCI interface treats multi-function devices as independent
68 * In the interest of not exposing interfaces to user-space unnecessarily,
69 * the following kernel-only defines are being added here.
80 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */
86 return kobject_name(&slot->kobj); in pci_slot_name()
97 /* #0-5: standard PCI resources */
99 PCI_STD_RESOURCE_END = PCI_STD_RESOURCES + PCI_STD_NUM_BARS - 1,
104 /* Device-specific resources */
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| /linux/drivers/irqchip/ |
| H A D | irq-ti-sci-inta.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/
15 #include <linux/msi.h>
24 #include <asm-generic/msi.h>
44 * struct ti_sci_inta_event_desc - Description of an event coming to
59 * struct ti_sci_inta_vint_desc - Description of a virtual interrupt coming out
78 * struct ti_sci_inta_irq_domain - Structure representing a TISCI based
87 * @ti_sci_id: TI-SCI device identifier
89 * @unmapped_dev_ids: Pointer to an array of TI-SCI device identifiers of
95 * generating Unmapped Event, we must use the INTA's TI-SCI
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| /linux/drivers/pci/controller/ |
| H A D | pci-hyperv.c | 1 // SPDX-License-Identifier: GPL-2.0
8 * This driver acts as a paravirtual front-end for PCI Express root buses.
9 * When a PCI Express function (either an entire device or an SR-IOV
13 * VM within Hyper-V, there may seem to be no PCI bus at all in the VM
18 * to the VM using this front-end will appear at "device 0", the domain will
24 * MSI or MSI-X) associated with the functions on the bus. As interrupts are
28 * vector. This driver does not support level-triggered (line-based)
32 * The rest of this driver mostly maps PCI concepts onto underlying Hyper-V
34 * by Hyper-V is mapped into a single page of memory space, and the
37 * the PCI back-end driver in Hyper-V.
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| /linux/include/uapi/linux/ |
| H A D | pci_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
5 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
25 * Conventional PCI and PCI-X Mode 1 devices have 256 bytes of
26 * configuration space. PCI-X Mode 2 and PCIe devices have 4096 bytes of
50 #define PCI_COMMAND_FAST_BACK 0x200 /* Enable back-to-back writes */
59 #define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */
83 #define PCI_HEADER_TYPE_MFD 0x80 /* Multi-Function Device (possible) */
124 /* 0x35-0x3b are reserved */
130 /* Header type 1 (PCI-to-PCI bridges) */
158 /* 0x35-0x3b is reserved */
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| /linux/tools/lib/bpf/ |
| H A D | btf_dump.c | 1 // SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause)
4 * BTF-to-C type converter.
26 static const size_t PREFIX_CNT = sizeof(PREFIXES) - 1;
30 return lvl >= PREFIX_CNT ? PREFIXES : &PREFIXES[PREFIX_CNT - lvl]; in pfx()
45 /* per-typ
1897 __u64 lsi, msi; btf_dump_int_data() local
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| /linux/arch/powerpc/sysdev/ |
| H A D | mpic.c | 9 * Copyright 2010-2012 Freescale Semiconductor, Inc.
153 #define MPIC_INFO(name) mpic->hw_set[MPIC_IDX_##name]
165 if (!(mpic->flags & MPIC_SECONDARY)) in mpic_processor_id()
183 return dcr_read(rb->dhost, reg); in _mpic_read()
186 return in_be32(rb->base + (reg >> 2)); in _mpic_read()
189 return in_le32(rb->base + (reg >> 2)); in _mpic_read()
200 dcr_write(rb->dhost, reg, value); in _mpic_write()
204 out_be32(rb->base + (reg >> 2), value); in _mpic_write()
208 out_le32(rb->base + (reg >> 2), value); in _mpic_write()
215 enum mpic_reg_type type = mpic->reg_type; in _mpic_ipi_read()
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| /linux/Documentation/admin-guide/ |
| H A D | kernel-parameters.txt | 16 force -- enable ACPI if default was off
17 on -- enable ACPI but allow fallback to DT [arm64,riscv64]
18 off -- disable ACPI if default was on
19 noirq -- do not use ACPI for IRQ routing
20 strict -- Be less tolerant of platforms that are not
22 rsdt -- prefer RSDT over (default) XSDT
23 copy_dsdt -- copy DSDT to memory
24 nocmcff -- Disable firmware first mode for corrected
28 nospcr -- disable console in ACPI SPCR table as
45 If set to vendor, prefer vendor-specific driver
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