| /linux/Documentation/devicetree/bindings/powerpc/fsl/ |
| H A D | pmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/powerpc/fsl/pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - J. Neuschäfer <j.ne@posteo.net>
14 controlling chip-wide low-power states as well as peripheral clock gating.
17 example `sleep = <&pmc 0x00000030>`. Any cells after the &pmc phandle are
20 For "fsl,mpc8349-pmc", sleep specifiers consist of one cell. For each bit that
25 For "fsl,mpc8536-pmc", sleep specifiers consist of three cells, the third of
27 resume. The first two cells are as described for fsl,mpc8548-pmc. This
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| /linux/arch/powerpc/boot/dts/ |
| H A D | xpedite5200_xmon.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
7 * xMon boot loader memory map which differs from U-Boot's.
10 /dts-v1/;
14 compatible = "xes,xpedite5200", "xes,MPC8548";
15 #address-cells = <1>;
16 #size-cells = <1>;
17 form-factor = "PMC/XMC";
18 boot-bank = <0x0>;
33 #address-cells = <1>;
34 #size-cells = <0>;
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| H A D | xpedite5200.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
9 /dts-v1/;
13 compatible = "xes,xpedite5200", "xes,MPC8548";
14 #address-cells = <1>;
15 #size-cells = <1>;
29 #address-cells = <1>;
30 #size-cells = <0>;
35 d-cache-line-size = <32>; // 32 bytes
36 i-cache-line-size = <32>; // 32 bytes
37 d-cache-size = <0x8000>; // L1, 32K
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| H A D | xpedite5301.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
6 * XPedite5301 PMC/XMC module based on MPC8572E
9 /dts-v1/;
13 #address-cells = <2>;
14 #size-cells = <2>;
15 form-factor = "PMC/XMC";
16 boot-bank = <0x0>; /* 0: Primary flash, 1: Secondary flash */
28 #address-cells = <1>;
29 #size-cells = <0>;
34 d-cache-line-size = <32>; // 32 bytes
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| H A D | xpedite5330.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
9 /dts-v1/;
13 #address-cells = <2>;
14 #size-cells = <2>;
15 form-factor = "3U CompactPCI";
16 boot-bank = <0x0>; /* 0: Primary flash, 1: Secondary flash */
29 #address-cells = <1>;
30 #size-cells = <0>;
33 cell-index = <0>;
37 * module-present;
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| /linux/arch/powerpc/boot/dts/fsl/ |
| H A D | mpc8568si-post.dtsi | 36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8568-localbus", "fsl,pq3-localbus", "simple-bus";
40 sleep = <&pmc 0x08000000>;
45 compatible = "fsl,mpc8540-pci";
48 bus-range = <0 0xff>;
49 #interrupt-cells = <1>;
50 #size-cells = <2>;
51 #address-cells = <3>;
52 sleep = <&pmc 0x80000000>;
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| H A D | p1022si-post.dtsi | 36 #address-cells = <2>;
37 #size-cells = <1>;
39 * The localbus on the P1022 is not a simple-bus because of the eLBC
42 compatible = "fsl,p1022-elbc", "fsl,elbc";
49 compatible = "fsl,mpc8548-pcie";
51 #size-cells = <2>;
52 #address-cells = <3>;
53 bus-range = <0 255>;
54 clock-frequency = <33333333>;
59 #interrupt-cells = <1>;
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| H A D | mpc8569si-post.dtsi | 36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8569-elbc", "fsl,elbc", "simple-bus";
40 sleep = <&pmc 0x08000000>;
45 compatible = "fsl,mpc8548-pcie";
47 #size-cells = <2>;
48 #address-cells = <3>;
49 bus-range = <0 255>;
50 clock-frequency = <33333333>;
52 sleep = <&pmc 0x20000000>;
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| H A D | mpc8536si-post.dtsi | 36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8536-elbc", "fsl,elbc", "simple-bus";
44 compatible = "fsl,mpc8540-pci";
47 bus-range = <0 0xff>;
48 #interrupt-cells = <1>;
49 #size-cells = <2>;
50 #address-cells = <3>;
55 compatible = "fsl,mpc8548-pcie";
57 #size-cells = <2>;
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| H A D | p2020si-post.dtsi | 36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,p2020-elbc", "fsl,elbc", "simple-bus";
44 compatible = "fsl,mpc8548-pcie";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0 255>;
49 clock-frequency = <33333333>;
55 #interrupt-cells = <1>;
56 #size-cells = <2>;
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| H A D | p1020si-post.dtsi | 36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus";
45 compatible = "fsl,mpc8548-pcie";
47 #size-cells = <2>;
48 #address-cells = <3>;
49 bus-range = <0 255>;
50 clock-frequency = <33333333>;
55 #interrupt-cells = <1>;
56 #size-cells = <2>;
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| H A D | pq3-power.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+)
7 compatible = "fsl,mpc8548-pmc";
10 etsec1_clk: soc-clk@24 {
11 fsl,pmcdr-mask = <0x00000080>;
13 etsec2_clk: soc-clk@25 {
14 fsl,pmcdr-mask = <0x00000040>;
16 etsec3_clk: soc-clk@26 {
17 fsl,pmcdr-mask = <0x00000020>;
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| H A D | p1021si-post.dtsi | 4 * Copyright 2011-2012 Freescale Semiconductor Inc.
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,p1021-elbc", "fsl,elbc", "simple-bus";
45 compatible = "fsl,mpc8548-pcie";
47 #size-cells = <2>;
48 #address-cells = <3>;
49 bus-range = <0 255>;
50 clock-frequency = <33333333>;
55 #interrupt-cells = <1>;
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| /linux/arch/powerpc/sysdev/ |
| H A D | fsl_pmc.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
36 setbits32(&pmc_regs->pmcsr, PMCSR_SLP); in pmc_suspend_enter()
40 ret = spin_event_timeout((in_be32(&pmc_regs->pmcsr) & PMCSR_SLP) == 0, in pmc_suspend_enter()
41 10000, 10) ? 0 : -ETIMEDOUT; in pmc_suspend_enter()
61 pmc_regs = of_iomap(ofdev->dev.of_node, 0); in pmc_probe()
63 return -ENOMEM; in pmc_probe()
65 pmc_dev = &ofdev->dev; in pmc_probe()
71 { .compatible = "fsl,mpc8548-pmc", },
72 { .compatible = "fsl,mpc8641d-pmc", },
78 .name = "fsl-pmc",
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| /linux/arch/powerpc/platforms/85xx/ |
| H A D | common.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Routines common to most mpc85xx-based boards.
21 { .compatible = "simple-bus", },
29 { .compatible = "fsl,eloplus-dma", },
30 /* For the PMC driver */
31 { .compatible = "fsl,mpc8548-guts", },
33 { .compatible = "gpio-leds", },
35 { .compatible = "fsl,mpc8540-pci", },
36 { .compatible = "fsl,mpc8548-pcie", },
37 { .compatible = "fsl,p1022-pcie", },
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