Searched +full:mpc8377 +full:- +full:pmc (Results 1 – 3 of 3) sorted by relevance
1 // SPDX-License-Identifier: GPL-2.0-or-later5 * Copyright 2007-2009 Freescale Semiconductor Inc.9 /dts-v1/;13 #address-cells = <1>;14 #size-cells = <1>;27 #address-cells = <1>;28 #size-cells = <0>;33 d-cache-line-size = <32>;34 i-cache-line-size = <32>;35 d-cache-size = <32768>;[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later8 /dts-v1/;12 #address-cells = <1>;13 #size-cells = <1>;26 #address-cells = <1>;27 #size-cells = <0>;32 d-cache-line-size = <32>;33 i-cache-line-size = <32>;34 d-cache-size = <32768>;35 i-cache-size = <32768>;[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/powerpc/fsl/pmc.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - J. Neuschäfer <j.ne@posteo.net>14 controlling chip-wide low-power states as well as peripheral clock gating.17 example `sleep = <&pmc 0x00000030>`. Any cells after the &pmc phandle are20 For "fsl,mpc8349-pmc", sleep specifiers consist of one cell. For each bit that25 For "fsl,mpc8536-pmc", sleep specifiers consist of three cells, the third of27 resume. The first two cells are as described for fsl,mpc8548-pmc. This[all …]