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/linux/Documentation/PCI/
H A Dacpi-info.rst1 .. SPDX-License-Identifier: GPL-2.0
39 If the OS is expected to manage a non-discoverable device described via
46 they forward down to the PCI bus, as well as registers of the host bridge
48 things like secondary/subordinate bus registers that determine the bus
50 These are all device-specific, non-architected things, so the only way a
52 the device-specific details. The host bridge registers also include ECAM
66 bridge registers (including ECAM space) in PNP0C02 catch-all devices [6].
67 With the exception of ECAM, the bridge register space is device-specific
78 PNP0C02 "motherboard" devices are basically a catch-all. There's no
89 the address space is device-specific. An ACPI OS learns the base address
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/linux/arch/arm64/boot/dts/arm/
H A Drtsm_ve-motherboard-rs2.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * "rs2" extension for the v2m motherboard
8 bus@8000000 {
9 motherboard-bus@8000000 {
10 arm,v2m-memory-map = "rs2";
12 iofpga-bus@300000000 {
H A Drtsm_ve-motherboard.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 * Motherboard component
11 v2m_clk24mhz: clock-24000000 {
12 compatible = "fixed-clock";
13 #clock-cells = <0>;
14 clock-frequency = <24000000>;
15 clock-output-names = "v2m:clk24mhz";
18 v2m_refclk1mhz: clock-1000000 {
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
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H A Djuno-motherboard.dtsi2 * ARM Juno Platform motherboard peripherals
4 * Copyright (c) 2013-2014 ARM Ltd
11 mb_clk24mhz: clock-24000000 {
12 compatible = "fixed-clock";
13 #clock-cells = <0>;
14 clock-frequency = <24000000>;
15 clock-output-names = "juno_mb:clk24mhz";
18 mb_clk25mhz: clock-25000000 {
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
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H A Dfvp-base-revc.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Architecture Envelope Model (AEM) ARMv8-A
11 /dts-v1/;
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 #include "rtsm_ve-motherboard.dtsi"
18 #include "rtsm_ve-motherboard-rs2.dtsi"
22 compatible = "arm,fvp-base-revc", "arm,vexpress";
23 interrupt-parent = <&gic>;
24 #address-cells = <2>;
25 #size-cells = <2>;
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/linux/Documentation/i2c/busses/
H A Di2c-via.rst2 Kernel driver i2c-via
12 -----------
14 i2c-via is an i2c bus driver for motherboards with VIA chipset.
17 - MVP3, VP3, VP2/97, VPX/97
18 - others with South bridge VT82C586B
25 ---------
28 You have VT82C586B on the motherboard, but not in the listing.
39 datasheets, but there are several ways the motherboard manufacturer
H A Di2c-ali15x3.rst2 Kernel driver i2c-ali15x3
12 - Frodo Looijaard <frodol@dds.nl>,
13 - Philip Edelbrock <phil@netroedge.com>,
14 - Mark D. Studebaker <mdsxyz123@yahoo.com>
17 -----------------
24 -----
33 modprobe i2c-ali15x3 force_addr=0xe800
40 -----------
52 100MHz CPU Front Side bus
54 CPU Front Side bus
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/linux/arch/arm/boot/dts/arm/
H A Dvexpress-v2m.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Motherboard Express uATX
6 * V2M-P1
8 * HBI-0190D
14 * RS1 variant (vexpress-v2m-rs1.dtsi), but there is a strong
18 * CHANGES TO vexpress-v2m-rs1.dtsi!
20 #include <dt-bindings/interrupt-controller/arm-gic.h>
23 bus@40000000 {
24 compatible = "simple-bus";
25 #address-cells = <1>;
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H A Dvexpress-v2m-rs1.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Motherboard Express uATX
6 * V2M-P1
8 * HBI-0190D
10 * RS1 memory map ("ARM Cortex-A Series memory map" in the board's
14 * original variant (vexpress-v2m.dtsi), but there is a strong
18 * CHANGES TO vexpress-v2m.dtsi!
20 #include <dt-bindings/interrupt-controller/arm-gic.h>
23 v2m_fixed_3v3: regulator-3v3 {
24 compatible = "regulator-fixed";
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/linux/Documentation/hwmon/
H A Dw83793.rst10 Addresses scanned: I2C 0x2c - 0x2f
15 - Yuan Mu (Winbond Electronics)
16 - Rudolf Marek <r.marek@assembler.cz>
20 -----------------
25 This parameter is not recommended, it will lose motherboard specific
28 * force_subclients=bus,caddr,saddr1,saddr2
31 to force the subclients of chip 0x2f on bus 0 to i2c addresses
36 -----------
44 sets of 6-pin CPU VID input.
47 If your motherboard maker used the reference design, the resolution of
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H A Dvia686a.rst10 Addresses scanned: ISA in PCI-space encoded address
12 Datasheet: On request through web form (http://www.via.com.tw/en/resources/download-center/)
15 - Kyösti Mälkki <kmalkki@cc.hut.fi>,
16 - Mark D. Studebaker <mdsxyz123@yahoo.com>
17 - Bob Dougherty <bobd@stanford.edu>
18 - (Some conversion-factor data were contributed by
19 - Jonathan Teh Soon Yew <j.teh@iname.com>
20 - and Alex van Kaam <darkside@chello.nl>.)
23 -----------------
36 -----------
[all …]
H A Dsmsc47m192.rst10 Addresses scanned: I2C 0x2c - 0x2d
23 - Hartmut Rick <linux@rick.claranet.de>
25 - Special thanks to Jean Delvare for careful checking
30 -----------
33 of the SMSC LPC47M192 and compatible Super-I/O chips.
39 these features are accessed via ISA bus and are not supported by this
42 Voltages and temperatures are measured by an 8-bit ADC, the resolution
57 the motherboard has this input wired to VID4.
64 ---------------
77 in[0-7]_min,
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/linux/arch/m68k/
H A DKconfig.bus1 # SPDX-License-Identifier: GPL-2.0
4 comment "Bus Support"
7 bool "DIO bus support"
11 Say Y here to enable support for the "DIO" expansion bus used in
21 bool "Amiga Zorro (AutoConfig) bus support"
24 This enables support for the Zorro bus in the Amiga. If you have
43 Find out whether you have ISA slots on your motherboard. ISA is the
44 name of a bus system, i.e. the way the CPU talks to the other stuff
45 inside your box. Other bus systems are PCI, EISA, MicroChannel
/linux/arch/mips/pci/
H A Dpci-generic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
14 * addresses to be allocated in the 0x000-0x0ff region
18 * the low 10 bits of the IO address. The 0x00-0xff region
19 * is reserved for motherboard devices that decode all 16
20 * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
21 * but we want to try to avoid allocating at 0x2900-0x2bff
22 * which might have be mirrored at 0x0100-0x03ff..
28 resource_size_t start = res->start; in pcibios_align_resource()
31 if (res->flags & IORESOURCE_IO && start & 0x300) in pcibios_align_resource()
34 start = (start + align - 1) & ~(align - 1); in pcibios_align_resource()
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H A Dpci-legacy.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (C) 2003, 04, 11 Ralf Baechle (ralf@linux-mips.org)
6 * written by Ralf Baechle (ralf@linux-mips.org)
18 #include <asm/cpu-info.h>
35 return (unsigned long)-1; in pci_address_to_pio()
43 * addresses to be allocated in the 0x000-0x0ff region
47 * the low 10 bits of the IO address. The 0x00-0xff region
48 * is reserved for motherboard devices that decode all 16
49 * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
50 * but we want to try to avoid allocating at 0x2900-0x2bff
[all …]
/linux/arch/xtensa/kernel/
H A Dpci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * PCI bios-type initialisation for PCI machines
7 * Copyright (C) 2001-2005 Tensilica Inc.
24 #include <asm/pci-bridge.h>
30 * addresses to be allocated in the 0x000-0x0ff region
34 * the low 10 bits of the IO address. The 0x00-0xff region
35 * is reserved for motherboard devices that decode all 16
36 * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
37 * but we want to try to avoid allocating at 0x2900-0x2bff
38 * which might have be mirrored at 0x0100-0x03ff..
[all …]
/linux/arch/m68k/kernel/
H A Dpcibios.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * pci.c -- basic PCI support code
15 * From arch/i386/kernel/pci-i386.c:
19 * addresses to be allocated in the 0x000-0x0ff region
23 * the low 10 bits of the IO address. The 0x00-0xff region
24 * is reserved for motherboard devices that decode all 16
25 * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
26 * but we want to try to avoid allocating at 0x2900-0x2bff
27 * which might be mirrored at 0x0100-0x03ff..
32 resource_size_t start = res->start; in pcibios_align_resource()
[all …]
/linux/drivers/gpu/drm/xe/
H A Dxe_device_sysfs.c1 // SPDX-License-Identifier: MIT
25 * vram_d3cold_threshold - Report/change vram used threshold(in MB) below
28 * lb_fan_control_version - Fan control version provisioned by late binding.
31 * lb_voltage_regulator_version - Voltage regulator version provisioned by late
44 ret = sysfs_emit(buf, "%d\n", xe->d3cold.vram_threshold); in vram_d3cold_threshold_show()
63 drm_dbg(&xe->drm, "vram_d3cold_threshold: %u\n", vram_d3cold_threshold); in vram_d3cold_threshold_store()
186 return attr->mode; in late_bind_attr_is_visible()
189 return attr->mode; in late_bind_attr_is_visible()
206 * to host or motherboard limitations and may have to auto-downgrade their link
209 * the device is capable of auto-downgrading its link to PCIe Gen4 speed before
[all …]
/linux/drivers/char/agp/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
7 AGP (Accelerated Graphics Port) is a bus system mainly used to
12 as a sort of "AGP driver" for the motherboard's chipset.
20 write-combining with MTRR support on the AGP bus. Without it, OpenGL
37 For the ALi-chipset question, ALi suggests you refer to
60 tristate "AMD Opteron/Athlon64 on-CPU GART support"
64 X using the on-CPU northbridge of the AMD Athlon64/Opteron CPUs.
117 AGP bus adapter on HP PA-RISC machines (Ok, just on the C8000
/linux/Documentation/devicetree/bindings/arm/
H A Dvexpress-config.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/vexpress-config.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM Versatile Express configuration bus
10 - Andre Przywara <andre.przywara@arm.com>
14 platform's configuration bus via "system control" interface, addressing
16 function and device numbers - see motherboard's TRM for more details.
20 const: arm,vexpress,config-bus
22 arm,vexpress,config-bridge:
[all …]
/linux/arch/alpha/kernel/
H A Dsys_ruffian.c1 // SPDX-License-Identifier: GPL-2.0
93 /* This only causes re-entry to ARCSBIOS */ in ruffian_kill_arch()
103 * Primary bus
105 * 21052 13 - - - -
106 * SIO 14 23 - - -
107 * 21143 15 44 - - -
110 * Secondary bus
117 * 53c875 13 (23) 20 - - -
126 {-1, -1, -1, -1, -1}, /* IdSel 13, 21052 */ in ruffian_map_irq()
127 {-1, -1, -1, -1, -1}, /* IdSel 14, SIO */ in ruffian_map_irq()
[all …]
/linux/Documentation/usb/
H A Dehci.rst5 27-Dec-2002
8 USB 2.0-capable host controller hardware. The USB 2.0 standard is
11 - "High Speed" 480 Mbit/sec (60 MByte/sec)
12 - "Full Speed" 12 Mbit/sec (1.5 MByte/sec)
13 - "Low Speed" 1.5 Mbit/sec
31 While usb-storage devices have been available since mid-2001 (working
34 appear to be on hold until more systems come with USB 2.0 built-in.
39 other changes to the Linux-USB core APIs, including the hub driver,
43 - David Brownell
56 --------------
[all …]
/linux/Documentation/scsi/
H A DBusLogic.rst1 .. SPDX-License-Identifier: GPL-2.0
21 Copyright 1995-1998 by Leonard N. Zubkoff <lnz@dandelion.com>
29 collection of bus architectures by virtue of their MultiMaster ASIC technology.
57 BT-948/958/958D, will always be available from my Linux Home Page at URL
69 the BT-948 PCI Ultra SCSI Host Adapter, and then again for the BT-958 PCI Wide
90 94555, USA and can be reached at 510/796-6100 or on the World Wide Web at
92 mail at techsup@mylex.com, by Voice at 510/608-2400, or by FAX at 510/745-7715.
101 -----------------------------------
116 adapter will attempt to negotiate for 20.0 mega-transfers/second.
121 adapter will attempt to negotiate for 10.0 mega-transfers/second.
[all …]
/linux/include/linux/
H A Dnubus.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 Hacked to death by C. Scott Ananian and David Huggins-Daines.
38 /* Only 9-E actually exist, though 0-8 are also theoretically
40 motherboard and onboard peripherals (Ethernet, video) */
61 /* Directory entry in /proc/bus/nubus */
129 for_each_func_rsrc(f) if (f->board != b) {} else
131 /* These are somewhat more NuBus-specific. They all return 0 for
132 success and -1 for failure, as you'd expect. */
173 dev_set_drvdata(&board->dev, data); in nubus_set_drvdata()
178 return dev_get_drvdata(&board->dev); in nubus_get_drvdata()
/linux/arch/x86/pci/
H A Di386.c1 // SPDX-License-Identifier: GPL-2.0
3 * Low-Level PCI Access for i386 machines
9 * +1 (303) 786-7975
16 * Copyright 1997--2000 Martin Mares <mj@ucw.cz>
22 * PCI Local Bus Specification
65 if (map->dev == dev) in pcibios_fwaddrmap_lookup()
88 map->dev = pci_dev_get(dev); in pcibios_save_fw_addr()
89 map->fw_addr[idx] = fw_addr; in pcibios_save_fw_addr()
90 INIT_LIST_HEAD(&map->list); in pcibios_save_fw_addr()
93 list_add_tail(&map->list, &pcibios_fwaddrmappings); in pcibios_save_fw_addr()
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