1*2874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2e93a6bbeSGreg Ungerer /*
3e93a6bbeSGreg Ungerer * pci.c -- basic PCI support code
4e93a6bbeSGreg Ungerer *
5e93a6bbeSGreg Ungerer * (C) Copyright 2011, Greg Ungerer <gerg@uclinux.org>
6e93a6bbeSGreg Ungerer */
7e93a6bbeSGreg Ungerer
8e93a6bbeSGreg Ungerer #include <linux/kernel.h>
9e93a6bbeSGreg Ungerer #include <linux/types.h>
10e93a6bbeSGreg Ungerer #include <linux/mm.h>
11e93a6bbeSGreg Ungerer #include <linux/init.h>
12e93a6bbeSGreg Ungerer #include <linux/pci.h>
13e93a6bbeSGreg Ungerer
14e93a6bbeSGreg Ungerer /*
15e93a6bbeSGreg Ungerer * From arch/i386/kernel/pci-i386.c:
16e93a6bbeSGreg Ungerer *
17e93a6bbeSGreg Ungerer * We need to avoid collisions with `mirrored' VGA ports
18e93a6bbeSGreg Ungerer * and other strange ISA hardware, so we always want the
19e93a6bbeSGreg Ungerer * addresses to be allocated in the 0x000-0x0ff region
20e93a6bbeSGreg Ungerer * modulo 0x400.
21e93a6bbeSGreg Ungerer *
22e93a6bbeSGreg Ungerer * Why? Because some silly external IO cards only decode
23e93a6bbeSGreg Ungerer * the low 10 bits of the IO address. The 0x00-0xff region
24e93a6bbeSGreg Ungerer * is reserved for motherboard devices that decode all 16
25e93a6bbeSGreg Ungerer * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
26e93a6bbeSGreg Ungerer * but we want to try to avoid allocating at 0x2900-0x2bff
27e93a6bbeSGreg Ungerer * which might be mirrored at 0x0100-0x03ff..
28e93a6bbeSGreg Ungerer */
pcibios_align_resource(void * data,const struct resource * res,resource_size_t size,resource_size_t align)29e93a6bbeSGreg Ungerer resource_size_t pcibios_align_resource(void *data, const struct resource *res,
30e93a6bbeSGreg Ungerer resource_size_t size, resource_size_t align)
31e93a6bbeSGreg Ungerer {
32e93a6bbeSGreg Ungerer resource_size_t start = res->start;
33e93a6bbeSGreg Ungerer
34e93a6bbeSGreg Ungerer if ((res->flags & IORESOURCE_IO) && (start & 0x300))
35e93a6bbeSGreg Ungerer start = (start + 0x3ff) & ~0x3ff;
36e93a6bbeSGreg Ungerer
37e93a6bbeSGreg Ungerer start = (start + align - 1) & ~(align - 1);
38e93a6bbeSGreg Ungerer
39e93a6bbeSGreg Ungerer return start;
40e93a6bbeSGreg Ungerer }
41e93a6bbeSGreg Ungerer
42e93a6bbeSGreg Ungerer /*
43e93a6bbeSGreg Ungerer * This is taken from the ARM code for this.
44e93a6bbeSGreg Ungerer */
pcibios_enable_device(struct pci_dev * dev,int mask)45e93a6bbeSGreg Ungerer int pcibios_enable_device(struct pci_dev *dev, int mask)
46e93a6bbeSGreg Ungerer {
47e93a6bbeSGreg Ungerer struct resource *r;
48e93a6bbeSGreg Ungerer u16 cmd, newcmd;
49e93a6bbeSGreg Ungerer int idx;
50e93a6bbeSGreg Ungerer
51e93a6bbeSGreg Ungerer pci_read_config_word(dev, PCI_COMMAND, &cmd);
52e93a6bbeSGreg Ungerer newcmd = cmd;
53e93a6bbeSGreg Ungerer
54e93a6bbeSGreg Ungerer for (idx = 0; idx < 6; idx++) {
55e93a6bbeSGreg Ungerer /* Only set up the requested stuff */
56e93a6bbeSGreg Ungerer if (!(mask & (1 << idx)))
57e93a6bbeSGreg Ungerer continue;
58e93a6bbeSGreg Ungerer
59e93a6bbeSGreg Ungerer r = dev->resource + idx;
60e93a6bbeSGreg Ungerer if (!r->start && r->end) {
6179bf442cSDan Carpenter pr_err("PCI: Device %s not available because of resource collisions\n",
62e93a6bbeSGreg Ungerer pci_name(dev));
63e93a6bbeSGreg Ungerer return -EINVAL;
64e93a6bbeSGreg Ungerer }
65e93a6bbeSGreg Ungerer if (r->flags & IORESOURCE_IO)
66e93a6bbeSGreg Ungerer newcmd |= PCI_COMMAND_IO;
67e93a6bbeSGreg Ungerer if (r->flags & IORESOURCE_MEM)
68e93a6bbeSGreg Ungerer newcmd |= PCI_COMMAND_MEMORY;
69e93a6bbeSGreg Ungerer }
70e93a6bbeSGreg Ungerer
71e93a6bbeSGreg Ungerer /*
72e93a6bbeSGreg Ungerer * Bridges (eg, cardbus bridges) need to be fully enabled
73e93a6bbeSGreg Ungerer */
74e93a6bbeSGreg Ungerer if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE)
75e93a6bbeSGreg Ungerer newcmd |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
76e93a6bbeSGreg Ungerer
77e93a6bbeSGreg Ungerer
78e93a6bbeSGreg Ungerer if (newcmd != cmd) {
79e93a6bbeSGreg Ungerer pr_info("PCI: enabling device %s (0x%04x -> 0x%04x)\n",
80e93a6bbeSGreg Ungerer pci_name(dev), cmd, newcmd);
81e93a6bbeSGreg Ungerer pci_write_config_word(dev, PCI_COMMAND, newcmd);
82e93a6bbeSGreg Ungerer }
83e93a6bbeSGreg Ungerer return 0;
84e93a6bbeSGreg Ungerer }
85e93a6bbeSGreg Ungerer
pcibios_fixup_bus(struct pci_bus * bus)86b881bc46SGreg Kroah-Hartman void pcibios_fixup_bus(struct pci_bus *bus)
87e93a6bbeSGreg Ungerer {
88e93a6bbeSGreg Ungerer struct pci_dev *dev;
89e93a6bbeSGreg Ungerer
90e93a6bbeSGreg Ungerer list_for_each_entry(dev, &bus->devices, bus_list) {
91e93a6bbeSGreg Ungerer pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 8);
92e93a6bbeSGreg Ungerer pci_write_config_byte(dev, PCI_LATENCY_TIMER, 32);
93e93a6bbeSGreg Ungerer }
94e93a6bbeSGreg Ungerer }
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