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/linux/arch/arm/boot/dts/mediatek/
H A Dmt7623n.dtsi51 mmsys: syscon@14000000 { label
52 compatible = "mediatek,mt7623-mmsys",
53 "mediatek,mt2701-mmsys",
65 clocks = <&mmsys CLK_MM_SMI_LARB0>,
66 <&mmsys CLK_MM_SMI_LARB0>;
133 <&mmsys CLK_MM_SMI_COMMON>,
144 clocks = <&mmsys CLK_MM_DISP_OVL>;
153 clocks = <&mmsys CLK_MM_DISP_RDMA>;
162 clocks = <&mmsys CLK_MM_DISP_WDMA>;
171 clocks = <&mmsys CLK_MM_MDP_BLS_26M>,
[all …]
H A Dmt2701.dtsi193 <&mmsys CLK_MM_SMI_COMMON>,
514 mmsys: syscon@14000000 { label
515 compatible = "mediatek,mt2701-mmsys", "syscon";
524 clocks = <&mmsys CLK_MM_MDP_BLS_26M>, <&mmsys CLK_MM_DISP_BLS>;
534 clocks = <&mmsys CLK_MM_SMI_LARB0>,
535 <&mmsys CLK_MM_SMI_LARB0>;
/linux/drivers/clk/mediatek/
H A DKconfig30 bool "Clock driver for MediaTek MT2701 mmsys"
33 This driver supports MediaTek MT2701 mmsys clocks.
110 tristate "Clock driver for MediaTek MT2712 mmsys"
113 This driver supports MediaTek MT2712 mmsys clocks.
191 tristate "Clock driver for MediaTek MT6765 mmsys"
194 This driver supports MediaTek MT6765 mmsys clocks.
259 tristate "Clock driver for MediaTek MT6779 mmsys"
262 This driver supports MediaTek MT6779 mmsys clocks.
324 tristate "Clock driver for MediaTek MT6795 mmsys"
328 This driver supports MediaTek MT6795 mmsys clocks.
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8173.dtsi1005 mmsys: syscon@14000000 { label
1006 compatible = "mediatek,mt8173-mmsys", "syscon";
1022 clocks = <&mmsys CLK_MM_MDP_RDMA0>,
1023 <&mmsys CLK_MM_MUTEX_32K>;
1032 clocks = <&mmsys CLK_MM_MDP_RDMA1>,
1033 <&mmsys CLK_MM_MUTEX_32K>;
1041 clocks = <&mmsys CLK_MM_MDP_RSZ0>;
1048 clocks = <&mmsys CLK_MM_MDP_RSZ1>;
1055 clocks = <&mmsys CLK_MM_MDP_RSZ2>;
1062 clocks = <&mmsys CLK_MM_MDP_WDMA>;
[all …]
H A Dmt8167.dtsi127 mmsys: syscon@14000000 { label
128 compatible = "mediatek,mt8167-mmsys", "syscon";
136 clocks = <&mmsys CLK_MM_SMI_COMMON>,
137 <&mmsys CLK_MM_SMI_COMMON>;
146 clocks = <&mmsys CLK_MM_SMI_LARB0>,
147 <&mmsys CLK_MM_SMI_LARB0>;
H A Dmt8365.dtsi333 <&mmsys CLK_MM_MM_SMI_COMMON>,
334 <&mmsys CLK_MM_MM_SMI_COMM0>,
335 <&mmsys CLK_MM_MM_SMI_COMM1>,
336 <&mmsys CLK_MM_MM_SMI_LARB0>;
763 mmsys: syscon@14000000 { label
764 compatible = "mediatek,mt8365-mmsys", "syscon";
792 clocks = <&mmsys CLK_MM_MM_SMI_COMMON>,
793 <&mmsys CLK_MM_MM_SMI_COMMON>,
794 <&mmsys CLK_MM_MM_SMI_COMM0>,
795 <&mmsys CLK_MM_MM_SMI_COMM1>;
[all …]
H A Dmt8192.dtsi573 <&mmsys CLK_MM_SMI_INFRA>,
574 <&mmsys CLK_MM_SMI_COMMON>,
575 <&mmsys CLK_MM_SMI_GALS>,
576 <&mmsys CLK_MM_SMI_IOMMU>;
1452 mmsys: syscon@14000000 { label
1453 compatible = "mediatek,mt8192-mmsys", "syscon";
1466 clocks = <&mmsys CLK_MM_DISP_MUTEX0>;
1476 clocks = <&mmsys CLK_MM_SMI_COMMON>,
1477 <&mmsys CLK_MM_SMI_INFRA>,
1478 <&mmsys CLK_MM_SMI_GALS>,
[all …]
H A Dmt2712e.dtsi994 mmsys: syscon@14000000 { label
995 compatible = "mediatek,mt2712-mmsys", "syscon";
1006 clocks = <&mmsys CLK_MM_SMI_LARB0>,
1007 <&mmsys CLK_MM_SMI_LARB0>;
1015 clocks = <&mmsys CLK_MM_SMI_COMMON>,
1016 <&mmsys CLK_MM_SMI_COMMON>;
1026 clocks = <&mmsys CLK_MM_SMI_LARB4>,
1027 <&mmsys CLK_MM_SMI_LARB4>;
1037 clocks = <&mmsys CLK_MM_SMI_LARB5>,
1038 <&mmsys CLK_MM_SMI_LARB5>;
[all …]
/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,hdmi.yaml103 clocks = <&mmsys CLK_MM_HDMI_PIXEL>,
104 <&mmsys CLK_MM_HDMI_PLLCK>,
105 <&mmsys CLK_MM_HDMI_AUDIO>,
106 <&mmsys CLK_MM_HDMI_SPDIF>;
112 mediatek,syscon-hdmi = <&mmsys 0x900>;
H A Dmediatek,wdma.yaml18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
85 clocks = <&mmsys CLK_MM_DISP_WDMA0>;
H A Dmediatek,split.yaml18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
112 clocks = <&mmsys CLK_MM_DISP_SPLIT0>;
H A Dmediatek,color.yaml19 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
119 clocks = <&mmsys CLK_MM_DISP_COLOR0>;
H A Dmediatek,aal.yaml18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
115 clocks = <&mmsys CLK_MM_DISP_AAL>;
H A Dmediatek,merge.yaml18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
134 clocks = <&mmsys CLK_MM_DISP_MERGE>;
/linux/drivers/gpu/drm/mediatek/
H A Dmtk_drm_drv.c334 { .compatible = "mediatek,mt2701-mmsys",
336 { .compatible = "mediatek,mt7623-mmsys",
338 { .compatible = "mediatek,mt2712-mmsys",
340 { .compatible = "mediatek,mt8167-mmsys",
342 { .compatible = "mediatek,mt8173-mmsys",
344 { .compatible = "mediatek,mt8183-mmsys",
346 { .compatible = "mediatek,mt8186-mmsys",
352 { .compatible = "mediatek,mt8192-mmsys",
354 { .compatible = "mediatek,mt8195-mmsys",
360 { .compatible = "mediatek,mt8365-mmsys",
[all …]
/linux/drivers/soc/mediatek/
H A Dmtk-mmsys.h106 * struct mtk_mmsys_driver_data - Settings of the mmsys
107 * @clk_driver: Clock driver name that the mmsys is using
109 * @routes: Routing table of the mmsys.
114 * @is_vppsys: Whether the mmsys is VPPSYS (Video Processing Pipe)
129 * Each MMSYS (multi-media system) may have different settings, they may use
/linux/Documentation/devicetree/bindings/media/
H A Dmediatek,mdp3-rdma.yaml18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
162 clocks = <&mmsys CLK_MM_MDP_RDMA0>,
163 <&mmsys CLK_MM_MDP_RSZ1>;
H A Dmediatek,mdp3-rsz.yaml72 clocks = <&mmsys CLK_MM_MDP_RSZ0>;
81 clocks = <&mmsys CLK_MM_MDP_RSZ1>;
/linux/Documentation/devicetree/bindings/pwm/
H A Dmediatek,pwm-disp.yaml78 clocks = <&mmsys CLK_MM_DISP_PWM026M>,
79 <&mmsys CLK_MM_DISP_PWM0MM>;
/linux/Documentation/devicetree/bindings/soc/mediatek/
H A Dmediatek,mutex.yaml21 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
119 clocks = <&mmsys CLK_MM_MUTEX_32K>;
/linux/include/dt-bindings/memory/
H A Dmt8186-memory-port.h32 /* LARB 0 -- MMSYS */
38 /* LARB 1 -- MMSYS */
45 /* LARB 2 -- MMSYS */
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dmediatek,smi-common.yaml182 clocks = <&mmsys CLK_MM_SMI_COMMON>,
183 <&mmsys CLK_MM_SMI_COMMON>;
/linux/include/dt-bindings/reset/
H A Dmt8192-resets.h31 /* MMSYS resets */
H A Dmt8186-resets.h34 /* MMSYS resets */
H A Dmediatek,mt6795-resets.h17 /* MMSYS resets */

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