| /linux/arch/arm/boot/dts/mediatek/ |
| H A D | mt7623n.dtsi | 51 mmsys: syscon@14000000 { label
52 compatible = "mediatek,mt7623-mmsys",
53 "mediatek,mt2701-mmsys",
65 clocks = <&mmsys CLK_MM_SMI_LARB0>,
66 <&mmsys CLK_MM_SMI_LARB0>;
133 <&mmsys CLK_MM_SMI_COMMON>,
144 clocks = <&mmsys CLK_MM_DISP_OVL>;
153 clocks = <&mmsys CLK_MM_DISP_RDMA>;
162 clocks = <&mmsys CLK_MM_DISP_WDMA>;
171 clocks = <&mmsys CLK_MM_MDP_BLS_26M>,
[all …]
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| H A D | mt2701.dtsi | 193 <&mmsys CLK_MM_SMI_COMMON>,
514 mmsys: syscon@14000000 { label
515 compatible = "mediatek,mt2701-mmsys", "syscon";
524 clocks = <&mmsys CLK_MM_MDP_BLS_26M>, <&mmsys CLK_MM_DISP_BLS>;
534 clocks = <&mmsys CLK_MM_SMI_LARB0>,
535 <&mmsys CLK_MM_SMI_LARB0>;
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| /linux/drivers/clk/mediatek/ |
| H A D | Kconfig | 30 bool "Clock driver for MediaTek MT2701 mmsys"
33 This driver supports MediaTek MT2701 mmsys clocks.
110 tristate "Clock driver for MediaTek MT2712 mmsys"
113 This driver supports MediaTek MT2712 mmsys clocks.
191 tristate "Clock driver for MediaTek MT6765 mmsys"
194 This driver supports MediaTek MT6765 mmsys clocks.
259 tristate "Clock driver for MediaTek MT6779 mmsys"
262 This driver supports MediaTek MT6779 mmsys clocks.
324 tristate "Clock driver for MediaTek MT6795 mmsys"
328 This driver supports MediaTek MT6795 mmsys clocks.
[all …]
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| H A D | clk-mt6765-mm.c | 65 .compatible = "mediatek,mt6765-mmsys",
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| /linux/Documentation/devicetree/bindings/display/mediatek/ |
| H A D | mediatek,hdmi.yaml | 103 clocks = <&mmsys CLK_MM_HDMI_PIXEL>,
104 <&mmsys CLK_MM_HDMI_PLLCK>,
105 <&mmsys CLK_MM_HDMI_AUDIO>,
106 <&mmsys CLK_MM_HDMI_SPDIF>;
112 mediatek,syscon-hdmi = <&mmsys 0x900>;
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| H A D | mediatek,split.yaml | 18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
112 clocks = <&mmsys CLK_MM_DISP_SPLIT0>;
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| H A D | mediatek,color.yaml | 19 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
119 clocks = <&mmsys CLK_MM_DISP_COLOR0>;
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| H A D | mediatek,merge.yaml | 18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
134 clocks = <&mmsys CLK_MM_DISP_MERGE>;
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| /linux/drivers/interconnect/mediatek/ |
| H A D | mt8183.c | 39 static struct mtk_icc_node mmsys = { variable
40 .name = "mmsys",
107 [MASTER_MMSYS] = &mmsys,
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| H A D | mt8195.c | 39 static struct mtk_icc_node mmsys = { variable
40 .name = "mmsys",
214 .name = "hrt-mmsys",
281 [MASTER_MMSYS] = &mmsys,
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| H A D | mt8196.c | 78 static struct mtk_icc_node mmsys = { variable
79 .name = "mmsys",
245 .name = "hrt-mmsys",
325 [MASTER_MMSYS] = &mmsys,
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| /linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt2712e.dtsi | 994 mmsys: syscon@14000000 { label
995 compatible = "mediatek,mt2712-mmsys", "syscon";
1006 clocks = <&mmsys CLK_MM_SMI_LARB0>,
1007 <&mmsys CLK_MM_SMI_LARB0>;
1015 clocks = <&mmsys CLK_MM_SMI_COMMON>,
1016 <&mmsys CLK_MM_SMI_COMMON>;
1026 clocks = <&mmsys CLK_MM_SMI_LARB4>,
1027 <&mmsys CLK_MM_SMI_LARB4>;
1037 clocks = <&mmsys CLK_MM_SMI_LARB5>,
1038 <&mmsys CLK_MM_SMI_LARB5>;
[all …]
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| /linux/Documentation/devicetree/bindings/media/ |
| H A D | mediatek,mdp3-rdma.yaml | 18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
162 clocks = <&mmsys CLK_MM_MDP_RDMA0>,
163 <&mmsys CLK_MM_MDP_RSZ1>;
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| H A D | mediatek,mdp3-rsz.yaml | 72 clocks = <&mmsys CLK_MM_MDP_RSZ0>;
81 clocks = <&mmsys CLK_MM_MDP_RSZ1>;
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| H A D | mediatek,mdp3-wrot.yaml | 87 clocks = <&mmsys CLK_MM_MDP_WROT0>;
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| /linux/Documentation/devicetree/bindings/pwm/ |
| H A D | mediatek,pwm-disp.yaml | 78 clocks = <&mmsys CLK_MM_DISP_PWM026M>,
79 <&mmsys CLK_MM_DISP_PWM0MM>;
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| /linux/include/dt-bindings/memory/ |
| H A D | mt8186-memory-port.h | 32 /* LARB 0 -- MMSYS */
38 /* LARB 1 -- MMSYS */
45 /* LARB 2 -- MMSYS */
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| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | mediatek,smi-common.yaml | 182 clocks = <&mmsys CLK_MM_SMI_COMMON>,
183 <&mmsys CLK_MM_SMI_COMMON>;
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| /linux/include/dt-bindings/reset/ |
| H A D | mt8192-resets.h | 31 /* MMSYS resets */
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| H A D | mt8186-resets.h | 34 /* MMSYS resets */
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| H A D | mediatek,mt6795-resets.h | 17 /* MMSYS resets */
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| H A D | mt8173-resets.h | 30 /* MMSYS resets */
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| H A D | mt8183-resets.h | 83 /* MMSYS resets */
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| /linux/Documentation/devicetree/bindings/soc/mediatek/ |
| H A D | mediatek,ccorr.yaml | 67 clocks = <&mmsys CLK_MM_MDP_CCORR>;
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| H A D | mediatek,wdma.yaml | 79 clocks = <&mmsys CLK_MM_MDP_WDMA0>;
|