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/linux/Documentation/devicetree/bindings/mmc/
H A Dsprd,sdhci-r11.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/sprd,sdhci-r11.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Orson Zhai <orsonzhai@gmail.com>
11 - Baolin Wang <baolin.wang7@gmail.com>
12 - Chunyan Zhang <zhang.lyra@gmail.com>
16 const: sprd,sdhci-r11
19 maxItems: 1
22 maxItems: 1
[all …]
H A Dcdns,sdhci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/cdns,sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
15 - enum:
16 - amd,pensando-elba-sd4hc
17 - microchip,mpfs-sd4hc
18 - microchip,pic64gx-sd4hc
19 - mobileye,eyeq-sd4hc
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H A Dsdhci-am654.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: TI AM654 MMC Controller
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 - $ref: sdhci-common.yaml#
19 - enum:
20 - ti,am62-sdhci
[all …]
H A Dmarvell,xenon-sdhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 This file documents differences between the core MMC properties described by
11 mmc-controller.yaml and the properties used by the Xenon implementation.
20 - Ulf Hansson <ulf.hansson@linaro.org>
25 - enum:
26 - marvell,armada-cp110-sdhci
27 - marvell,armada-ap806-sdhci
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/linux/arch/arm64/boot/dts/qcom/
H A Dipq9574-rdp418.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
6 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
9 /dts-v1/;
11 #include "ipq9574-rdp-common.dtsi"
14 model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C2";
15 compatible = "qcom,ipq9574-ap-al02-c2", "qcom,ipq9574";
20 pinctrl-0 = <&sdc_default_state>;
21 pinctrl-names = "default";
22 mmc-ddr-1_8v;
[all …]
H A Dsdm660-xiaomi-lavender.dts1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/input/gpio-keys.h>
18 chassis-type = "handset";
25 #address-cells = <2>;
26 #size-cells = <2>;
29 stdout-path = "serial0:115200n8";
32 compatible = "simple-framebuffer";
41 vph_pwr: vph-pwr-regulator {
[all …]
H A Dsda660-inforce-ifc6560.dts1 // SPDX-License-Identifier: BSD-3-Clause
9 /dts-v1/;
18 chassis-type = "embedded"; /* SBC */
26 stdout-path = "serial0:115200n8";
29 gpio-keys {
30 compatible = "gpio-keys";
32 key-volup {
36 debounce-interval = <15>;
41 * Until we hook up type-c detection, we
44 extcon_usb: extcon-usb {
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a-bananapi-bpi-r3-emmc.dtso1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
11 compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
14 &{/soc/mmc@11230000} {
15 bus-width = <8>;
16 max-frequency = <200000000>;
17 cap-mmc-highspeed;
18 mmc-hs200-1_8v;
19 mmc-hs400-1_8v;
20 hs400-ds-delay = <0x14014>;
[all …]
H A Dmt8188-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
11 compatible = "mediatek,mt8188-evb", "mediatek,mt8188";
26 stdout-path = "serial0:115200n8";
34 reserved_memory: reserved-memory {
35 #address-cells = <2>;
36 #size-cells = <2>;
40 compatible = "shared-dma-pool";
42 no-map;
52 pinctrl-names = "default";
[all …]
H A Dmt7986a-rfb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/pinctrl/mt65xx.h>
14 chassis-type = "embedded";
15 compatible = "mediatek,mt7986a-rfb", "mediatek,mt7986a";
22 stdout-path = "serial0:115200n8";
30 reg_1p8v: regulator-1p8v {
31 compatible = "regulator-fixed";
32 regulator-name = "fixed-1.8V";
33 regulator-min-microvolt = <1800000>;
[all …]
H A Dmt8183-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
14 chassis-type = "embedded";
15 compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
27 stdout-path = "serial0:921600n8";
30 reserved-memory {
31 #address-cells = <2>;
32 #size-cells = <2>;
35 compatible = "shared-dma-pool";
37 no-map;
[all …]
/linux/arch/arm64/boot/dts/exynos/
H A Dexynos7885-jackpotlte.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Galaxy A8 2018 (jackpotlte/SM-A530F) device tree source
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
18 chassis-type = "handset";
28 stdout-path = &serial_2;
38 gpio-keys {
39 compatible = "gpio-keys";
[all …]
/linux/arch/arm64/boot/dts/sprd/
H A Dwhale2.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/sprd,sc9860-clk.h>
11 interrupt-parent = <&gic>;
12 #address-cells = <2>;
13 #size-cells = <2>;
16 compatible = "simple-bus";
17 #address-cells = <2>;
18 #size-cells = <2>;
66 ap-apb@70000000 {
67 compatible = "simple-bus";
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-lx2162a-sr-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree file for LX2162A-SOM
5 // Copyright 2021 Rabeeh Khoury <rabeeh@solid-run.com>
6 // Copyright 2023 Josua Mayer <josua@solid-run.com>
13 phy-handle = <&ethernet_phy0>;
14 phy-connection-type = "rgmii-id";
20 ethernet_phy0: ethernet-phy@1 {
21 reg = <1>;
26 bus-width = <8>;
27 mmc-hs200-1_8v;
[all …]
H A Dfsl-lx2160a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 // Copyright 2018-2020 NXP
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2160a-rdb", "fsl,lx2160a";
23 stdout-path = "serial0:115200n8";
26 sb_3v3: regulator-sb3v3 {
27 compatible = "regulator-fixed";
28 regulator-name = "MC34717-3.3VSB";
29 regulator-min-microvolt = <3300000>;
[all …]
/linux/arch/arm64/boot/dts/renesas/
H A Dr8a77980a-condor-i.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Condor-I board on r8a77980A (ES2.0)
8 /dts-v1/;
10 #include "condor-common.dtsi"
13 model = "Renesas Condor-I board based on r8a77980A (ES2.0)";
14 compatible = "renesas,condor-i", "renesas,r8a77980a", "renesas,r8a77980";
18 mmc-hs400-1_8v;
H A Dr8a774e1-hihope-rzg2h.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include "hihope-rev4.dtsi"
14 compatible = "hoperun,hihope-rzg2h", "renesas,r8a774e1";
32 <&versaclock5 1>,
35 clock-names = "du.0", "du.1", "du.3",
36 "dclkin.0", "dclkin.1", "dclkin.3";
40 mmc-hs400-1_8v;
H A Dr8a779f0-spider-cpu.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
15 compatible = "renesas,spider-cpu", "renesas,r8a779f0";
30 stdout-path = "serial0:1843200n8";
34 compatible = "gpio-leds";
36 led-7 {
40 function-enumerator = <7>;
43 led-8 {
47 function-enumerator = <8>;
[all …]
H A Dr8a774b1-hihope-rzg2n.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include "hihope-rev4.dtsi"
14 compatible = "hoperun,hihope-rzg2n", "renesas,r8a774b1";
32 <&versaclock5 1>,
35 clock-names = "du.0", "du.1", "du.3",
36 "dclkin.0", "dclkin.1", "dclkin.3";
40 mmc-hs400-1_8v;
H A Dr8a774b1-hihope-rzg2n-rev2.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include "hihope-rev2.dtsi"
14 compatible = "hoperun,hihope-rzg2n", "renesas,r8a774b1";
32 <&versaclock5 1>,
35 clock-names = "du.0", "du.1", "du.3",
36 "dclkin.0", "dclkin.1", "dclkin.3";
40 mmc-hs400-1_8v;
/linux/arch/arm64/boot/dts/marvell/
H A Darmada-3720-uDPU.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
12 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
15 #include "armada-372x.dtsi"
19 stdout-path = "serial0:115200n8";
28 compatible = "gpio-leds";
29 pinctrl-names = "default";
30 pinctrl-0 = <&spi_quad_pins>;
32 led-power1 {
[all …]
H A Darmada-3720-espressobin.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * Romain Perier <romain.perier@free-electrons.com>
10 #include <dt-bindings/gpio/gpio.h>
11 #include "armada-372x.dtsi"
23 stdout-path = "serial0:115200n8";
32 compatible = "regulator-gpio";
33 regulator-name = "vcc_sd1";
34 regulator-min-microvolt = <1800000>;
35 regulator-max-microvolt = <3300000>;
36 regulator-boot-on;
[all …]
H A Darmada-3720-gl-mv1000.dts1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include "armada-372x.dtsi"
9 model = "GL.iNet GL-MV1000";
10 compatible = "glinet,gl-mv1000", "marvell,armada3720", "marvell,armada3710";
13 led-boot = &led_power;
14 led-failsafe = &led_power;
15 led-running = &led_power;
[all …]
H A Darmada-3720-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * (DB-88F3720-DDR3)
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
14 /dts-v1/;
16 #include <dt-bindings/gpio/gpio.h>
17 #include "armada-372x.dtsi"
20 model = "Marvell Armada 3720 Development Board DB-88F3720-DDR3";
21 compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3710";
24 stdout-path = "serial0:115200n8";
32 exp_usb3_vbus: usb3-vbus {
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5422-odroidxu3-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4 boards common device tree source
12 #include <dt-bindings/input/input.h>
13 #include "exynos5422-odroid-core.dtsi"
20 gpio-keys {
21 compatible = "gpio-keys";
22 pinctrl-names = "default";
23 pinctrl-0 = <&power_key>;
25 power-key {
36 debounce-interval = <0>;
[all …]

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