/linux/Documentation/devicetree/bindings/memory-controllers/ |
H A D | st,stm32mp25-omm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/st,stm32mp25-omm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STM32 Octo Memory Manager (OMM) 10 - Patrice Chotard <patrice.chotard@foss.st.com> 13 The STM32 Octo Memory Manager is a low-level interface that enables an 17 - Two single/dual/quad/octal SPI interfaces 18 - Two ports for pin assignment 22 const: st,stm32mp25-omm [all …]
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H A D | arm,pl35x-smc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/arm,pl35x-smc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Arm PL35x Series Static Memory Controller (SMC) 10 - Miquel Raynal <miquel.raynal@bootlin.com> 13 The PL35x Static Memory Controller is a bus where you can connect two kinds 14 of memory interfaces, which are NAND and memory mapped interfaces (such as 18 https://documentation-service.arm.com/static/5e8e2524fd977155116a58aa 26 - arm,pl353-smc-r2p1 [all …]
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/linux/Documentation/devicetree/bindings/display/ |
H A D | st,stih4xx.txt | 3 - sti-vtg: video timing generator 5 - compatible: "st,vtg" 6 - reg: Physical base address of the IP registers and length of memory mapped region. 8 - interrupts : VTG interrupt number to the CPU. 9 - st,slave: phandle on a slave vtg 11 - sti-vtac: video timing advanced inter dye communication Rx and TX 13 - compatible: "st,vtac-main" or "st,vtac-aux" 14 - reg: Physical base address of the IP registers and length of memory mapped region. 15 - clocks: from common clock binding: handle hardware IP needed clocks, the 17 See ../clocks/clock-bindings.txt for details. [all …]
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/linux/Documentation/devicetree/bindings/cache/ |
H A D | qcom,llcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 13 LLCC (Last Level Cache Controller) provides last level of cache memory in SoC, 16 common pool of memory. Cache memory is divided into partitions called slices 23 - qcom,ipq5424-llcc 24 - qcom,qcs615-llcc 25 - qcom,qcs8300-llcc 26 - qcom,qdu1000-llcc [all …]
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/linux/Documentation/devicetree/bindings/remoteproc/ |
H A D | ti,k3-dsp-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Suman Anna <s-anna@ti.com> 13 The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems 14 that are used to offload some of the processor-intensive tasks or algorithms, 17 These processor sub-systems usually contain additional sub-modules like 18 L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory 23 Each DSP Core sub-system is represented as a single DT node. Each node has a [all …]
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H A D | ti,keystone-rproc.txt | 5 sub-systems that are used to offload some of the processor-intensive tasks or 8 These processor sub-systems usually contain additional sub-modules like L1 9 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory controller, 15 Each DSP Core sub-system is represented as a single DT node, and should also 22 -------------------- 25 - compatible: Should be one of the following, 26 "ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs 27 "ti,k2l-dsp" for DSPs on Keystone 2 66AK2L SoCs 28 "ti,k2e-dsp" for DSPs on Keystone 2 66AK2E SoCs 29 "ti,k2g-dsp" for DSPs on Keystone 2 66AK2G SoCs [all …]
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H A D | ti,davinci-rproc.txt | 4 The TI Davinci family of SoCs usually contains a TI DSP Core sub-system that 5 is used to offload some of the processor-intensive tasks or algorithms, for 8 The processor cores in the sub-system usually contain additional sub-modules 9 like L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory 15 Each DSP Core sub-system is represented as a single DT node. 18 -------------------- 21 - compatible: Should be one of the following, 22 "ti,da850-dsp" for DSPs on OMAP-L138 SoCs 24 - reg: Should contain an entry for each value in 'reg-names'. 25 Each entry should have the memory region's start address [all …]
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H A D | xlnx,zynqmp-r5fss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/xlnx,zynqmp-r5fss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ben Levinsky <ben.levinsky@amd.com> 11 - Tanmay Shah <tanmay.shah@amd.com> 14 The Xilinx platforms include a pair of Cortex-R5F processors (RPU) for 15 real-time processing based on the Cortex-R5F processor core from ARM. 16 The Cortex-R5F processor implements the Arm v7-R architecture and includes a 17 floating-point unit that implements the Arm VFPv3 instruction set. [all …]
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H A D | qcom,q6v5.txt | 6 - compatible: 10 "qcom,ipq8074-wcss-pil" 11 "qcom,qcs404-wcss-pil" 13 - reg: 15 Value type: <prop-encoded-array> 19 - reg-names: 24 - interrupts-extended: 26 Value type: <prop-encoded-array> 27 Definition: reference to the interrupts that match interrupt-names 29 - interrupt-names: [all …]
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H A D | ti,omap-remoteproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Suman Anna <s-anna@ti.com> 13 The OMAP family of SoCs usually have one or more slave processor sub-systems 14 that are used to offload some of the processor-intensive tasks, or to manage 17 The processor cores in the sub-system are usually behind an IOMMU, and may 18 contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2 21 The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor [all …]
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H A D | qcom,sc7280-mss-pil.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-mss-pil.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sibi Sankar <quic_sibis@quicinc.com> 19 - qcom,sc7280-mss-pil 23 - description: MSS QDSP6 registers 24 - description: RMB registers 26 reg-names: 28 - const: qdsp6 [all …]
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H A D | qcom,sc7180-mss-pil.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7180-mss-pil.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sibi Sankar <quic_sibis@quicinc.com> 19 - qcom,sc7180-mss-pil 23 - description: MSS QDSP6 registers 24 - description: RMB registers 26 reg-names: 28 - const: qdsp6 [all …]
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H A D | qcom,qcs404-pas.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,qcs404-pas.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 19 - qcom,qcs404-adsp-pas 20 - qcom,qcs404-cdsp-pas 21 - qcom,qcs404-wcss-pas 28 - description: XO clock 30 clock-names: [all …]
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H A D | qcom,sa8775p-pas.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,sa8775p-pas.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bartosz Golaszewski <bartosz.golaszewski@linaro.org> 19 - items: 20 - enum: 21 - qcom,qcs8300-adsp-pas 22 - const: qcom,sa8775p-adsp-pas 23 - items: [all …]
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H A D | qcom,sdx55-pas.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,sdx55-pas.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 19 - qcom,sdx55-mpss-pas 26 - description: XO clock 28 clock-names: 30 - const: xo 35 interrupt-names: [all …]
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H A D | ti,k3-m4f-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-m4f-rproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Hari Nagalla <hnagalla@ti.com> 11 - Mathieu Poirier <mathieu.poirier@linaro.org> 20 $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# 25 - ti,am64-m4fss 27 power-domains: 30 "#address-cells": [all …]
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H A D | qcom,sc8280xp-pas.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc8280xp-pas.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 19 - qcom,sc8280xp-adsp-pas 20 - qcom,sc8280xp-nsp0-pas 21 - qcom,sc8280xp-nsp1-pas 28 - description: XO clock 30 clock-names: [all …]
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/linux/Documentation/devicetree/bindings/dsp/ |
H A D | fsl,dsp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Daniel Baluta <daniel.baluta@nxp.com> 11 - Shengjiu Wang <shengjiu.wang@nxp.com> 15 advanced pre- and post- audio processing. 20 - fsl,imx8qxp-dsp 21 - fsl,imx8qm-dsp 22 - fsl,imx8mp-dsp 23 - fsl,imx8ulp-dsp [all …]
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H A D | mediatek,mt8195-dsp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/dsp/mediatek,mt8195-dsp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - YC Hung <yc.hung@mediatek.com> 14 advanced pre- and post- audio processing. 18 const: mediatek,mt8195-dsp 22 - description: Address and size of the DSP Cfg registers 23 - description: Address and size of the DSP SRAM 25 reg-names: [all …]
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/linux/Documentation/devicetree/bindings/arm/mediatek/ |
H A D | mediatek,mt7622-wed.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt7622-wed.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lorenzo Bianconi <lorenzo@kernel.org> 11 - Felix Fietkau <nbd@nbd.name> 21 - enum: 22 - mediatek,mt7622-wed 23 - mediatek,mt7981-wed 24 - mediatek,mt7986-wed [all …]
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/linux/Documentation/devicetree/bindings/pci/ |
H A D | snps,dw-pcie-ep.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-ep.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jingoo Han <jingoohan1@gmail.com> 11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com> 16 # Please create a separate DT-schema for your DWC PCIe Endpoint controller 17 # and make sure it's assigned with the vendor-specific compatible string. 21 const: snps,dw-pcie-ep 23 - compatible [all …]
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H A D | snps,dw-pcie.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jingoo Han <jingoohan1@gmail.com> 11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com> 16 # Please create a separate DT-schema for your DWC PCIe Root Port controller 17 # and make sure it's assigned with the vendor-specific compatible string. 21 const: snps,dw-pcie 23 - compatible [all …]
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/linux/Documentation/devicetree/bindings/net/ |
H A D | qcom,ipa.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alex Elder <elder@kernel.org> 21 and has a distinct interrupt and a separately-defined address space. 28 - | 29 -------- --------- 31 | AP +<---. .----+ Modem | 32 | +--. | | .->+ | 34 -------- | | | | --------- [all …]
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/linux/arch/arm/boot/dts/ti/keystone/ |
H A D | keystone-k2hk-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ 7 /dts-v1/; 10 #include "keystone-k2hk.dtsi" 13 compatible = "ti,k2hk-evm", "ti,k2hk", "ti,keystone"; 16 reserved-memory { 17 #address-cells = <2>; 18 #size-cells = <2>; 21 dsp_common_memory: dsp-common-memory@81f800000 { 22 compatible = "shared-dma-pool"; [all …]
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/linux/Documentation/devicetree/bindings/media/ |
H A D | ti,vpe.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Benoit Parrot <bparrot@ti.com> 12 description: |- 14 processing applications. VPE consist of a single memory to memory 20 const: ti,dra7-vpe 24 - description: The VPE main register region 25 - description: Scaler (SC) register region 26 - description: Color Space Conversion (CSC) register region [all …]
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