Home
last modified time | relevance | path

Searched +full:mediatek +full:- +full:device (Results 1 – 25 of 328) sorted by relevance

12345678910>>...14

/linux/sound/soc/mediatek/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "Mediatek" menu
9 tristate "ASoC support for Mediatek MT2701 chip"
13 This adds ASoC driver for Mediatek MT2701 boards
15 Select Y if you have such device.
24 This adds ASoC driver for Mediatek MT2701 boards
26 Select Y if you have such device
[all...]
/linux/drivers/gpu/drm/mediatek/
H A Dmtk_drm_drv.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2015 MediaTek Inc.
4 * Author: YT SHEN <yt.shen@mediatek.com>
13 #include <linux/dma-mapping.h>
34 #define DRIVER_NAME "mediatek"
35 #define DRIVER_DESC "Mediatek SoC DRM"
49 if (info->num_planes != 1) in mtk_drm_mode_fb_create()
50 return ERR_PTR(-EINVAL); in mtk_drm_mode_fb_create()
325 .min_width = 2, /* 2-pixel align when ethdr is bypassed */
334 { .compatible = "mediatek,mt2701-mmsys",
[all …]
H A Dmtk_disp_ccorr.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2021 MediaTek Inc.
11 #include <linux/soc/mediatek/mtk-cmdq.h>
43 int mtk_ccorr_clk_enable(struct device *dev) in mtk_ccorr_clk_enable()
47 return clk_prepare_enable(ccorr->clk); in mtk_ccorr_clk_enable()
50 void mtk_ccorr_clk_disable(struct device *dev) in mtk_ccorr_clk_disable()
54 clk_disable_unprepare(ccorr->clk); in mtk_ccorr_clk_disable()
57 void mtk_ccorr_config(struct device *dev, unsigned int w, in mtk_ccorr_config()
63 mtk_ddp_write(cmdq_pkt, w << 16 | h, &ccorr->cmdq_reg, ccorr->regs, in mtk_ccorr_config()
65 mtk_ddp_write(cmdq_pkt, CCORR_ENGINE_EN, &ccorr->cmdq_reg, ccorr->regs, in mtk_ccorr_config()
[all …]
H A Dmtk_disp_aal.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2021 MediaTek Inc.
12 #include <linux/soc/mediatek/mtk-cmdq.h>
40 * struct mtk_disp_aal - Display Adaptive Ambient Light driver structure
53 int mtk_aal_clk_enable(struct device *dev) in mtk_aal_clk_enable()
57 return clk_prepare_enable(aal->clk); in mtk_aal_clk_enable()
60 void mtk_aal_clk_disable(struct device *dev) in mtk_aal_clk_disable()
64 clk_disable_unprepare(aal->clk); in mtk_aal_clk_disable()
67 void mtk_aal_config(struct device *dev, unsigned int w, in mtk_aal_config()
77 mtk_ddp_write(cmdq_pkt, sz, &aal->cmdq_reg, aal->regs, DISP_AAL_SIZE); in mtk_aal_config()
[all …]
/linux/Documentation/devicetree/bindings/net/bluetooth/
H A Dmediatek,bluetooth.txt1 MediaTek UART based Bluetooth Devices
4 This device is a serial attached device to UART device and thus it must be a
13 - compatible: Must be
14 "mediatek,mt7663u-bluetooth": for MT7663U device
15 "mediatek,mt7668u-bluetooth": for MT7668U device
16 - vcc-supply: Main voltage regulator
19 control such as the most of MediaTek platform. Please use below properties.
21 - pinctrl-names: Should be "default", "runtime"
22 - pinctrl-0: Should contain UART RXD low when the device is powered up to
24 - pinctrl-1: Should contain UART mode pin ctrl
[all …]
H A Dmediatek,mt7622-bluetooth.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/bluetooth/mediatek,mt7622-bluetooth.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek SoC built-in Bluetooth
10 This device is a serial attached device to BTIF device and thus it must be a
11 child node of the serial node with BTIF. The dt-bindings details for BTIF
12 device can be known via Documentation/devicetree/bindings/serial/8250.yaml.
15 - Sean Wang <sean.wang@mediatek.com>
18 - $ref: bluetooth-controller.yaml#
[all …]
/linux/arch/arm/mach-mediatek/
H A Dmediatek.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Device Tree support for Mediatek SoCs
23 if (of_machine_is_compatible("mediatek,mt6589") || in mediatek_timer_init()
24 of_machine_is_compatible("mediatek,mt7623") || in mediatek_timer_init()
25 of_machine_is_compatible("mediatek,mt8135") || in mediatek_timer_init()
26 of_machine_is_compatible("mediatek,mt8127")) { in mediatek_timer_init()
30 /* enable clock and set to free-run */ in mediatek_timer_init()
40 "mediatek,mt2701",
41 "mediatek,mt6572",
42 "mediatek,mt6582",
[all …]
H A Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/mach-mediatek/platsmp.c
5 * Copyright (c) 2014 Mediatek Inc.
6 * Author: Shunli Wang <shunli.wang@mediatek.com>
7 * Yingjoe Chen <yingjoe.chen@mediatek.com>
22 unsigned int core_keys[MTK_MAX_CPU - 1];
23 unsigned int core_regs[MTK_MAX_CPU - 1];
51 { .compatible = "mediatek,mt8135", .data = &mtk_mt8135_tz_boot },
52 { .compatible = "mediatek,mt8127", .data = &mtk_mt8135_tz_boot },
53 { .compatible = "mediatek,mt2701", .data = &mtk_mt8135_tz_boot },
[all …]
/linux/Documentation/devicetree/bindings/thermal/
H A Dmediatek,thermal.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/thermal/mediatek,thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek thermal controller for on-SoC temperatures
10 - Sascha Hauer <s.hauer@pengutronix.de>
13 This device does not have its own ADC, instead it directly controls the AUXADC
19 - $ref: thermal-sensor.yaml#
24 - enum:
25 - mediatek,mt2701-thermal
[all …]
/linux/Documentation/devicetree/bindings/usb/
H A Dmediatek,mtu3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2020 MediaTek
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtu3.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek USB3 DRD Controller
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-drd.yaml
23 - enum:
24 - mediatek,mt2712-mtu3
[all …]
H A Dmediatek,mtk-xhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2020 MediaTek
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek USB3 xHCI
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-xhci.yaml
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
25 - enum:
[all …]
/linux/Documentation/devicetree/bindings/mfd/
H A Dmediatek,mt6357.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/mediatek,mt6357.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek MT6357 PMIC
10 - Flora Fu <flora.fu@mediatek.com>
11 - Alexandre Mergnat <amergnat@baylibre.com>
18 This is a multifunction device with the following sub modules:
19 - Regulator
20 - RTC
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dmediatek,mt7628-usbphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/mediatek,mt7628-usbphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek/Ralink USB PHY
10 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
15 - mediatek,mt7620-usbphy
16 - mediatek,mt7628-usbphy
17 - ralink,rt3352-usbphy
22 "#phy-cells":
[all …]
H A Dmediatek,dsi-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2020 MediaTek
4 ---
5 $id: http://devicetree.org/schemas/phy/mediatek,dsi-phy.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek MIPI Display Serial Interface (DSI) PHY
11 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
12 - Philipp Zabel <p.zabel@pengutronix.de>
13 - Chunfeng Yun <chunfeng.yun@mediatek.com>
15 description: The MIPI DSI PHY supports up to 4-lane output.
[all …]
/linux/drivers/clk/mediatek/
H A Dreset.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2022 MediaTek Inc.
9 #include <linux/reset-controller.h>
22 * enum mtk_reset_version - Version of MediaTek clock reset controller.
25 * @MTK_RST_MAX: Total quantity of version for MediaTek clock reset controller.
34 * struct mtk_clk_rst_desc - Description of MediaTek clock reset.
51 * struct mtk_clk_rst_data - Data of MediaTek clock reset controller.
53 * @rcdev: Reset controller device.
63 * mtk_register_reset_controller - Register mediatek clock reset controller with device
64 * @np: Pointer to device.
[all …]
/linux/drivers/bluetooth/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 menu "Bluetooth device drivers"
71 bool "MediaTek protocol support"
76 The MediaTek protocol support enables firmware download
77 support and chip initialization for MediaTek Bluetooth
80 Say Y here to compile support for MediaTek protocol.
98 This driver is required if you want to use Bluetooth device with
130 device an
[all...]
/linux/Documentation/devicetree/bindings/spi/
H A Dmediatek,spi-mtk-snfi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-snfi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI-NAND flash controller for MediaTek ARM SoCs
10 - Chuanhong Guo <gch981213@gmail.com>
13 The Mediatek SPI-NAND flash controller is an extended version of
14 the Mediatek NAND flash controller. It can perform standard SPI
15 instructions with one continuous write and one read for up-to 0xa0
16 bytes. It also supports typical SPI-NAND page cache operations
[all …]
H A Dmediatek,spi-mtk-nor.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-nor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Serial NOR flash controller for MediaTek ARM SoCs
10 - Bayi Cheng <bayi.cheng@mediatek.com>
11 - Chuanhong Guo <gch981213@gmail.com>
15 SPI NOR flash. There should be only one spi slave device following
21 - $ref: /schemas/spi/spi-controller.yaml#
26 - enum:
[all …]
/linux/drivers/regulator/
H A Dmtk-dvfsrc-regulator.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020 MediaTek Inc.
13 #include <linux/soc/mediatek/dvfsrc.h>
38 static inline struct device *to_dvfs_regulator_dev(struct regulator_dev *rdev) in to_dvfs_regulator_dev()
40 return rdev_get_dev(rdev)->parent; in to_dvfs_regulator_dev()
43 static inline struct device *to_dvfsrc_dev(struct regulator_dev *rdev) in to_dvfsrc_dev()
45 return to_dvfs_regulator_dev(rdev)->parent; in to_dvfsrc_dev()
58 return -EINVAL; in dvfsrc_get_cmd()
67 struct device *dvfsrc_dev = to_dvfsrc_dev(rdev); in dvfsrc_set_voltage_sel()
81 struct device *dvfsrc_dev = to_dvfsrc_dev(rdev); in dvfsrc_get_voltage_sel()
[all …]
/linux/sound/soc/sof/mediatek/
H A DKconfig1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
8 This adds support for Sound Open Firmware for Mediatek platforms.
9 It is top level for all mediatek platforms.
10 Say Y if you have such a device.
22 This option is not user-selectable but automagically handled by
30 This adds support for Sound Open Firmware for Mediatek platforms
32 Say Y if you have such a device.
40 This adds support for Sound Open Firmware for Mediatek platforms
42 Say Y if you have such a device.
/linux/drivers/memory/
H A Dmtk-smi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2015-2016 MediaTek Inc.
4 * Author: Yong Wu <yong.wu@mediatek.com>
6 #include <linux/arm-smccc.h>
9 #include <linux/device.h>
18 #include <linux/soc/mediatek/mtk_sip_svc.h>
19 #include <soc/mediatek/smi.h>
20 #include <dt-bindings/memory/mt2701-larb-port.h>
21 #include <dt-bindings/memory/mtk-memory-port.h>
66 * or non-security.
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dmediatek,mt8196-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/mediatek,mt8196-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek Functional Clock Controller for MT8196
10 - Guangjie Song <guangjie.song@mediatek.com>
11 - Laura Nao <laura.nao@collabora.com>
14 The clock architecture in MediaTek SoCs is structured like below:
15 PLLs -->
16 dividers -->
[all …]
/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,color.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,color.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek display color processor
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
14 Mediatek display color processor, namely COLOR, provides hue, luma and
17 COLOR device node must be siblings to the central MMSYS_CONFIG node.
19 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
[all …]
/linux/drivers/cpufreq/
H A Dmediatek-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
30 * on each CPU power/clock domain of Mediatek SoCs. Each CPU cluster in
31 * Mediatek SoCs has two voltage inputs, Vproc and Vsram. In some cases the two
33 * 100mV < Vsram - Vproc < 200mV
41 struct device *cpu_de
[all...]
/linux/drivers/nvmem/
H A Dmtk-efuse.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2015 MediaTek Inc.
4 * Author: Andrew-CT Chen <andrew-ct.chen@mediatek.com>
7 #include <linux/device.h>
11 #include <linux/nvmem-provider.h>
27 void __iomem *addr = priv->base + reg; in mtk_reg_read()
51 size_t sz = strlen(cell->name); in mtk_efuse_fixup_dt_cell_info()
55 * a number with range [0-7] (max 3 bits): post process to use in mtk_efuse_fixup_dt_cell_info()
56 * it in OPP tables to describe supported-hw. in mtk_efuse_fixup_dt_cell_info()
58 if (cell->nbits <= 3 && in mtk_efuse_fixup_dt_cell_info()
[all …]

12345678910>>...14